component

HC32L073PATA-LQFP100

Public Made by Adom

by adom

HDSC HDSC, LQFP-100(14x14). Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.

componentembedded processors & controllershc32l073pata-lqfp100factory-2.0.0extractor-text
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3D Model

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Symbol & Footprint

Schematic Symbol

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Datasheet

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Contents

README

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HC32L073PATA-LQFP100

HDSC · HDSC · LQFP-100(14x14)

HC32L073PATA-LQFP100 from HDSC, in a LQFP-100(14x14). Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.

Pinout

Pin Name Type Function
1 PE02 bidirectional GPIO port E bit 2 with digital function PCA_ECI.
2 PE03 bidirectional GPIO port E bit 3 with digital function PCA_CH0.
3 PE04 bidirectional GPIO port E bit 4 with digital function PCA_CH1.
4 PE05 bidirectional GPIO port E bit 5 with digital function PCA_CH2.
5 PE06 bidirectional GPIO port E bit 6 with digital function PCA_CH3.
6 VCAP power_out LDO core supply output for internal circuits only, requires an external decoupling capacitor of at least 1uF.
7 PC13 bidirectional GPIO port C bit 13 with RTC_1HZ, TIM3_CH1B, I2S0_SCK and LVD input functions.
8 XTLI/PC14 bidirectional GPIO port C bit 14 shared with the low-speed 32.768kHz crystal oscillator input XTLI.
9 XTLO/PC15 bidirectional GPIO port C bit 15 shared with the low-speed 32.768kHz crystal oscillator output XTLO.
10 PF09 bidirectional GPIO port F bit 9 with digital function TIM0_CHA.
11 PF10 bidirectional GPIO port F bit 10 with digital function TIM0_CHB.
12 PF00/XTHI bidirectional GPIO port F bit 0 (I2C0_SDA, CRS_SYNC, UART1_TXD) shared with the 4~32MHz high-speed crystal input XTHI.
13 PF01/XTHO bidirectional GPIO port F bit 1 (I2C0_SCL, TIM4_CHB, UART1_RXD) shared with the 4~32MHz high-speed crystal output XTHO.
14 RESETB input Active-low reset input with a non-removable internal weak pull-up of about 80kOhm.
15 PC00 bidirectional GPIO port C bit 0 with LPTIM0_GATE, PCNT_S0, UART1_CTS, UART2_RTS, I2S0_MCK, ADC input AIN10, VC inputs and LCD SEG27.
16 PC01 bidirectional GPIO port C bit 1 with LPTIM0_TOG, TIM5_CHB, UART1_RTS, PCNT_S0FO, UART2_CTS, I2S0_SD, ADC input AIN11 and LCD SEG26.
17 PC02 bidirectional GPIO port C bit 2 with SPI1_MISO, LPTIM0_TOGN, PCNT_S1, UART2_RXD, ADC input AIN12 and LCD SEG25.
18 PC03 bidirectional GPIO port C bit 3 with SPI1_MOSI, LPTIM0_EXT, LPTIM0_TOGN, PCNT_S1FO, UART2_TXD, ADC input AIN13 and LCD SEG24.
19 PF02 bidirectional GPIO port F bit 2 with no digital alternate function listed.
20 AVSS power_in Analog ground.
21 AVCC power_in Analog supply, 1.8~5.5V, must be at the same voltage as DVCC.
22 PF03 bidirectional GPIO port F bit 3 with no digital alternate function listed.
23 PA00 bidirectional GPIO port A bit 0 with UART1_CTS, LPUART1_TXD, TIM0_ETR, VC0_OUT, ADC input AIN0 and LCD SEG23.
24 PA01 bidirectional GPIO port A bit 1 with UART1_RTS, LPUART1_RXD, TIM0_CHB, HCLK_OUT, SPI1_MOSI, ADC input AIN1 and LCD SEG22.
25 PA02 bidirectional GPIO port A bit 2 with UART1_TXD, TIM0_CHA, VC1_OUT, PCLK_OUT, SPI1_MISO, ADC input AIN2 and LCD SEG21.
26 PA03 bidirectional GPIO port A bit 3 with UART1_RXD, TIM0_GATE, SPI1_CS, TIM3_CH1A, ADC input AIN3 and LCD SEG20.
27 DVSS power_in Digital ground.
28 DVCC power_in Digital supply, 1.8~5.5V, must be at the same voltage as AVCC.
29 PA04 bidirectional GPIO port A bit 4 with SPI0_CS, UART1_TXD, PCA_CH4, TIM2_ETR, LVD_OUT and LCD SEG19.
30 PA05 bidirectional GPIO port A bit 5 with SPI0_SCK, TIM0_ETR, PCA_ECI, XTL_OUT, XTH_OUT and LCD SEG18.
31 PA06 bidirectional GPIO port A bit 6 with SPI0_MISO, PCA_CH0, TIM3_BK, VC0_OUT, LPUART0_CTS and LCD SEG17.
32 PA07 bidirectional GPIO port A bit 7 with SPI0_MOSI, PCA_CH1, HCLK_OUT, TIM3_CH0B, VC1_OUT and LCD SEG16.
33 PC04 bidirectional GPIO port C bit 4 with LPUART0_TXD, TIM2_ETR, IR_OUT, VC2_OUT, I2S0_WS and LCD SEG15.
34 PC05 bidirectional GPIO port C bit 5 with LPUART0_RXD, TIM6_CHB, PCA_CH4, I2S0_SDIN and LCD SEG14.
35 PB00 bidirectional GPIO port B bit 0 with PCA_CH2, TIM3_CH1B, LPUART0_TXD, TIM5_CHB, RCH_OUT, RCL_OUT, PLL_OUT and LCD SEG13.
36 PB01 bidirectional GPIO port B bit 1 with PCA_CH3, PCLK_OUT, TIM3_CH2B, TIM6_CHB, LPUART0_RTS, VC2_OUT, TCLK_OUT and LCD SEG12.
37 PB02 bidirectional GPIO port B bit 2 with LPTIM0_TOG, PCA_ECI, LPUART1_TXD, TIM4_CHA, TIM1_BK, TIM0_BK, TIM2_BK and LCD SEG11.
38 PE07 bidirectional GPIO port E bit 7 with TIM3_ETR and LPTIM1_GATE.
39 PE08 bidirectional GPIO port E bit 8 with TIM3_CH0B and LPTIM1_EXT.
40 PE09 bidirectional GPIO port E bit 9 with TIM3_CH0A and LPTIM1_TOG.
41 PE10 bidirectional GPIO port E bit 10 with TIM3_CH1B and LPTIM1_TOGN.
42 PE11 bidirectional GPIO port E bit 11 with digital function TIM3_CH1A.
43 PE12 bidirectional GPIO port E bit 12 with TIM3_CH2B, SPI0_CS, UART3_CTS and LCD SEG51.
44 PE13 bidirectional GPIO port E bit 13 with TIM3_CH2A, SPI0_SCK, UART3_RTS and LCD SEG50.
45 PE14 bidirectional GPIO port E bit 14 with TIM3_CH0B, SPI0_MISO, UART3_RXD and LCD SEG49.
46 PE15 bidirectional GPIO port E bit 15 with TIM3_BK, SPI0_MOSI, UART3_TXD and LCD SEG48.
47 PB10 bidirectional GPIO port B bit 10 with I2C1_SCL, SPI1_SCK, TIM1_CHA, LPUART0_TXD, TIM3_CH1A, LPUART1_RTS, UART1_RTS and LCD SEG10.
48 PB11 bidirectional GPIO port B bit 11 with I2C1_SDA, TIM1_CHB, LPUART0_RXD, TIM2_GATE, TIM6_CHA, LPUART1_CTS, UART1_CTS and LCD SEG9.
49 DVSS power_in Digital ground.
50 DVCC power_in Digital supply, 1.8~5.5V, must be at the same voltage as AVCC.
51 PB12 bidirectional GPIO port B bit 12 with SPI1_CS, TIM3_BK, LPUART0_TXD, TIM0_BK, LPUART0_RTS, TIM6_CHA and LCD SEG8.
52 PB13 bidirectional GPIO port B bit 13 with SPI1_SCK, I2C1_SCL, TIM3_CH0B, LPUART0_CTS, TIM1_CHA, TIM1_GATE, TIM6_CHB and LCD SEG7.
53 PB14 bidirectional GPIO port B bit 14 with SPI1_MISO, I2C1_SDA, TIM3_CH1B, TIM0_CHA, RTC_1HZ, LPUART0_RTS, TIM1_BK and LCD SEG6.
54 PB15 bidirectional GPIO port B bit 15 with SPI1_MOSI, TIM3_CH2B, TIM0_CHB, TIM0_GATE, LPUART1_RXD and LCD SEG5.
55 PD08 bidirectional GPIO port D bit 8 with LPUART0_TXD, I2S0_SCK and LCD SEG47.
56 PD09 bidirectional GPIO port D bit 9 with LPUART0_RXD, I2S0_MCK and LCD SEG46.
57 PD10 bidirectional GPIO port D bit 10 with LPUART0_TXD, I2S0_SD and LCD SEG45.
58 PD11 bidirectional GPIO port D bit 11 with LPUART0_CTS, I2S0_WS and LCD SEG44.
59 PD12 bidirectional GPIO port D bit 12 with LPUART0_RTS, UART2_RTS and LCD SEG43.
60 PD13 bidirectional GPIO port D bit 13 with UART2_RXD, I2S0_SDIN and LCD SEG42.
61 PD14 bidirectional GPIO port D bit 14 with UART2_TXD and LCD SEG41.
62 PD15 bidirectional GPIO port D bit 15 with CRS_SYNC, UART2_CTS and LCD SEG40.
63 PC06 bidirectional GPIO port C bit 6 with PCA_CH0, TIM4_CHA, TIM2_CHA, LPTIM1_GATE, I2S1_SCK, UART3_RXD and LCD SEG4.
64 PC07 bidirectional GPIO port C bit 7 with PCA_CH1, TIM5_CHA, TIM2_CHB, LPTIM1_EXT, I2S1_MCK, UART3_TXD and LCD SEG3.
65 PC08 bidirectional GPIO port C bit 8 with PCA_CH2, TIM6_CHA, TIM2_ETR, LPTIM1_TOG, I2S1_SD, UART3_CTS and LCD SEG2.
66 PC09 bidirectional GPIO port C bit 9 with PCA_CH3, TIM4_CHB, TIM1_ETR, LPTIM1_TOGN, I2S1_WS, UART3_RTS and LCD SEG1.
67 PA08 bidirectional GPIO port A bit 8 with UART0_TXD, TIM3_CH0A, CRS_SYNC, CAN_STBY, TIM1_GATE, TIM4_CHA and LCD SEG0.
68 PA09 bidirectional GPIO port A bit 9 with UART0_TXD, TIM3_CH1A, TIM0_BK, I2C0_SCL, HCLK_OUT, TIM5_CHA and LCD COM0.
69 PA10 bidirectional GPIO port A bit 10 with UART0_RXD, TIM3_CH2A, TIM2_BK, I2C0_SDA, TIM2_GATE, PCLK_OUT, TIM6_CHA and LCD COM1.
70 USB_DM bidirectional USB full-speed device D- signal.
71 USB_DP bidirectional USB full-speed device D+ signal.
72 PA13/SWDIO bidirectional GPIO port A bit 13 serving as the SWD debug data pin SWDIO, also IR_OUT, UART0_RXD, LVD_OUT, TIM3_ETR, RTC_1HZ, PCNT_S1 and VC2_OUT.
73 PF06 bidirectional GPIO port F bit 6 with I2C1_SCL, LPUART1_CTS, UART0_CTS and LCD COM2.
74 AVSS_USB power_in USB module ground.
75 AVCC_USB power_in USB module supply, 3.0~3.6V and not higher than AVCC/DVCC; leave floating or grounded when USB is unused.
76 PA14/SWCLK bidirectional GPIO port A bit 14 serving as the SWD debug clock pin SWCLK, also UART1_TXD, UART0_TXD, TIM3_CH2A, LVD_OUT, RCH_OUT, RCL_OUT and PLL_OUT.
77 PA15 bidirectional GPIO port A bit 15 with SPI0_CS, UART1_RXD, LPUART1_RTS, TIM0_ETR, TIM0_CHA, TIM3_CH1A and LCD COM3.
78 PC10 bidirectional GPIO port C bit 10 with LPUART1_TXD, LPUART0_TXD, PCA_CH2 and LCD COM4/SEG39.
79 PC11 bidirectional GPIO port C bit 11 with LPUART1_RXD, LPUART0_RXD, PCA_CH3, PCNT_S0FO and LCD COM5/SEG38.
80 PC12 bidirectional GPIO port C bit 12 with LPUART0_TXD, LPUART1_TXD, PCA_CH4, PCNT_S1FO and LCD COM6/SEG37.
81 PD00 bidirectional GPIO port D bit 0 with CAN_RX and SPI1_CS.
82 PD01 bidirectional GPIO port D bit 1 with CAN_TX and SPI1_SCK.
83 PD02 bidirectional GPIO port D bit 2 with PCA_ECI, LPUART0_RTS, TIM1_ETR and LCD COM7/SEG36.
84 PD03 bidirectional GPIO port D bit 3 with UART1_CTS, SPI1_MISO, LPTIM1_TOG and I2S1_SCK.
85 PD04 bidirectional GPIO port D bit 4 with UART1_RTS, SPI1_MOSI, LPTIM1_TOGN and I2S1_MCK.
86 PD05 bidirectional GPIO port D bit 5 with UART1_TXD, LPTIM1_GATE, CAN_STBY and I2S1_SD.
87 PD06 bidirectional GPIO port D bit 6 with UART1_RXD, LPTIM1_EXT and I2S1_WS.
88 PD07 bidirectional GPIO port D bit 7 with UART1_TXD and I2S1_SDIN.
89 PB03 bidirectional GPIO port B bit 3 with SPI0_SCK, TIM0_CHB, TIM1_GATE, TIM3_CH0A, LPTIM0_GATE, LCD SEG35 and VLCDH.
90 PB04 bidirectional GPIO port B bit 4 with SPI0_MISO, PCA_CH0, TIM2_BK, UART0_CTS, TIM2_GATE, TIM3_CH0B, LPTIM0_EXT, LCD SEG34 and VLCD3.
91 PB05 bidirectional GPIO port B bit 5 with SPI0_MOSI, TIM1_BK, PCA_CH1, LPTIM0_GATE, PCNT_S0, UART0_RTS, LCD SEG33 and VLCD2.
92 PB06 bidirectional GPIO port B bit 6 with I2C0_SCL, UART0_TXD, TIM1_CHB, TIM0_CHA, LPTIM0_EXT, TIM3_CH0A, LPTIM0_TOG, LCD SEG32 and VLCD1.
93 PB07 bidirectional GPIO port B bit 7 with I2C0_SDA, UART0_RXD, TIM2_CHB, LPUART1_CTS, TIM0_CHB, LPTIM0_TOGN, PCNT_S1, LVD input and LCD SEG31.
94 BOOT0 input Boot select (PF11): high at reset selects ISP programming mode, low selects user mode executing Flash code.
95 PB08 bidirectional GPIO port B bit 8 with I2C0_SCL, TIM1_CHA, CAN_RX, TIM2_CHA, TIM0_GATE, TIM3_CH2A, UART0_TXD, LVD input and LCD SEG29.
96 PB09 bidirectional GPIO port B bit 9 with I2C0_SDA, IR_OUT, SPI1_CS, TIM2_CHA, CAN_TX, TIM2_CHB, UART0_RXD and LCD SEG28.
97 PE00 bidirectional GPIO port E bit 0 with digital function TIM1_CHA.
98 PE01 bidirectional GPIO port E bit 1 with digital function TIM2_CHA.
99 DVSS power_in Digital ground.
100 DVCC power_in Digital supply, 1.8~5.5V, must be at the same voltage as AVCC.

Key specifications

Parameter Value
Manufacturer HDSC
Package LQFP-100(14x14)
Category Embedded Processors & Controllers
Pins 100

Electrical characteristics

Limits as printed in the datasheet (page.json metadata.characteristics carries them as data).

Parameter Symbol Min Typ Max Unit Conditions Page
External main supply voltage (VCC-VSS, incl. AVCC and DVCC) VCC - VSS -0.3 5.5 V 53
USB module supply voltage AVCC_USB 3 3.6 V 53
Voltage difference between supply pins /ΔVCCx/ 50 mV 53
Voltage difference between ground pins /VSSx - VSS/ 50 mV 53
Internal 2.5V reference voltage VREF25 2.475 2.5 2.525 V 25°C, 3.3V 58
Internal 2.5V reference voltage VREF25 2.463 2.5 2.525 V -40 ~ 85°C, 2.8 ~ 5.5V 58
Internal 1.5V reference voltage VREF15 1.485 1.5 1.515 V 25°C, 3.3V 58
Internal 1.5V reference voltage VREF15 1.477 1.5 1.519 V -40 ~ 85°C, 1.8 ~ 5.5V 58
Internal reference temperature coefficient TCoeff 120 ppm/°C -40 ~ 85°C 58
LVD external input voltage range Vex 0 5.5 V 0 to VCC 57
LVD detection threshold Vlevel 1.7 3.4 V LVD_CR.VTDS=0000 to 1111 (min of first setting, max of last setting) 57
LVD hysteresis voltage Vhyste 40 mV 57
Run mode current, all peripherals clock ON IDD (Run mode) 1330 1800 μA Run while(1) in Flash, Vcap=1.5V, VCC=1.8-5.5V, TA=-40~85℃, RCH 4M 59
Run mode current, all peripherals clock ON IDD (Run mode) 2490 3430 μA RCH 8M, same conditions 59
Run mode current, all peripherals clock ON IDD (Run mode) 4990 6570 μA RCH 16M, same conditions 59
Run mode current, all peripherals clock ON IDD (Run mode) 6760 8960 μA RCH 22.12M, same conditions 59
Run mode current, all peripherals clock ON IDD (Run mode) 7260 9680 μA RCH 24M, same conditions 59
Run mode current, all peripherals clock ON IDD (Run mode) 13470 15750 μA PLL RCH4M to 48M FlashWait=1, VCC=1.8-5.5V, TA=-40~85℃ 59
Run mode current, all peripherals clock OFF IDD (Run mode) 670 1080 μA Run while(1) in Flash, RCH 4M, VCC=1.8-5.5V, TA=-40~85℃ 59
Run mode current, all peripherals clock OFF IDD (Run mode) 1190 1990 μA RCH 8M, same conditions 59
Run mode current, all peripherals clock OFF IDD (Run mode) 2280 3580 μA RCH 16M, same conditions 59
Run mode current, all peripherals clock OFF IDD (Run mode) 3070 4790 μA RCH 22.12M, same conditions 59
Operating supply voltage VCC 1.8 5.5 V AVCC and DVCC must be equal 1
Operating temperature TA -40 85 ℃ 1
USB supply voltage (typical application) AVCC_USB 3 3.6 V 51

CAD (KiCad official)

  • Symbol: HC32L073PATA-LQFP100
  • Footprint: Package_QFP:LQFP-100_14x14mm_P0.5mm
  • 3D model: LQFP-100(14x14) (KiCad packages3D, STEP)
  • 3D model files: hc32l073pata-lqfp100-etched.step / hc32l073pata-lqfp100-etched.glb carry the MPN laser-etched on the die in a toggleable Adom.LaserEtch group (Fusion-ready); hc32l073pata-lqfp100.step / hc32l073pata-lqfp100.glb are the bare package body.

Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

  • Datasheet: HDSC datasheet (102 pp, sha256 d7134b3d9cd4f117, retrieved 2026-10-22, tier: lcsc)
  • Datasheet language: Chinese. Pin names, descriptions, and specs on this page were extracted and translated to English by ds2sf; the linked PDF is the manufacturer original.
  • Extractor: parts-factory 2.0.0 / extract_pins 0.3, primary claude-sonnet-5-5 (text), consensus claude-sonnet-5-5 (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
  • CAD: KiCad official libraries (CC-BY-SA 4.0).

Datasheet PDF