component
HC32L072JATA-LQ48
Public Made by Adomby adom
HDSC Other Processors and Microcontrollers (MCUs), LQFP-48(7x7). Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.
3D Model
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Symbol & Footprint
Schematic Symbol
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PCB Footprint
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Datasheet
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README
markdownHC32L072JATA-LQ48
HDSC · Other Processors and Microcontrollers (MCUs) · LQFP-48(7x7)
HC32L072JATA-LQ48 from HDSC, in a LQFP-48(7x7). Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.
Pinout
| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | VCAP | power_out | LDO core supply output for internal circuits only, needs an external decoupling capacitor of at least 1uF. |
| 2 | PC13 | bidirectional | GPIO with RTC_1HZ, TIM3_CH1B, I2S0_SCK and LVD0 functions. |
| 3 | PC14/XTLI | bidirectional | GPIO or low-speed crystal (32.768kHz) oscillator input XTLI. |
| 4 | PC15/XTLO | bidirectional | GPIO or low-speed crystal (32.768kHz) oscillator output XTLO. |
| 5 | PF00/XTHI | bidirectional | GPIO (I2C0_SDA, CRS_SYNC, UART1_TXD) or high-speed crystal (4-32MHz) oscillator input XTHI. |
| 6 | PF01/XTHO | bidirectional | GPIO (I2C0_SCL, TIM4_CHB, UART1_RXD) or high-speed crystal (4-32MHz) oscillator output XTHO. |
| 7 | RESETB | input | Active-low reset input with a non-removable internal pull-up of typically 80kOhm. |
| 8 | AVSS | power_in | Analog ground. |
| 9 | AVCC | power_in | Analog supply, 1.8 to 5.5V, must equal DVCC voltage. |
| 10 | PA00 | bidirectional | GPIO with UART1_CTS, LPUART1_TXD, TIM0/1/3 functions, VC0_OUT and ADC input AIN0. |
| 11 | PA01 | bidirectional | GPIO with UART1_RTS, LPUART1_RXD, TIM0/1 functions, HCLK_OUT, SPI1_MOSI and ADC input AIN1. |
| 12 | PA02 | bidirectional | GPIO with UART1_TXD, TIM0/1/2 functions, VC1_OUT, PCLK_OUT, SPI1_MISO and ADC input AIN2. |
| 13 | PA03 | bidirectional | GPIO with UART1_RXD, TIM0/1/2/3/5 functions, SPI1_CS and ADC input AIN3. |
| 14 | PA04 | bidirectional | GPIO with SPI0_CS, UART1_TXD, PCA_CH4, TIM2_ETR, TIM5_CHA, LVD_OUT and TIM3_CH2B. |
| 15 | PA05 | bidirectional | GPIO with SPI0_SCK, TIM0_ETR, PCA_ECI, TIM0_CHA, TIM5_CHB, XTL_OUT and XTH_OUT. |
| 16 | PA06 | bidirectional | GPIO with SPI0_MISO, PCA_CH0, TIM3_BK, TIM1_CHA, VC0_OUT, TIM3_GATE and LPUART0_CTS. |
| 17 | PA07 | bidirectional | GPIO with SPI0_MOSI, PCA_CH1, HCLK_OUT, TIM3_CH0B, TIM2_CHA, VC1_OUT and TIM4_CHB. |
| 18 | PB00 | bidirectional | GPIO with PCA_CH2, TIM3_CH1B, LPUART0_TXD, TIM5_CHB, RCH_OUT, RCL_OUT and PLL_OUT. |
| 19 | PB01 | bidirectional | GPIO with PCA_CH3, PCLK_OUT, TIM3_CH2B, TIM6_CHB, LPUART0_RTS, VC2_OUT and TCLK_OUT. |
| 20 | PB02 | bidirectional | GPIO with LPTIM0_TOG, PCA_ECI, LPUART1_TXD, TIM4_CHA and TIM0/1/2_BK. |
| 21 | PB10 | bidirectional | GPIO with I2C1_SCL, SPI1_SCK, TIM1_CHA, LPUART0_TXD, TIM3_CH1A, LPUART1_RTS and UART1_RTS. |
| 22 | PB11 | bidirectional | GPIO with I2C1_SDA, TIM1_CHB, LPUART0_RXD, TIM2_GATE, TIM6_CHA, LPUART1_CTS and UART1_CTS. |
| 23 | DVSS | power_in | Digital ground. |
| 24 | DVCC | power_in | Digital supply, 1.8 to 5.5V, must equal AVCC voltage. |
| 25 | PB12 | bidirectional | GPIO with SPI1_CS, TIM3_BK, LPUART0_TXD, TIM0_BK, LPUART0_RTS and TIM6_CHA. |
| 26 | PB13 | bidirectional | GPIO with SPI1_SCK, I2C1_SCL, TIM3_CH0B, LPUART0_CTS, TIM1_CHA, TIM1_GATE and TIM6_CHB. |
| 27 | PB14 | bidirectional | GPIO with SPI1_MISO, I2C1_SDA, TIM3_CH1B, TIM0_CHA, RTC_1HZ, LPUART0_RTS and TIM1_BK. |
| 28 | PB15 | bidirectional | GPIO with SPI1_MOSI, TIM3_CH2B, TIM0_CHB, TIM0_GATE and LPUART1_RXD. |
| 29 | PA08 | bidirectional | GPIO with UART0_TXD, TIM3_CH0A, CRS_SYNC, CAN_STBY, TIM1_GATE, TIM4_CHA and TIM3_BK. |
| 30 | PA09 | bidirectional | GPIO with UART0_TXD, TIM3_CH1A, TIM0_BK, I2C0_SCL, HCLK_OUT and TIM5_CHA. |
| 31 | PA10 | bidirectional | GPIO with UART0_RXD, TIM3_CH2A, TIM2_BK, I2C0_SDA, TIM2_GATE, PCLK_OUT and TIM6_CHA. |
| 32 | USB_DM | bidirectional | USB full-speed device D- signal. |
| 33 | USB_DP | bidirectional | USB full-speed device D+ signal. |
| 34 | PA13/SWDIO | bidirectional | SWD debug data I/O, also GPIO with IR_OUT, UART0_RXD, LVD_OUT, TIM3_ETR, RTC_1HZ, PCNT_S1 and VC2_OUT. |
| 35 | AVSS_USB | power_in | USB module ground. |
| 36 | AVCC_USB | power_in | USB module supply, 3.0 to 3.6V, not higher than AVCC/DVCC by more than 0.3V; leave floating or ground if USB unused. |
| 37 | PA14/SWCLK | bidirectional | SWD debug clock, also GPIO with UART1_TXD, UART0_TXD, TIM3_CH2A, LVD_OUT, RCH_OUT, RCL_OUT and PLL_OUT. |
| 38 | PA15 | bidirectional | GPIO with SPI0_CS, UART1_RXD, LPUART1_RTS, TIM0_ETR, TIM0_CHA and TIM3_CH1A. |
| 39 | PB03 | bidirectional | GPIO with SPI0_SCK, TIM0_CHB, TIM1_GATE, TIM3_CH0A, LPTIM0_GATE, XTL_OUT and XTH_OUT. |
| 40 | PB04 | bidirectional | GPIO with SPI0_MISO, PCA_CH0, TIM2_BK, UART0_CTS, TIM2_GATE, TIM3_CH0B and LPTIM0_EXT. |
| 41 | PB05 | bidirectional | GPIO with SPI0_MOSI, TIM1_BK, PCA_CH1, LPTIM0_GATE, PCNT_S0 and UART0_RTS. |
| 42 | PB06 | bidirectional | GPIO with I2C0_SCL, UART0_TXD, TIM1_CHB, TIM0_CHA, LPTIM0_EXT, TIM3_CH0A and LPTIM0_TOG. |
| 43 | PB07 | bidirectional | GPIO with I2C0_SDA, UART0_RXD, TIM2_CHB, LPUART1_CTS, TIM0_CHB, LPTIM0_TOGN and PCNT_S1. |
| 44 | BOOT0 | input | Boot select (PF11): high at reset enters ISP programming mode, low runs user Flash code. |
| 45 | PB08 | bidirectional | GPIO with I2C0_SCL, TIM1_CHA, CAN_RX, TIM2_CHA, TIM0_GATE, TIM3_CH2A and UART0_TXD. |
| 46 | PB09 | bidirectional | GPIO with I2C0_SDA, IR_OUT, SPI1_CS, TIM2_CHA, CAN_TX, TIM2_CHB and UART0_RXD. |
| 47 | DVSS | power_in | Digital ground. |
| 48 | DVCC | power_in | Digital supply, 1.8 to 5.5V, must equal AVCC voltage. |
Key specifications
| Parameter | Value |
|---|---|
| Manufacturer | HDSC |
| Package | LQFP-48(7x7) |
| Category | Embedded Processors & Controllers |
| Pins | 48 |
Electrical characteristics
Limits as printed in the datasheet (page.json metadata.characteristics carries them as data).
| Parameter | Symbol | Min | Typ | Max | Unit | Conditions | Page |
|---|---|---|---|---|---|---|---|
| External main supply voltage (AVCC and DVCC) | VCC - VSS | -0.3 | 5.5 | V | 53 | ||
| USB module supply voltage | AVCC_USB | 3 | 3.6 | V | 53 | ||
| Voltage difference between supply pins | /ΔVCCx/ | 50 | mV | 53 | |||
| Voltage difference between ground pins | /VSSx - VSS/ | 50 | mV | 53 | |||
| Operating supply voltage | VCC | 1.8 | 5.5 | V | Operating conditions | 1 | |
| Operating temperature | TA | -40 | 85 | °C | Operating conditions | 1 | |
| LVD external input voltage range | Vex | 0 | V | Upper limit printed as VCC | 57 | ||
| Internal 2.5V reference voltage | VREF25 | 2.475 | 2.5 | 2.525 | V | 25°C 3.3V | 58 |
| Internal 2.5V reference voltage | VREF25 | 2.463 | 2.5 | 2.525 | V | -40 ~ 85°C 2.8 ~ 5.5V | 58 |
| Internal 1.5V reference voltage | VREF15 | 1.485 | 1.5 | 1.515 | V | 25°C 3.3V | 58 |
| Internal 1.5V reference voltage | VREF15 | 1.477 | 1.5 | 1.519 | V | -40 ~ 85°C 1.8 ~ 5.5V | 58 |
| Run mode current, all peripherals ON, RCH 4M | IDD | 1330 | 1800 | μA | Vcap=1.5V VCC=1.8-5.5V TA=-40-85℃ RCH 4M, run while(1) in Flash | 59 | |
| Run mode current, all peripherals ON, RCH 8M | IDD | 2490 | 3430 | μA | Vcap=1.5V VCC=1.8-5.5V TA=-40-85℃ RCH 8M, run while(1) in Flash | 59 | |
| Run mode current, all peripherals ON, RCH 16M | IDD | 4990 | 6570 | μA | Vcap=1.5V VCC=1.8-5.5V TA=-40-85℃ RCH 16M, run while(1) in Flash | 59 | |
| Run mode current, all peripherals ON, RCH 24M | IDD | 7260 | 9680 | μA | Vcap=1.5V VCC=1.8-5.5V TA=-40-85℃ RCH 24M, run while(1) in Flash | 59 | |
| Run mode current, all peripherals ON, PLL 48M | IDD | 13470 | 15750 | μA | Vcap=1.5V VCC=1.8-5.5V TA=-40-85℃ PLL RCH4M, 48M FlashWait=1 | 59 | |
| Run mode current, all peripherals OFF, RCH 4M | IDD | 670 | 1080 | μA | Vcap=1.5V VCC=1.8-5.5V TA=-40-85℃ RCH 4M, run while(1) in Flash | 59 | |
| Run mode current, all peripherals OFF, RCH 8M | IDD | 1190 | 1990 | μA | Vcap=1.5V VCC=1.8-5.5V TA=-40-85℃ RCH 8M, run while(1) in Flash | 59 |
CAD (KiCad official)
- Symbol:
HC32L072JATA-LQ48 - Footprint:
Package_QFP:LQFP-48_7x7mm_P0.5mm - 3D model: LQFP-48(7x7) (KiCad packages3D, STEP)
- 3D model files:
hc32l072jata-lq48-etched.step/hc32l072jata-lq48-etched.glbcarry the MPN laser-etched on the die in a toggleableAdom.LaserEtchgroup (Fusion-ready);hc32l072jata-lq48.step/hc32l072jata-lq48.glbare the bare package body.
Provenance
Data extracted from the manufacturer datasheet, not a distributor listing:
- Datasheet: HDSC datasheet (102 pp, sha256
d7134b3d9cd4f117, retrieved 2026-10-22, tier: lcsc) - Datasheet language: Chinese. Pin names, descriptions, and specs on this page were extracted and translated to English by ds2sf; the linked PDF is the manufacturer original.
- Extractor: parts-factory
2.0.0/extract_pins 0.3, primaryclaude-sonnet-5-5(text), consensusclaude-sonnet-5-5(agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish. - CAD: KiCad official libraries (CC-BY-SA 4.0).