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HC32F4A0SITB-LQFP176

HDSC · HDSC · LQFP-176(24x24)

HC32F4A0SITB-LQFP176 from HDSC, in a LQFP-176(24x24). Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.

Pinout

Pin Name Type Function
1 PE2 bidirectional 5V-tolerant GPIO with pull-up, push-pull/open-drain and low/mid/high drive; alternates EIRQ2, TRACECLK, EXMC_ADD23.
2 PE3 bidirectional 5V-tolerant GPIO with pull-up, push-pull/open-drain and low/mid/high drive; alternates EIRQ3, TRACED0, EXMC_ADD19.
3 PE4 bidirectional 5V-tolerant GPIO with pull-up, push-pull/open-drain and low/mid/high drive; alternates EIRQ4, TRACED1, EXMC_ADD20.
4 PE5 bidirectional 5V-tolerant GPIO with pull-up, push-pull/open-drain and low/mid/high drive; alternates EIRQ5, TRACED2, EXMC_ADD21.
5 PE6 bidirectional 5V-tolerant GPIO with pull-up, push-pull/open-drain and low/mid/high drive; alternates EIRQ6, TRACED3, EXMC_ADD22.
6 VBAT power_in Backup supply 1.65 to 3.6 V; tie to VCC with 100nF decoupling when no battery is used.
7 PI8 bidirectional 5V-tolerant GPIO with pull-up, push-pull/open-drain and low/mid/high drive; alternates RTCIC1, EIRQ8, EVENTOUT.
8 PC13 bidirectional 5V-tolerant GPIO with pull-up, push-pull/open-drain and low/mid/high drive; alternates RTCIC0, EIRQ13/WKUP3_1, RTC_OUT.
9 PC14 output Shared with XTAL32_OUT, external 32.768 kHz oscillator output; 5V-tolerant GPIO function also available.
10 PC15 input Shared with XTAL32_IN, external 32.768 kHz oscillator input; 5V-tolerant GPIO function also available.
11 PI9 bidirectional 5V-tolerant GPIO with pull-up, push-pull/open-drain and low/mid/high drive; alternates EIRQ9, TIMA_6_TRIG, EXMC_DATA30.
12 PI10 bidirectional 5V-tolerant GPIO with pull-up, push-pull/open-drain and low/mid/high drive; alternates EIRQ10, TIMA_6_PWM3, EXMC_DATA31.
13 PI11 bidirectional 5V-tolerant GPIO with pull-up, push-pull/open-drain and low/mid/high drive; alternates EIRQ11, TIMA_6_PWM4, USBHS_ULPI_DIR.
14 VSS power_in Ground, 0 V reference for the device supply.
15 VCC power_in Power supply 1.8 to 3.6 V; decouple to the nearest VSS pin.
16 PF0 bidirectional 5V-tolerant GPIO with pull-up, push-pull/open-drain and low/mid/high drive; alternates EIRQ0, MCO_1, EXMC_ADD0.
17 PF1 bidirectional 5V-tolerant GPIO with pull-up, push-pull/open-drain and low/mid/high drive; alternates EIRQ1, EXMC_ADD1, SPI3_NSS2.
18 PF2 bidirectional 5V-tolerant GPIO with pull-up, push-pull/open-drain and low/mid/high drive; alternates EIRQ2, EXMC_ADD2, SPI3_NSS3.
19 PF3 bidirectional 5V-tolerant GPIO with pull-up, push-pull/open-drain and low/mid/high drive; analog ADC3_IN9, alternates EIRQ3, EXMC_ADD3.
20 PF4 bidirectional 5V-tolerant GPIO with pull-up, push-pull/open-drain and low/mid/high drive; analog ADC3_IN14, alternates EIRQ4, EXMC_ADD4.
21 PF5 bidirectional 5V-tolerant GPIO with pull-up, push-pull/open-drain and low/mid/high drive; analog ADC3_IN15, alternates EIRQ5, EXMC_ADD5.
22 VSS power_in Ground, 0 V reference for the device supply.
23 VCC power_in Power supply 1.8 to 3.6 V; decouple to the nearest VSS pin.
24 PF6 bidirectional 5V-tolerant GPIO with pull-up, push-pull/open-drain and low/mid/high drive; analog ADC3_IN4, alternates EIRQ6, EXMC_RB2.
25 PF7 bidirectional 5V-tolerant GPIO with pull-up, push-pull/open-drain and low/mid/high drive; analog ADC3_IN5, alternates EIRQ7, EXMC_RB3.
26 PF8 bidirectional 5V-tolerant GPIO with pull-up, push-pull/open-drain and low/mid/high drive; analog ADC3_IN6, alternates EIRQ8, EXMC_RB4.
27 PF9 bidirectional 5V-tolerant GPIO with pull-up, push-pull/open-drain and low/mid/high drive; analog ADC3_IN7, alternates EIRQ9, EXMC_RB5, DVP_PIXCLK.
28 PF10 bidirectional 5V-tolerant GPIO with pull-up, push-pull/open-drain and low/mid/high drive; analog ADC3_IN8, alternates EIRQ10, EXMC_RB6.
29 PH0 input Shared with XTAL_IN, external high-speed oscillator input for a 4 to 25 MHz crystal or clock; 5V-tolerant GPIO function also available.
30 PH1 output Shared with XTAL_OUT, external high-speed oscillator output for a 4 to 25 MHz crystal; 5V-tolerant GPIO function also available.
31 NRST input Reset input, active low; pull up to VCC through a resistor when not used.
32 PC0 bidirectional 5V-tolerant GPIO with pull-up, push-pull/open-drain and low/mid/high drive; analog ADC123_IN10 and CMP3_INP4, alternates EIRQ0, EXMC_WE.
33 PC1 bidirectional 5V-tolerant GPIO with pull-up, push-pull/open-drain and low/mid/high drive; analog ADC123_IN11, alternates EIRQ1, ETH_SMI_MDC.
34 PC2 bidirectional 5V-tolerant GPIO with pull-up, push-pull/open-drain and low/mid/high drive; analog ADC123_IN12, alternates EIRQ2, EXMC_CE0.
35 PC3 bidirectional 5V-tolerant GPIO with pull-up, push-pull/open-drain and low/mid/high drive; analog ADC123_IN13 and CMP1_INM4, alternates EIRQ3, EXMC_ALE.
36 VCC power_in Power supply 1.8 to 3.6 V; decouple to the nearest VSS pin.
37 AVSS_VREFL power_in Analog ground shared with the VREFL reference; tie to VSS when analog modules are unused.
38 VREFH power_in Analog reference voltage, must not exceed AVCC; tie to AVCC when the ADC is unused.
39 AVCC power_in Analog supply at the same voltage as VCC (1.8 to 3.6 V); tie to VCC when analog modules are unused.
40 PA0 bidirectional Not 5V tolerant GPIO, input must not exceed VCC; analog ADC123_IN0 and PGA_1, alternates EIRQ0, WKUP0_0.
41 PA1 bidirectional Not 5V tolerant GPIO, input must not exceed VCC; analog ADC123_IN1 and PGA_2, alternates EIRQ1.
42 PA2 bidirectional Not 5V tolerant GPIO, input must not exceed VCC; analog ADC123_IN2 and PGA_3, alternates EIRQ2.
43 PH2 bidirectional 5V-tolerant GPIO with pull-up, push-pull/open-drain and low/mid/high drive; analog ADC3_IN16, alternates EIRQ2, FCMREF.
44 PH3 bidirectional 5V-tolerant GPIO with pull-up, push-pull/open-drain and low/mid/high drive; analog ADC3_IN17, alternates EIRQ3, EXMC_CE0.
45 PH4 bidirectional 5V-tolerant GPIO with pull-up, push-pull/open-drain and low/mid/high drive; analog ADC3_IN18, alternates EIRQ4, USBHS_ULPI_NXT.
46 PH5 bidirectional 5V-tolerant GPIO with pull-up, push-pull/open-drain and low/mid/high drive; analog ADC3_IN19, alternates EIRQ5, EXMC_WE.
47 PA3 bidirectional 5V-tolerant GPIO with pull-up, push-pull/open-drain and low/mid/high drive; analog ADC123_IN3, PGA123_VSS and CMP1_INP4, alternates EIRQ3, USBHS_ULPI_D0.
48 AVSS power_in Analog ground, connect to VSS; tie to VSS when analog modules are unused.
49 AVCC power_in Analog supply at the same voltage as VCC (1.8 to 3.6 V); tie to VCC when analog modules are unused.
50 PA4 bidirectional 5V-tolerant GPIO with pull-up, push-pull/open-drain and low/mid/high drive; analog ADC12_IN4, DAC1_OUT1 and CMP2_INP3, alternates EIRQ4, USART5_CK.
51 PA5 bidirectional 5V-tolerant GPIO with pull-up, push-pull/open-drain and low/mid/high drive; analog ADC12_IN5, DAC1_OUT2 and CMP2_INP4, alternates EIRQ5, KEYOUT1.
52 PA6 bidirectional Not 5V tolerant GPIO, input must not exceed VCC; analog ADC12_IN6, PGA_4 and CMP1_INP2, alternates EIRQ6, KEYOUT2.
53 PA7 bidirectional 5V-tolerant GPIO with pull-up, push-pull/open-drain and low/mid/high drive; analog ADC12_IN7, PGA4_VSS and CMP123_INM3, alternates EIRQ7, KEYOUT3.
54 PC4 bidirectional 5V-tolerant GPIO with pull-up, push-pull/open-drain and low/mid/high drive; analog ADC12_IN14, DAC2_OUT1 and CMP2_INM4, alternates EIRQ4, SDIO2_CD.
55 PC5 bidirectional 5V-tolerant GPIO with pull-up, push-pull/open-drain and low/mid/high drive; analog ADC12_IN15, DAC2_OUT2 and CMP3_INM4, alternates EIRQ5, SDIO2_CMD.
56 PB0 bidirectional 5V-tolerant GPIO with pull-up, push-pull/open-drain and low/mid/high drive; analog ADC12_IN8 and CMP3_INP2, alternates EIRQ0, KEYOUT4.
57 PB1 bidirectional 5V-tolerant GPIO with pull-up, push-pull/open-drain and low/mid/high drive; analog ADC12_IN9 and CMP3_INP3, alternates EIRQ1, WKUP0_1.
58 PB2 bidirectional 5V-tolerant GPIO with pull-up, push-pull/open-drain and low/mid/high drive; PVD2EXINP external PVD2 comparison input, alternates EIRQ2, VCOUT, WKUP0_2.
59 PF11 bidirectional 5V-tolerant GPIO with pull-up, push-pull/open-drain and low/mid/high drive; alternates EIRQ11, EXMC_OE, DVP_DATA12.
60 PF12 bidirectional 5V-tolerant GPIO with pull-up, push-pull/open-drain and low/mid/high drive; alternates EIRQ12, EXMC_ADD6.
61 VSS power_in Ground, 0 V reference for the device supply.
62 VCC power_in Power supply 1.8 to 3.6 V; decouple to the nearest VSS pin.
63 PF13 bidirectional 5V-tolerant GPIO with pull-up, push-pull/open-drain and low/mid/high drive; alternates EIRQ13, EXMC_ADD7, SPI6_NSS3.
64 PF14 bidirectional 5V-tolerant GPIO with pull-up, push-pull/open-drain and low/mid/high drive; alternates EIRQ14, EXMC_ADD8, SPI6_NSS2.
65 PF15 bidirectional 5V-tolerant GPIO with pull-up, push-pull/open-drain and low/mid/high drive; alternates EIRQ15, EXMC_ADD9, SPI6_NSS1.
66 PG0 bidirectional 5V-tolerant GPIO with pull-up, push-pull/open-drain and low/mid/high drive; alternates EIRQ0, EXMC_ADD10.
67 PG1 bidirectional 5V-tolerant GPIO with pull-up, push-pull/open-drain and low/mid/high drive; alternates EIRQ1, EXMC_ADD11.
68 PE7 bidirectional 5V-tolerant GPIO with pull-up, push-pull/open-drain and low/mid/high drive; alternates EIRQ7, ADTRG1, EXMC_DATA4.
69 PE8 bidirectional 5V-tolerant GPIO with pull-up, push-pull/open-drain and low/mid/high drive; alternates EIRQ8, CTCREF, EXMC_DATA5.
70 PE9 bidirectional 5V-tolerant GPIO with pull-up, push-pull/open-drain and low/mid/high drive; alternates EIRQ9, ADTRG3, EXMC_DATA6.
71 VSS power_in Ground, 0 V reference for the device supply.
72 VCC power_in Power supply 1.8 to 3.6 V; decouple to the nearest VSS pin.
73 PE10 bidirectional 5V-tolerant GPIO with pull-up, push-pull/open-drain and low/mid/high drive; alternates CMP1_INP3, EIRQ10, EXMC_DATA7.
74 PE11 bidirectional 5V-tolerant GPIO with pull-up, push-pull/open-drain and low/mid/high drive; alternates EIRQ11, USBHS_ULPI_D7, EXMC_DATA8.
75 PE12 bidirectional 5V-tolerant GPIO with pull-up, push-pull/open-drain and low/mid/high drive; alternates CMP4_INM3, EIRQ12, EXMC_DATA9.
76 PE13 bidirectional 5V-tolerant GPIO with pull-up, push-pull/open-drain and low/mid/high drive; alternates CMP4_INM4, EIRQ13, EXMC_DATA10.
77 PE14 bidirectional 5V-tolerant GPIO with pull-up, push-pull/open-drain and low/mid/high drive; alternates CMP4_INP3, EIRQ14, EXMC_DATA11.
78 PE15 bidirectional 5V-tolerant GPIO with pull-up, push-pull/open-drain and low/mid/high drive; alternates CMP4_INP4, EIRQ15, EXMC_DATA12.
79 PB10 bidirectional 5V-tolerant GPIO with pull-up, push-pull/open-drain and low/mid/high drive; alternates EIRQ10, ADTRG2, ETH_MII_RXER.
80 PB11 bidirectional 5V-tolerant GPIO with pull-up, push-pull/open-drain and low/mid/high drive; alternates EIRQ11, USBHS_ULPI_D4, ETH_MII_RMII_TXEN.
81 VCAP_1 passive Core voltage stabilisation pin; connect a 0.047 µF or 0.1 µF external capacitor with ESR below 0.3 Ω near VSS.
82 VCC power_in Power supply 1.8 to 3.6 V; decouple to the nearest VSS pin.
83 PH6 bidirectional 5V-tolerant GPIO with pull-up, push-pull/open-drain and low/mid/high drive; alternates EIRQ6, EXMC_CE1, DVP_DATA8.
84 PH7 bidirectional 5V-tolerant GPIO with pull-up, push-pull/open-drain and low/mid/high drive; alternates EIRQ7, EXMC_ALE, DVP_DATA9.
85 PH8 bidirectional 5V-tolerant GPIO with pull-up, push-pull/open-drain and low/mid/high drive; alternates EIRQ8, EXMC_DATA16, DVP_HSYNC.
86 PH9 bidirectional 5V-tolerant GPIO with pull-up, push-pull/open-drain and low/mid/high drive; alternates EIRQ9, EXMC_DATA17, DVP_DATA0.
87 PH10 bidirectional 5V-tolerant GPIO with pull-up, push-pull/open-drain and low/mid/high drive; alternates EIRQ10, EXMC_DATA18, DVP_DATA1.
88 PH11 bidirectional 5V-tolerant GPIO with pull-up, push-pull/open-drain and low/mid/high drive; alternates EIRQ11, EXMC_DATA19, DVP_DATA2.
89 PH12 bidirectional 5V-tolerant GPIO with pull-up, push-pull/open-drain and low/mid/high drive; alternates EIRQ12, EXMC_DATA20, DVP_DATA3.
90 VSS power_in Ground, 0 V reference for the device supply.
91 VCC power_in Power supply 1.8 to 3.6 V; decouple to the nearest VSS pin.
92 PB12 bidirectional 5V-tolerant GPIO with pull-up, push-pull/open-drain and low/mid/high drive; alternates EIRQ12, VCOUT1, USBHS_ULPI_D5.
93 PB13 bidirectional 5V-tolerant GPIO with pull-up, push-pull/open-drain and low/mid/high drive; alternates EIRQ13, VCOUT2, USBHS_ULPI_D6.
94 PB14 bidirectional Not 5V tolerant GPIO, input must not exceed VCC; alternates USBHS_DM, EIRQ14, VCOUT3.
95 PB15 bidirectional Not 5V tolerant GPIO, input must not exceed VCC; alternates USBHS_DP, EIRQ15, RTC_OUT.
96 PD8 bidirectional 5V-tolerant GPIO with pull-up, push-pull/open-drain and low/mid/high drive; alternates EIRQ8, VCOUT4, EXMC_DATA13.
97 PD9 bidirectional 5V-tolerant GPIO with pull-up, push-pull/open-drain and low/mid/high drive; alternates EIRQ9, VCOUT3, EXMC_DATA14.
98 PD10 bidirectional 5V-tolerant GPIO with pull-up, push-pull/open-drain and low/mid/high drive; alternates EIRQ10, CAN2_TST_SAMPLE, EXMC_DATA15.
99 PD11 bidirectional 5V-tolerant GPIO with pull-up, push-pull/open-drain and low/mid/high drive; alternates EIRQ11, CAN2_TST_CLOCK, EXMC_ADD16.
100 PD12 bidirectional 5V-tolerant GPIO with pull-up, push-pull/open-drain and low/mid/high drive; alternates EIRQ12, EXMC_ADD17.
101 PD13 bidirectional 5V-tolerant GPIO with pull-up, push-pull/open-drain and low/mid/high drive; alternates EIRQ13, EXMC_ADD18.
102 VSS power_in Ground, 0 V reference for the device supply.
103 VCC power_in Power supply 1.8 to 3.6 V; decouple to the nearest VSS pin.
104 PD14 bidirectional 5V-tolerant GPIO with pull-up, push-pull/open-drain and low/mid/high drive; alternates EIRQ14, ADTRG1, EXMC_DATA0.
105 PD15 bidirectional 5V-tolerant GPIO with pull-up, push-pull/open-drain and low/mid/high drive; alternates EIRQ15, ADTRG2, EXMC_DATA1.
106 PG2 bidirectional 5V-tolerant GPIO with pull-up, push-pull/open-drain and low/mid/high drive; alternates EIRQ2, ADTRG3, EXMC_ADD12.
107 PG3 bidirectional 5V-tolerant GPIO with pull-up, push-pull/open-drain and low/mid/high drive; alternates EIRQ3, TIMA_9_TRIG, EXMC_ADD13.
108 PG4 bidirectional 5V-tolerant GPIO with pull-up, push-pull/open-drain and low/mid/high drive; alternates EIRQ4, TIMA_9_PWM1, EXMC_ADD14.
109 PG5 bidirectional 5V-tolerant GPIO with pull-up, push-pull/open-drain and low/mid/high drive; alternates EIRQ5, TIMA_9_PWM2, EXMC_ADD15.
110 PG6 bidirectional 5V-tolerant GPIO with pull-up, push-pull/open-drain and low/mid/high drive; alternates EIRQ6, TIMA_9_PWM3, EXMC_RB0.
111 PG7 bidirectional 5V-tolerant GPIO with pull-up, push-pull/open-drain and low/mid/high drive; alternates EIRQ7, TIMA_9_PWM4, USART8_CK.
112 PG8 bidirectional 5V-tolerant GPIO with pull-up, push-pull/open-drain and low/mid/high drive; alternates EIRQ8, USART8_RTS, ETH_PPS_OUT.
113 VSS power_in Ground, 0 V reference for the device supply.
114 VCC power_in Power supply 1.8 to 3.6 V; decouple to the nearest VSS pin.
115 PC6 bidirectional 5V-tolerant GPIO with pull-up, push-pull/open-drain and low/mid/high drive; alternates EIRQ6, CTCREF, SDIO1_D6, DVP_DATA0.
116 PC7 bidirectional 5V-tolerant GPIO with pull-up, push-pull/open-drain and low/mid/high drive; alternates EIRQ7, TIM4_2_OVH, I2S2_EXCK, SDIO1_D7.
117 PC8 bidirectional 5V-tolerant GPIO with pull-up, push-pull/open-drain and low/mid/high drive; alternates EIRQ8, KEYOUT1, SDIO1_D0, DVP_DATA2.
118 PC9 bidirectional 5V-tolerant GPIO with pull-up, push-pull/open-drain and low/mid/high drive; alternates EIRQ9, MCO_2, KEYOUT0, SDIO1_D1.
119 PA8 bidirectional 5V-tolerant GPIO with pull-up, push-pull/open-drain and low/mid/high drive; alternates EIRQ8/WKUP2_0, MCO_1, USBFS_SOF.
120 PA9 bidirectional 5V-tolerant GPIO with pull-up, push-pull/open-drain and low/mid/high drive; alternates EIRQ9/WKUP2_1, SDIO1_D2, USBFS_VBUS.
121 PA10 bidirectional 5V-tolerant GPIO with pull-up, push-pull/open-drain and low/mid/high drive; alternates EIRQ10/WKUP2_2, SDIO1_CD, USBFS_ID, DVP_DATA1.
122 PA11 bidirectional Not 5V tolerant GPIO, input must not exceed VCC; alternates USBFS_DM, EIRQ11/WKUP2_3, SDIO2_CD.
123 PA12 bidirectional Not 5V tolerant GPIO, input must not exceed VCC; alternates USBFS_DP, EIRQ12/WKUP3_0, SDIO2_WP.
124 PA13 bidirectional 5V-tolerant GPIO with pull-up, push-pull/open-drain and low/mid/high drive; alternates JTMS_SWDIO, EIRQ13, SDIO2_D3.
125 VCAP_2 passive Core voltage stabilisation pin; connect a 0.047 µF or 0.1 µF external capacitor with ESR below 0.3 Ω near VSS.
126 VSS power_in Ground, 0 V reference for the device supply.
127 VCC power_in Power supply 1.8 to 3.6 V; decouple to the nearest VSS pin.
128 PH13 bidirectional 5V-tolerant GPIO with pull-up, push-pull/open-drain and low/mid/high drive; alternates EIRQ13, EXMC_DATA21.
129 PH14 bidirectional 5V-tolerant GPIO with pull-up, push-pull/open-drain and low/mid/high drive; alternates EIRQ14, EXMC_DATA22, DVP_DATA4.
130 PH15 bidirectional 5V-tolerant GPIO with pull-up, push-pull/open-drain and low/mid/high drive; alternates EIRQ15, EXMC_DATA23, DVP_DATA11.
131 PI0 bidirectional 5V-tolerant GPIO with pull-up, push-pull/open-drain and low/mid/high drive; alternates EIRQ0, EXMC_DATA24, SPI2_NSS0.
132 PI1 bidirectional 5V-tolerant GPIO with pull-up, push-pull/open-drain and low/mid/high drive; alternates EIRQ1, TIMA_8_TRIG, EXMC_DATA25.
133 PI2 bidirectional 5V-tolerant GPIO with pull-up, push-pull/open-drain and low/mid/high drive; alternates EIRQ2, TIM6_8_PWMB, EXMC_DATA26.
134 PI3 bidirectional 5V-tolerant GPIO with pull-up, push-pull/open-drain and low/mid/high drive; alternates EIRQ3, TIM4_2_CLK, EXMC_DATA27.
135 VSS power_in Ground, 0 V reference for the device supply.
136 VCC power_in Power supply 1.8 to 3.6 V; decouple to the nearest VSS pin.
137 PA14 bidirectional 5V-tolerant GPIO with pull-up, push-pull/open-drain and low/mid/high drive; alternates JTCK_SWCLK, EIRQ14/WKUP3_2, SDIO2_D2.
138 PA15 bidirectional 5V-tolerant GPIO with pull-up, push-pull/open-drain and low/mid/high drive; alternates JTDI, EIRQ15/WKUP3_3, SDIO2_D1.
139 PC10 bidirectional 5V-tolerant GPIO with pull-up, push-pull/open-drain and low/mid/high drive; alternates EIRQ10, CAN1_TST_SAMPLE, SDIO1_D2, DVP_DATA8.
140 PC11 bidirectional 5V-tolerant GPIO with pull-up, push-pull/open-drain and low/mid/high drive; alternates EIRQ11, CAN1_TST_CLOCK, SDIO1_D3, DVP_DATA4.
141 PC12 bidirectional 5V-tolerant GPIO with pull-up, push-pull/open-drain and low/mid/high drive; alternates EIRQ12, KEYOUT1, SDIO1_CK, DVP_DATA9.
142 PD0 bidirectional 5V-tolerant GPIO with pull-up, push-pull/open-drain and low/mid/high drive; alternates EIRQ0, VCOUT, KEYOUT2, EXMC_DATA2.
143 PD1 bidirectional 5V-tolerant GPIO with pull-up, push-pull/open-drain and low/mid/high drive; alternates EIRQ1, KEYOUT3, EXMC_DATA3.
144 PD2 bidirectional 5V-tolerant GPIO with pull-up, push-pull/open-drain and low/mid/high drive; alternates EIRQ2, VCOUT4, KEYOUT4, SDIO1_CMD.
145 PD3 bidirectional 5V-tolerant GPIO with pull-up, push-pull/open-drain and low/mid/high drive; alternates EIRQ3, VCOUT1, KEYOUT5, EXMC_CLK.
146 PD4 bidirectional 5V-tolerant GPIO with pull-up, push-pull/open-drain and low/mid/high drive; alternates EIRQ4, VCOUT2, KEYOUT6, EXMC_OE.
147 PD5 bidirectional 5V-tolerant GPIO with pull-up, push-pull/open-drain and low/mid/high drive; alternates EIRQ5, VCOUT3, KEYOUT7, EXMC_WE.
148 VSS power_in Ground, 0 V reference for the device supply.
149 VCC power_in Power supply 1.8 to 3.6 V; decouple to the nearest VSS pin.
150 PD6 bidirectional 5V-tolerant GPIO with pull-up, push-pull/open-drain and low/mid/high drive; alternates EIRQ6, ADTRG1, EXMC_RB0, DVP_DATA10.
151 PD7 bidirectional 5V-tolerant GPIO with pull-up, push-pull/open-drain and low/mid/high drive; alternates EIRQ7, ADTRG2, EXMC_CE0.
152 PG9 bidirectional 5V-tolerant GPIO with pull-up, push-pull/open-drain and low/mid/high drive; alternates EIRQ9, ADTRG3, EXMC_CE1, DVP_VSYNC.
153 PG10 bidirectional 5V-tolerant GPIO with pull-up, push-pull/open-drain and low/mid/high drive; alternates EIRQ10, EXMC_CE2, DVP_DATA2.
154 PG11 bidirectional 5V-tolerant GPIO with pull-up, push-pull/open-drain and low/mid/high drive; alternates EIRQ11, EXMC_RB7, DVP_DATA3, ETH_MII_RMII_TXEN.
155 PG12 bidirectional 5V-tolerant GPIO with pull-up, push-pull/open-drain and low/mid/high drive; alternates EIRQ12, EXMC_CE3.
156 PG13 bidirectional 5V-tolerant GPIO with pull-up, push-pull/open-drain and low/mid/high drive; alternates EIRQ13, EXMC_ADD24, DVP_VSYNC.
157 PG14 bidirectional 5V-tolerant GPIO with pull-up, push-pull/open-drain and low/mid/high drive; alternates EIRQ14, EXMC_ADD25, DVP_DATA2.
158 VSS power_in Ground, 0 V reference for the device supply.
159 VCC power_in Power supply 1.8 to 3.6 V; decouple to the nearest VSS pin.
160 PG15 bidirectional 5V-tolerant GPIO with pull-up, push-pull/open-drain and low/mid/high drive; alternates EIRQ15, EXMC_BAA, DVP_DATA13.
161 PB3 bidirectional 5V-tolerant GPIO with pull-up, push-pull/open-drain and low/mid/high drive; alternates JTDO_SWO, EIRQ3/WKUP0_3, FCMREF, SDIO2_D0.
162 PB4 bidirectional 5V-tolerant GPIO with pull-up, push-pull/open-drain and low/mid/high drive; alternates NJTRST, EIRQ4/WKUP1_0, SDIO1_D0, DVP_DATA13.
163 PB5 bidirectional 5V-tolerant GPIO with pull-up, push-pull/open-drain and low/mid/high drive; alternates EIRQ5/WKUP1_1, ADTRG3, USBHS_ULPI_D7, EXMC_ALE.
164 PB6 bidirectional 5V-tolerant GPIO with pull-up, push-pull/open-drain and low/mid/high drive; alternates EIRQ6/WKUP1_2, ADTRG2, SDIO2_CK, EXMC_CE1.
165 PB7 bidirectional 5V-tolerant GPIO with pull-up, push-pull/open-drain and low/mid/high drive; alternates EIRQ7/WKUP1_3, ADTRG1, SDIO1_D0, EXMC_ADV.
166 PI13/MD input Mode input; must be held low when NRST is released, and a 4.7 kΩ pull-down to VSS is recommended; also USART3_TX.
167 PB8 bidirectional 5V-tolerant GPIO with pull-up, push-pull/open-drain and low/mid/high drive; alternates EIRQ8, USBFS_DRVVBUS, SDIO1_D4, DVP_DATA6.
168 PB9 bidirectional 5V-tolerant GPIO with pull-up, push-pull/open-drain and low/mid/high drive; alternates EIRQ9, SDIO1_D5, ETH_MII_TXD2, DVP_DATA7.
169 PE0 bidirectional 5V-tolerant GPIO with pull-up, push-pull/open-drain and low/mid/high drive; alternates EIRQ0, MCO_1, ETH_MII_RMII_TXD1, EXMC_CE4.
170 PE1 bidirectional 5V-tolerant GPIO with pull-up, push-pull/open-drain and low/mid/high drive; alternates EIRQ1, MCO_2, ETH_MII_RMII_TXD0, EXMC_CE5.
171 PI12 bidirectional 5V-tolerant GPIO with pull-up, push-pull/open-drain and low/mid/high drive; alternates EIRQ12, EXMC_CLE.
172 VCC power_in Power supply 1.8 to 3.6 V; decouple to the nearest VSS pin.
173 PI4 bidirectional 5V-tolerant GPIO with pull-up, push-pull/open-drain and low/mid/high drive; alternates EIRQ4, EMB_PORT4, EXMC_CE6, DVP_DATA5.
174 PI5 bidirectional 5V-tolerant GPIO with pull-up, push-pull/open-drain and low/mid/high drive; alternates EIRQ5, EXMC_CE7, DVP_VSYNC.
175 PI6 bidirectional 5V-tolerant GPIO with pull-up, push-pull/open-drain and low/mid/high drive; alternates EIRQ6, EXMC_DATA28, DVP_DATA6.
176 PI7 bidirectional 5V-tolerant GPIO with pull-up, push-pull/open-drain and low/mid/high drive; alternates EIRQ7, EXMC_DATA29, DVP_DATA7.

Key specifications

Parameter Value
Manufacturer HDSC
Package LQFP-176(24x24)
Category Embedded Processors & Controllers
Pins 176

Electrical characteristics

Limits as printed in the datasheet (page.json metadata.characteristics carries them as data).

Parameter Symbol Min Typ Max Unit Conditions Page
System supply voltage Vcc VCC 1.8 3.6 V 2
Operating ambient temperature -40 105 °C 14
VBAT low voltage monitor threshold VBATLVD 1.7 1.8 1.9 V PWC_PWRC4.VBATREFSEL=0 130
VBAT low voltage monitor threshold VBATLVD 2 2.1 2.2 V PWC_PWRC4.VBATREFSEL=1 130
I/O input leakage current ILKG 1 µA VSS≤VIN≤VCC 87
I/O input leakage current ILKG 10 µA VIN = 5.5V 87
I/O pin capacitance CIO 10 pF PA11/USBFS_DM, PA12/USBFS_DP, PB14/USBHS_DM, PB15/USBHS_DP 87
I/O pin capacitance CIO 5 pF other input pins (not USB DM/DP pins) 87
Low-level output voltage VOL 0.6 V Low drive, IIO=1.5mA, 1.8≤VCC<2.7 89
Low-level output voltage VOL 1.3 V Low drive, IIO=6mA, 2.7≤VCC≤3.6 89
Low-level output voltage VOL 0.4 V Medium drive, IIO=3mA, 1.8≤VCC<2.7 89
I2C SCL frequency fSCL 0 100 kHz Standard mode (SM) 92
I2C SCL frequency fSCL 0 400 kHz Fast mode (FM) 92
I2C hold time START/repeated START tHD;STA 4 us Standard mode (SM) 92
I2C hold time START/repeated START tHD;STA 0.6 us Fast mode (FM) 92
I2C SCL low period tLOW 4.7 us Standard mode (SM) 92
I2C SCL low period tLOW 1.3 us Fast mode (FM) 92
I2C SCL high period tHIGH 4 us Standard mode (SM) 92
I2C SCL high period tHIGH 0.6 us Fast mode (FM) 92
I2C repeated START setup time tSU;STA 4.7 us Standard mode (SM) 92
I2C repeated START setup time tSU;STA 0.6 us Fast mode (FM) 92
I2C data hold time tHD;DAT 0 us Standard mode (SM) 92
I2C SCL/SDA rise time tR 1000 ns Standard mode (SM) 92
I2C SCL/SDA rise time tR 6.5 300 ns Fast mode (FM) 92
I2C SCL/SDA fall time tF 300 ns Standard mode (SM) 92
I2C SCL/SDA fall time tF 6.5 300 ns Fast mode (FM) 92
I2C STOP setup time tSU;STO 4 us Standard mode (SM) 92
I2C STOP setup time tSU;STO 0.6 us Fast mode (FM) 92
I2C bus free time between STOP and START tBUF 4.7 us Standard mode (SM) 92
I2C bus free time between STOP and START tBUF 1.3 us Fast mode (FM) 92
I2C load capacitance Cb 400 pF Standard mode (SM) 92
SPI data input setup time tsu(SI) 4 ns slave mode, 1.8V≤Vcc≤3.6V 93
SPI data input hold time th(SI) 3 ns slave mode, 1.8V≤Vcc≤3.6V 93
SPI data output valid time tv(SO) 15 ns slave mode, 2.7V≤Vcc≤3.6V 93
SPI data output valid time tv(SO) 26 ns slave mode, 1.8V≤Vcc<2.7V 93
SPI data input setup time tsu(MI) 5 ns master mode, 2.7V≤Vcc≤3.6V 93
SPI data input setup time tsu(MI) 9 ns master mode, 1.8V≤Vcc<2.7V 93
SPI data output valid time tv(MO) 4 ns master mode, 2.7V≤Vcc≤3.6V 94
SPI data output valid time tv(MO) 9 ns master mode, 1.8V≤Vcc≤2.7V 94
QSPI clock cycle tQscyc 2 48 thclk QSPCK clock cycle 96
QSPI data input setup time tSU 5 ns 2.7V~3.6V 96
QSPI data input hold time tIH 11 ns 2.7V~3.6V 96
QSPI data output delay tOD 4 ns data output delay 96
QSPI data output hold time tOH 0 ns data output hold time 96
USB low-level input voltage VIL 0.8 V USB Full-Speed 100
USB high-level input voltage VIH 2 V USB Full-Speed 100
USB differential input sensitivity VDI 0.2 V USB Full-Speed 100
USB static output low voltage VOL 0.3 V RL=1.5kΩ to 3.6V 100
USB static output high voltage VOH 2.8 3.6 V RL=15kΩ to VSS 100
USB pull-up resistance (device mode) RPU 1.425 2.3 3.09 kΩ VIN= VSS, in device mode 100
USB output impedance ZDRV 28 36 44 Ω Driving high or low 100

CAD (KiCad official)

  • Symbol: HC32F4A0SITB-LQFP176
  • Footprint: Package_QFP:LQFP-176_24x24mm_P0.5mm
  • 3D model: LQFP-176(24x24) (KiCad packages3D, STEP)
  • 3D model files: hc32f4a0sitb-lqfp176-etched.step / hc32f4a0sitb-lqfp176-etched.glb carry the MPN laser-etched on the die in a toggleable Adom.LaserEtch group (Fusion-ready); hc32f4a0sitb-lqfp176.step / hc32f4a0sitb-lqfp176.glb are the bare package body.

Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

  • Datasheet: HDSC datasheet (145 pp, sha256 c971eaaaa12f48ef, retrieved 2026-10-27, tier: lcsc)
  • Datasheet language: Chinese. Pin names, descriptions, and specs on this page were extracted and translated to English by ds2sf; the linked PDF is the manufacturer original.
  • Extractor: parts-factory 2.0.0 / extract_pins 0.3, primary claude-haiku-5-5 (text), consensus claude-sonnet-5-5 (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
  • CAD: KiCad official libraries (CC-BY-SA 4.0).

Datasheet PDF