component
HC32F460KCTA-LQFP64
Public Made by Adomby adom
HDSC Other Processors and Microcontrollers (MCUs), LQFP-64(10x10). Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.
3D Model
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Symbol & Footprint
Schematic Symbol
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PCB Footprint
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Datasheet
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README
markdownHC32F460KCTA-LQFP64
HDSC · Other Processors and Microcontrollers (MCUs) · LQFP-64(10x10)
HC32F460KCTA-LQFP64 from HDSC, in a LQFP-64(10x10). Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.
Pinout
| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | PH2 | bidirectional | General-purpose I/O port H bit 2 (5V tolerant) with EIRQ2, FCMREF, TIM4_2_CLK, TIMA_4_PWM7, EMB_IN4, SDIO2_D4 and I2S3_EXCK alternate functions. |
| 2 | PC13 | bidirectional | General-purpose I/O PC13 (5V tolerant) with EIRQ13, RTC_OUT, TIMA_4_PWM8, SDIO2_CK and I2S3_MCK alternate functions. |
| 3 | PC14/XTAL32_OUT | bidirectional | General-purpose I/O PC14 (EIRQ14) that is also the output of the 32 kHz external oscillator (XTAL32_OUT). |
| 4 | PC15/XTAL32_IN | bidirectional | General-purpose I/O PC15 (EIRQ15) that is also the input of the 32 kHz external oscillator (XTAL32_IN). |
| 5 | PH0/XTAL_IN | bidirectional | General-purpose I/O PH0 (EIRQ0) that is also the external main clock oscillator input XTAL_IN (4-25 MHz crystal). |
| 6 | PH1/XTAL_OUT | bidirectional | General-purpose I/O PH1 (EIRQ1) that is also the external main clock oscillator output XTAL_OUT. |
| 7 | NRST | input | Active-low reset input; connect a pull-up resistor to VCC when unused. |
| 8 | PC0/ADC12_IN10 | bidirectional | General-purpose I/O PC0 with ADC12_IN10, CMP3_INP3, EIRQ0, TIMA_2_PWM5, SDIO2_D5 alternate functions; analog input voltage must not exceed VREFH/AVCC. |
| 9 | PC1/ADC12_IN11 | bidirectional | General-purpose I/O PC1 with ADC12_IN11, EIRQ1, TIMA_2_PWM6, SDIO2_D6 alternate functions; analog input voltage must not exceed VREFH/AVCC. |
| 10 | PC2/ADC1_IN12 | bidirectional | General-purpose I/O PC2 with ADC1_IN12, EIRQ2, TIMA_2_PWM7, EMB_IN3, SDIO2_D7 alternate functions; analog input voltage must not exceed VREFH/AVCC. |
| 11 | PC3/ADC1_IN13 | bidirectional | General-purpose I/O PC3 with ADC1_IN13, CMP1_INM2, EIRQ3, TIMA_2_PWM8, SDIO1_WP alternate functions; analog input voltage must not exceed VREFH/AVCC. |
| 12 | AVSS/VREFL | power_in | Analog ground and reference low voltage; connect to the same potential as VSS (short to VSS when analog modules are unused). |
| 13 | AVCC/VREFH | power_in | Analog supply and ADC reference voltage input, 1.8-3.6 V at the same voltage as VCC (short to VCC when analog modules are unused). |
| 14 | PA0/ADC1_IN0 | bidirectional | General-purpose I/O PA0 with ADC1_IN0, CMP1_INP1, EIRQ0/WKUP0_0, TIM4_2_OUH, TIMA_2_PWM1 alternate functions. |
| 15 | PA1/ADC1_IN1 | bidirectional | General-purpose I/O PA1 with ADC1_IN1, CMP1_INP2, EIRQ1, TIM4_2_OUL, TIMA_2_PWM2 alternate functions. |
| 16 | PA2/ADC1_IN2 | bidirectional | General-purpose I/O PA2 with ADC1_IN2, CMP1_INP3, EIRQ2, TIM4_2_OVH, TIMA_2_PWM3 alternate functions. |
| 17 | PA3/ADC1_IN3 | bidirectional | General-purpose I/O PA3 with ADC1_IN3, PGAVSS, CMP1_INP4, EIRQ3, TIM4_2_OVL alternate functions. |
| 18 | AVSS | power_in | Analog supply ground; connect to the same potential as VSS. |
| 19 | AVCC | power_in | Analog supply for the analog modules, 1.8-3.6 V at the same voltage as VCC. |
| 20 | PA4/ADC12_IN4 | bidirectional | General-purpose I/O PA4 with ADC12_IN4, CMP2_INP1, CMP3_INP4, EIRQ4, TIM4_2_OWH, USART2_CK, KEYOUT0 alternate functions. |
| 21 | PA5/ADC12_IN5 | bidirectional | General-purpose I/O PA5 with ADC12_IN5, CMP2_INP2, EIRQ5, TIM4_2_OWL, KEYOUT1 alternate functions. |
| 22 | PA6/ADC12_IN6 | bidirectional | General-purpose I/O PA6 with ADC12_IN6, CMP2_INP3, EIRQ6, EMB_IN2, KEYOUT2, SDIO1_CMD alternate functions. |
| 23 | PA7/ADC12_IN7 | bidirectional | General-purpose I/O PA7 with ADC12_IN7, CMP1/2/3_INM1, EIRQ7, TIM4_1_OUL, TIM6_1_PWMB, KEYOUT3 alternate functions. |
| 24 | PC4/ADC1_IN14 | bidirectional | General-purpose I/O PC4 with ADC1_IN14, CMP2_INM2, EIRQ4, TIM4_2_OUH, USART1_CK, SDIO2_CD alternate functions. |
| 25 | PC5/ADC1_IN15 | bidirectional | General-purpose I/O PC5 with ADC1_IN15, CMP3_INM2, EIRQ5, TIM4_2_OUL, SDIO2_CMD alternate functions. |
| 26 | PB0/ADC12_IN8 | bidirectional | General-purpose I/O PB0 with ADC12_IN8, CMP3_INP1, EIRQ0, TIM4_1_OVL, TIM6_2_PWMB, USART4_CK, KEYOUT4 alternate functions. |
| 27 | PB1/ADC12_IN9 | bidirectional | General-purpose I/O PB1 with ADC12_IN9, CMP3_INP2, EIRQ1/WKUP0_1, TIM4_1_OWL, QSPI_QSSN, KEYOUT5 alternate functions. |
| 28 | PB2/PVD2EXINP | bidirectional | General-purpose I/O PB2 that is also the PVD2 external comparison voltage input (PVD2EXINP), with EIRQ2/WKUP0_2 and QSPI_QSIO3. |
| 29 | PB10 | bidirectional | General-purpose I/O PB10 with EIRQ10, ADTRG2, TIM4_2_OVH, QSPI_QSIO2, SDIO1_D7, I2S3_EXCK alternate functions. |
| 30 | VCAP_1 | passive | Core voltage pin; connect a 0.047/0.1/0.22 µF capacitor (ESR < 0.3 Ω) close to VSS to stabilize the core voltage. |
| 31 | VSS | power_in | Digital supply ground, 0 V. |
| 32 | VCC | power_in | Digital supply, 1.8-3.6 V, decoupled with capacitors close to VSS. |
| 33 | PB12 | bidirectional | General-purpose I/O PB12 with EIRQ12, VCOUT1, TIM4_2_OVL, TIM6_TRIGB, QSPI_QSIO1, SDIO2_D1, I2S3_MCK alternate functions. |
| 34 | PB13 | bidirectional | General-purpose I/O PB13 with EIRQ13, VCOUT2, TIM4_1_OUL, TIM6_1_PWMB, QSPI_QSIO0, SDIO2_D0 alternate functions. |
| 35 | PB14 | bidirectional | General-purpose I/O PB14 with EIRQ14, VCOUT3, TIM4_1_OVL, TIM6_2_PWMB, QSPI_QSCK, SDIO1_D6 alternate functions. |
| 36 | PB15 | bidirectional | General-purpose I/O PB15 with EIRQ15, RTC_OUT, TIM4_1_OWL, TIM6_3_PWMB, EMB_IN4, USART3_CK, SDIO1_CK alternate functions. |
| 37 | PC6 | bidirectional | General-purpose I/O PC6 with EIRQ6, TIMA_3_PWM1, QSPI_QSCK, KEYOUT3, SDIO1_D6 alternate functions. |
| 38 | PC7 | bidirectional | General-purpose I/O PC7 with EIRQ7, TIM4_2_CLK, QSPI_QSSN, KEYOUT2, SDIO1_D7, I2S2_EXCK alternate functions. |
| 39 | PC8 | bidirectional | General-purpose I/O PC8 with EIRQ8, TIM4_2_OWH, USART3_CK, KEYOUT1, SDIO1_D0, I2S2_MCK alternate functions. |
| 40 | PC9 | bidirectional | General-purpose I/O PC9 with EIRQ9, MCO_2, TIM4_2_OWL, KEYOUT0, SDIO1_D1 alternate functions. |
| 41 | PA8 | bidirectional | General-purpose I/O PA8 with EIRQ8/WKUP2_0, MCO_1, TIM4_1_OUH, USART1_CK, SDIO1_D1, USBFS_SOF alternate functions. |
| 42 | PA9/USBFS_VBUS | bidirectional | General-purpose I/O PA9 that is also the USB FS VBUS signal input, with EIRQ9/WKUP2_1. |
| 43 | PA10/USBFS_ID | bidirectional | General-purpose I/O PA10 that is also the USB FS ID signal input, with EIRQ10/WKUP2_2. |
| 44 | PA11/USBFS_DM | bidirectional | General-purpose I/O PA11 that is also the USB FS on-chip PHY D- signal; not 5V tolerant (input max VCC+0.3 V). |
| 45 | PA12/USBFS_DP | bidirectional | General-purpose I/O PA12 that is also the USB FS on-chip PHY D+ signal; not 5V tolerant (input max VCC+0.3 V). |
| 46 | PA13/JTMS_SWDIO | bidirectional | General-purpose I/O PA13 that is also the JTAG JTMS / SWD SWDIO debug data pin, with EIRQ13/WKUP3_1. |
| 47 | VSS | power_in | Digital supply ground, 0 V. |
| 48 | VCC | power_in | Digital supply, 1.8-3.6 V, decoupled with capacitors close to VSS. |
| 49 | PA14/JTCK_SWCLK | bidirectional | General-purpose I/O PA14 that is also the JTAG JTCK / SWD SWCLK debug clock input, with EIRQ14/WKUP3_2. |
| 50 | PA15/JTDI | bidirectional | General-purpose I/O PA15 that is also the JTAG JTDI input, with EIRQ15/WKUP3_3. |
| 51 | PC10 | bidirectional | General-purpose I/O PC10 with EIRQ10, TIM4_3_OUH, TIMA_2_PWM7, SDIO1_D2 alternate functions. |
| 52 | PC11 | bidirectional | General-purpose I/O PC11 with EIRQ11, TIM4_3_OVH, TIMA_2_PWM8, SDIO1_D3 alternate functions. |
| 53 | PC12 | bidirectional | General-purpose I/O PC12 with EIRQ12, TIM4_3_OWH, TIMA_4_TRIG, SDIO1_CK alternate functions. |
| 54 | PD2 | bidirectional | General-purpose I/O PD2 with EIRQ2, TIMA_2_PWM4, TIMA_6_PWM6, SDIO1_CMD alternate functions. |
| 55 | PB3/JTDO_TRACESWO | bidirectional | General-purpose I/O PB3 that is also the JTAG JTDO / TRACESWO output, with EIRQ3/WKUP0_3. |
| 56 | PB4/NJTRST | bidirectional | General-purpose I/O PB4 that is also the JTAG NJTRST input, with EIRQ4/WKUP1_0. |
| 57 | PB5 | bidirectional | General-purpose I/O PB5 with EIRQ5/WKUP1_1, TIM4_3_OWH, SDIO1_D3, I2S4_EXCK alternate functions. |
| 58 | PB6 | bidirectional | General-purpose I/O PB6 with EIRQ6/WKUP1_2, ADTRG2, TIM4_3_OVL, SDIO2_CK, I2S4_MCK alternate functions. |
| 59 | PB7 | bidirectional | General-purpose I/O PB7 with EIRQ7/WKUP1_3, ADTRG1, TIM4_3_OVH, SDIO1_D0 alternate functions. |
| 60 | PB11/MD | input | Input-only mode pin (MD) with NMI; must be held high when NRST is released, pull up to VCC with about 4.7 kΩ. |
| 61 | PB8 | bidirectional | General-purpose I/O PB8 with EIRQ8, TIM4_3_OUL, KEYOUT7, SDIO1_D4, USBFS_DRVVBUS alternate functions. |
| 62 | PB9 | bidirectional | General-purpose I/O PB9 with EIRQ9, TIM4_3_OUH, TIMA_6_TRIG, SPI2_SS1, KEYOUT6, SDIO1_D5 alternate functions. |
| 63 | VSS | power_in | Digital supply ground, 0 V. |
| 64 | VCC | power_in | Digital supply, 1.8-3.6 V, decoupled with capacitors close to VSS. |
Key specifications
| Parameter | Value |
|---|---|
| Manufacturer | HDSC |
| Package | LQFP-64(10x10) |
| Category | Embedded Processors & Controllers |
| Pins | 64 |
Electrical characteristics
Limits as printed in the datasheet (page.json metadata.characteristics carries them as data).
| Parameter | Symbol | Min | Typ | Max | Unit | Conditions | Page |
|---|---|---|---|---|---|---|---|
| Supply voltage range | VCC | 1.8 | 3.6 | V | 12 | ||
| Operating temperature range (suffix A) | -40 | 85 | °C | industrial grade A | 12 | ||
| USB FS operating voltage | VCC | 3 | 3.6 | V | USB Full-Speed | 79 | |
| USB FS input low level | VIL | 0.8 | V | 79 | |||
| USB FS input high level | VIH | 2 | V | 79 | |||
| USB FS differential input sensitivity | VDI | 0.2 | V | 79 | |||
| USB FS differential common mode voltage | VCM | 0.8 | 2.5 | V | 79 | ||
| USB FS static output low level | VOL | 0.3 | V | RL=1.5kΩ to 3.6V | 79 | ||
| USB FS static output high level | VOH | 2.8 | 3.6 | V | RL=15kΩ to VSS | 79 | |
| USB FS cross-over voltage | VCRS | 1.3 | 2 | V | CL=50pF | 79 | |
| USB FS rise time | tR | 4 | 20 | ns | CL=50pF, 10%~90% of /VOH-VOL/ | 79 | |
| USB FS fall time | tF | 4 | 20 | ns | CL=50pF, 10%~90% of /VOH-VOL/ | 79 | |
| USB FS rise/fall time ratio | tRFMA | 90 | 111.1 | % | CL=50pF | 79 | |
| USB FS pull-down resistance | RPD | 15 | kΩ | VIN=VCC, in host mode | 79 | ||
| USB FS pull-up resistance, idle | RPU | 0.9 | 1.2 | 1.575 | kΩ | VIN=VSS, idle state | 79 |
| USB FS pull-up resistance, device mode | RPU | 1.425 | 2.3 | 3.09 | kΩ | VIN=VSS, in device mode | 79 |
| USB LS cross-over voltage | VCRS | 1.3 | 2 | V | CL=200pF~600pF | 80 | |
| USB LS rise time | tR | 75 | 300 | ns | CL=200pF~600pF, 10%~90% of /VOH-VOL/ | 80 | |
| USB LS fall time | tF | 75 | 300 | ns | CL=200pF~600pF, 10%~90% of /VOH-VOL/ | 80 | |
| USB LS pull-down resistance | RPD | 14.25 | 24.8 | kΩ | VIN=VCC, in host mode | 80 | |
| PLL PFD input clock | fPLL_IN | 1 | 25 | MHz | 81 | ||
| PLL multiplier output clock | fPLL_OUT | 15 | 240 | MHz | 81 | ||
| PLL VCO output | fVCO_OUT | 240 | 480 | MHz | 81 | ||
| PLL period jitter | JitterPLL | 100 | ps | PLL PFD input clock=8MHz, System clock=120MHz, Peak-to-Peak | 81 | ||
| PLL cycle-to-cycle jitter | JitterPLL | 150 | ps | PLL PFD input clock=8MHz, System clock=120MHz, Peak-to-Peak | 81 | ||
| PLL lock time | tLOCK | 80 | 120 | µs | 81 | ||
| USART input clock rise time | tCKr | 5 | ns | 73 | |||
| USART input clock fall time | tCKf | 5 | ns | 73 | |||
| USART CSI transmit delay time | tTD | 28 | ns | CSI | 73 | ||
| USART CSI receive data setup time | tRDS | 15 | ns | CSI | 73 | ||
| USART CSI receive data hold time | tRDH | 5 | ns | CSI | 73 | ||
| I2S data output valid time, slave transmitter | tv(SD_ST) | 27 | ns | Slave transmitter (after enable edge) | 74 | ||
| I2S data output valid time, master transmitter | tv(SD_MT) | 20 | ns | Master transmitter (after enable edge) | 74 | ||
| SPI data output delay, master | tod | 8 | ns | Master, C=30pF | 77 | ||
| SPI data output delay, slave | tod | 20 | ns | Slave, C=30pF | 77 | ||
| SPI data input setup time, master | tsu | 4 | ns | Master, C=30pF | 77 | ||
| SPI data input setup time, slave | tsu | 5 | ns | Slave, C=30pF | 77 |
CAD (KiCad official)
- Symbol:
HC32F460KCTA-LQFP64 - Footprint:
Package_QFP:LQFP-64_10x10mm_P0.5mm - 3D model: LQFP-64(10x10) (KiCad packages3D, STEP)
- 3D model files:
hc32f460kcta-lqfp64-etched.step/hc32f460kcta-lqfp64-etched.glbcarry the MPN laser-etched on the die in a toggleableAdom.LaserEtchgroup (Fusion-ready);hc32f460kcta-lqfp64.step/hc32f460kcta-lqfp64.glbare the bare package body.
Provenance
Data extracted from the manufacturer datasheet, not a distributor listing:
- Datasheet: HDSC datasheet (116 pp, sha256
df339d0329616ae4, retrieved 2026-10-23, tier: lcsc) - Datasheet language: Chinese. Pin names, descriptions, and specs on this page were extracted and translated to English by ds2sf; the linked PDF is the manufacturer original.
- Extractor: parts-factory
2.0.0/extract_pins 0.3, primaryclaude-sonnet-5-5(text), consensusclaude-sonnet-5-5(agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish. - CAD: KiCad official libraries (CC-BY-SA 4.0).