component
HC32F460JEUA-QFN48TR
Public Made by Adomby adom
XHSC Microcontrollers (MCU/MPU/SOC), QFN-48-EP(5x5). Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.
main
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{
"slug": "hc32f460jeua-qfn48tr",
"version": "0.1.0",
"type": "component",
"description": "XHSC Microcontrollers (MCU/MPU/SOC), QFN-48-EP(5x5). Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.",
"tags": [
"component",
"embedded processors & controllers",
"hc32f460jeua-qfn48tr",
"factory-2.0.0",
"extractor-text"
],
"dependencies": {},
"hero": {
"type": "image",
"path": "docs/hero.png"
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"files": [
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"README.md",
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"hc32f460jeua-qfn48tr.step",
"hc32f460jeua-qfn48tr.lbr",
"docs/hero.png",
"docs/hc32f460jeua-qfn48tr-datasheet.pdf",
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"viewers/footprint.html",
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],
"component": {
"mpn": "HC32F460JEUA-QFN48TR",
"manufacturer": "XHSC",
"package": "QFN-48-EP(5x5)",
"pin_count": 49,
"category": "Embedded Processors & Controllers",
"subcategory": "Microcontrollers (MCU/MPU/SOC)",
"datasheet": "https://jlcpcb.com/api/file/downloadByFileSystemAccessId/8588894261009911808",
"parts": {
"symbol": "hc32f460jeua-qfn48tr.kicad_sym",
"footprint": "hc32f460jeua-qfn48tr.kicad_mod",
"model_3d": "hc32f460jeua-qfn48tr-hero.glb",
"model_3d_plain": "hc32f460jeua-qfn48tr.glb",
"model_3d_step": "hc32f460jeua-qfn48tr-etched.step",
"model_3d_step_plain": "hc32f460jeua-qfn48tr.step",
"lbr": "hc32f460jeua-qfn48tr.lbr"
},
"distributor_links": {
"lcsc": "C784657"
},
"distributor_check": {
"checked_at": "2026-10-09T14:38:29Z",
"source": "Component Ocean /api/assign-pns",
"digikey": {
"pn": null,
"status": "no match"
},
"mouser": {
"pn": null,
"status": "no match"
}
},
"pins": [
{
"number": "1",
"name": "PH2",
"type": "bidirectional",
"description": "Port H general-purpose I/O (5 V tolerant) with alternate functions including EIRQ2, FCMREF, SDIO2_D4 and I2S3_EXCK; input voltage must not exceed 5 V."
},
{
"number": "2",
"name": "PC13",
"type": "bidirectional",
"description": "Port C general-purpose I/O (5 V tolerant) with alternate functions including RTC_OUT, SDIO2_CK and I2S3_MCK; input voltage must not exceed 5 V."
},
{
"number": "3",
"name": "PC14/XTAL32_OUT",
"type": "bidirectional",
"description": "Port C general-purpose I/O (5 V tolerant) that doubles as the output of the external 32.768 kHz oscillator (XTAL32_OUT)."
},
{
"number": "4",
"name": "PC15/XTAL32_IN",
"type": "bidirectional",
"description": "Port C general-purpose I/O (5 V tolerant) that doubles as the input of the external 32.768 kHz oscillator (XTAL32_IN); the crystal and its load capacitors must sit close to the pins."
},
{
"number": "5",
"name": "PH0/XTAL_IN",
"type": "input",
"description": "External high-speed oscillator input for a 4-25 MHz crystal or resonator, or an external clock of 1-25 MHz."
},
{
"number": "6",
"name": "PH1/XTAL_OUT",
"type": "output",
"description": "External high-speed oscillator output for a 4-25 MHz crystal or resonator."
},
{
"number": "7",
"name": "NRST",
"type": "input",
"description": "Active-low reset input with a minimum low pulse width of 500 ns; if unused, connect a pull-up resistor to VCC."
},
{
"number": "8",
"name": "AVSS/VREFL",
"type": "power_in",
"description": "Analog ground and ADC low reference; tie to VSS when the analog modules are not used."
},
{
"number": "9",
"name": "AVCC/VREFH",
"type": "power_in",
"description": "Analog supply (1.8-3.6 V, same voltage as VCC) and ADC high reference VREFH, which must not exceed AVCC; tie to AVCC if the ADC is not used."
},
{
"number": "10",
"name": "PA0/ADC1_IN0",
"type": "bidirectional",
"description": "Port A general-purpose I/O (5 V tolerant) also used as ADC1 analog input 0; analog voltage must not exceed VREFH/AVCC."
},
{
"number": "11",
"name": "PA1/ADC1_IN1",
"type": "bidirectional",
"description": "Port A general-purpose I/O (5 V tolerant) also used as ADC1 analog input 1; analog voltage must not exceed VREFH/AVCC."
},
{
"number": "12",
"name": "PA2/ADC1_IN2",
"type": "bidirectional",
"description": "Port A general-purpose I/O (5 V tolerant) also used as ADC1 analog input 2; analog voltage must not exceed VREFH/AVCC."
},
{
"number": "13",
"name": "PA3/ADC1_IN3",
"type": "bidirectional",
"description": "Port A general-purpose I/O (5 V tolerant) also used as ADC1 analog input 3 and PGA ground reference (PGAVSS); analog voltage must not exceed VREFH/AVCC."
},
{
"number": "14",
"name": "PA4/ADC12_IN4",
"type": "bidirectional",
"description": "Port A general-purpose I/O (5 V tolerant) also used as shared ADC1/ADC2 analog input 4; analog voltage must not exceed VREFH/AVCC."
},
{
"number": "15",
"name": "PA5/ADC12_IN5",
"type": "bidirectional",
"description": "Port A general-purpose I/O (5 V tolerant) also used as shared ADC1/ADC2 analog input 5; analog voltage must not exceed VREFH/AVCC."
},
{
"number": "16",
"name": "PA6/ADC12_IN6",
"type": "bidirectional",
"description": "Port A general-purpose I/O (5 V tolerant) also used as shared ADC1/ADC2 analog input 6; analog voltage must not exceed VREFH/AVCC."
},
{
"number": "17",
"name": "PA7/ADC12_IN7",
"type": "bidirectional",
"description": "Port A general-purpose I/O (5 V tolerant) also used as shared ADC1/ADC2 analog input 7; analog voltage must not exceed VREFH/AVCC."
},
{
"number": "18",
"name": "PB0/ADC12_IN8",
"type": "bidirectional",
"description": "Port B general-purpose I/O (5 V tolerant) also used as shared ADC1/ADC2 analog input 8; analog voltage must not exceed VREFH/AVCC."
},
{
"number": "19",
"name": "PB1/ADC12_IN9",
"type": "bidirectional",
"description": "Port B general-purpose I/O (5 V tolerant) also used as shared ADC1/ADC2 analog input 9; analog voltage must not exceed VREFH/AVCC."
},
{
"number": "20",
"name": "PB2/PVD2EXINP",
"type": "bidirectional",
"description": "Port B general-purpose I/O (5 V tolerant) that doubles as the external comparison input of PVD2 (PVD2EXINP)."
},
{
"number": "21",
"name": "PB10",
"type": "bidirectional",
"description": "Port B general-purpose I/O (5 V tolerant) with alternate functions including EIRQ10, ADTRG2 and I2S3_EXCK; input voltage must not exceed 5 V."
},
{
"number": "22",
"name": "VCAP_1",
"type": "passive",
"description": "Core voltage regulator stabilisation pin; connect an external capacitor (0.047, 0.1 or 0.22 µF, ESR < 0.3 Ω) between this pin and a nearby VSS pin."
},
{
"number": "23",
"name": "VSS",
"type": "power_in",
"description": "Ground, 0 V reference for the device; decouple together with the VCC pins."
},
{
"number": "24",
"name": "VCC",
"type": "power_in",
"description": "Main supply, 1.8-3.6 V; decouple with 100 nF capacitors close to the pin, plus the bulk capacitor per the power scheme."
},
{
"number": "25",
"name": "PB12",
"type": "bidirectional",
"description": "Port B general-purpose I/O (5 V tolerant) with alternate functions including VCOUT1, QSPI_QSIO1 and SDIO2_D1; input voltage must not exceed 5 V."
},
{
"number": "26",
"name": "PB13",
"type": "bidirectional",
"description": "Port B general-purpose I/O (5 V tolerant) with alternate functions including VCOUT2, QSPI_QSIO0 and SDIO2_D0; input voltage must not exceed 5 V."
},
{
"number": "27",
"name": "PB14",
"type": "bidirectional",
"description": "Port B general-purpose I/O (5 V tolerant) with alternate functions including VCOUT3, QSPI_QSCK and SDIO1_D6; input voltage must not exceed 5 V."
},
{
"number": "28",
"name": "PB15",
"type": "bidirectional",
"description": "Port B general-purpose I/O (5 V tolerant) with alternate functions including RTC_OUT, USART3_CK and SDIO1_CK; input voltage must not exceed 5 V."
},
{
"number": "29",
"name": "PA8",
"type": "bidirectional",
"description": "Port A general-purpose I/O (5 V tolerant) with alternate functions including MCO_1, USART1_CK, SDIO1_D1 and USBFS_SOF; input voltage must not exceed 5 V."
},
{
"number": "30",
"name": "PA9/USBFS_VBUS",
"type": "bidirectional",
"description": "Port A general-purpose I/O (5 V tolerant) that doubles as the USB FS VBUS detection input (USBFS_VBUS); input voltage must not exceed 5 V."
},
{
"number": "31",
"name": "PA10/USBFS_ID",
"type": "bidirectional",
"description": "Port A general-purpose I/O (5 V tolerant) that doubles as the USB FS ID input (USBFS_ID); input voltage must not exceed 5 V."
},
{
"number": "32",
"name": "PA11/USBFS_DM",
"type": "bidirectional",
"description": "USB FS D- line of the on-chip full-speed PHY; not 5 V tolerant, input voltage must not exceed VCC+0.3 V."
},
{
"number": "33",
"name": "PA12/USBFS_DP",
"type": "bidirectional",
"description": "USB FS D+ line of the on-chip full-speed PHY; not 5 V tolerant, input voltage must not exceed VCC+0.3 V."
},
{
"number": "34",
"name": "PA13/JTMS_SWDIO",
"type": "bidirectional",
"description": "Port A general-purpose I/O (5 V tolerant) that serves as the JTAG TMS / SWD data pin (JTMS_SWDIO) for debug."
},
{
"number": "35",
"name": "VSS",
"type": "power_in",
"description": "Ground, 0 V reference for the device; decouple together with the VCC pins."
},
{
"number": "36",
"name": "VCC",
"type": "power_in",
"description": "Main supply, 1.8-3.6 V; decouple with 100 nF capacitors close to the pin, plus the bulk capacitor per the power scheme."
},
{
"number": "37",
"name": "PA14/JTCK_SWCLK",
"type": "input",
"description": "Port A I/O (5 V tolerant) that serves as the JTAG clock / SWD clock input (JTCK_SWCLK) for debug."
},
{
"number": "38",
"name": "PA15/JTDI",
"type": "input",
"description": "Port A I/O (5 V tolerant) that serves as the JTAG data input (JTDI) for debug."
},
{
"number": "39",
"name": "PB3/JTDO_TRACESWO",
"type": "output",
"description": "Port B I/O that serves as the JTAG data output / trace SWO (JTDO_TRACESWO) for debug."
},
{
"number": "40",
"name": "PB4/NJTRST",
"type": "input",
"description": "Port B I/O that serves as the active-low JTAG reset input (NJTRST) for debug."
},
{
"number": "41",
"name": "PB5",
"type": "bidirectional",
"description": "Port B general-purpose I/O (5 V tolerant) with alternate functions including TIM4_3_OWH, SDIO1_D3 and I2S4_EXCK; input voltage must not exceed 5 V."
},
{
"number": "42",
"name": "PB6",
"type": "bidirectional",
"description": "Port B general-purpose I/O (5 V tolerant) with alternate functions including ADTRG2, SDIO2_CK and I2S4_MCK; input voltage must not exceed 5 V."
},
{
"number": "43",
"name": "PB7",
"type": "bidirectional",
"description": "Port B general-purpose I/O (5 V tolerant) with alternate functions including ADTRG1, SDIO1_D0 and TIMA_4_PWM2; input voltage must not exceed 5 V."
},
{
"number": "44",
"name": "PB11/MD",
"type": "input",
"description": "Mode input, fixed as input and input-only (5 V tolerant); must be held high when NRST is released, with a recommended 4.7 kΩ pull-up to VCC."
},
{
"number": "45",
"name": "PB8",
"type": "bidirectional",
"description": "Port B general-purpose I/O (5 V tolerant) with alternate functions including TIM4_3_OUL, KEYOUT7, SDIO1_D4 and USBFS_DRVVBUS; input voltage must not exceed 5 V."
},
{
"number": "46",
"name": "PB9",
"type": "bidirectional",
"description": "Port B general-purpose I/O (5 V tolerant) with alternate functions including TIM4_3_OUH, SPI2_SS1, KEYOUT6 and SDIO1_D5; input voltage must not exceed 5 V."
},
{
"number": "47",
"name": "VSS",
"type": "power_in",
"description": "Ground, 0 V reference for the device; decouple together with the VCC pins."
},
{
"number": "48",
"name": "VCC",
"type": "power_in",
"description": "Main supply, 1.8-3.6 V; decouple with 100 nF capacitors close to the pin, plus the bulk capacitor per the power scheme."
},
{
"number": "49",
"name": "EP",
"type": "passive",
"description": "Exposed pad (from the footprint; not named in the datasheet pin table)."
}
],
"provenance": {
"extractor": "extract_pins 0.3",
"factory_chain": {
"factory": "2.0.0",
"extractor": "extract_pins 0.3",
"primary_model": "claude-haiku-5-5",
"primary_mode": "text",
"consensus_model": "claude-sonnet-5-5",
"consensus": "agreed",
"guards": "pin_guards 0.1: passed",
"guard_notes": [
"extractor flagged: The datasheet gives no exposed-pad (EP) pin number for the QFN48 package; the pinout covers pins 1-4; Pins 8 and 9 are named AVSS/VREFL and AVCC/VREFH in the package drawing (page 32) but AVSS and AVCC ; Datasheet classifies VCAP_1 as 'IO' and PB2/PVD2EXINP as 'I'; the KiCad types here are passive for V",
"exposed pad 49 added from the footprint",
"37/49 pins cited to the wrong page (name found elsewhere): ['2:PC13@p40', '9:AVCC/VREFH@p44', '10:PA0/ADC1_IN0@p44', '11:PA1/ADC1_IN1@p44']"
],
"pages_sent": 76,
"cost_usd": 0.3036,
"at": "2026-10-09T14:37:38"
},
"datasheet": {
"url": "https://jlcpcb.com/api/file/downloadByFileSystemAccessId/8588894261009911808",
"pages": 116,
"sha256": "df339d0329616ae4",
"source_tier": "lcsc"
},
"cad": "KiCad official (CC-BY-SA 4.0)",
"pins": {
"total": 49,
"described": 49,
"cites_pages": true,
"refuses_to_fabricate": true
}
},
"viewers": {
"symbol": "viewers/symbol.html",
"footprint": "viewers/footprint.html"
},
"models_3d": [
{
"file": "hc32f460jeua-qfn48tr.step",
"role": "plain",
"up": "Z",
"units": "mm",
"origin": "footprint origin = pad-pattern centre",
"seat": "z = 0",
"extents_mm": [
5.0,
5.0,
1.1
],
"zmin_mm": 0.0,
"centre_offset_mm": 0.0,
"footprint_binding": "identity",
"sha256": "bdef7330531c8a62fd1740be5d4ee88a2520275cd173f5de2a729248fb1c21a0",
"checked": "2026-10-09",
"checked_by": "factory/step_pose.py (Z-up, origin, seat, binding)"
},
{
"file": "hc32f460jeua-qfn48tr-etched.step",
"role": "eda",
"up": "Z",
"units": "mm",
"origin": "footprint origin = pad-pattern centre",
"seat": "z = 0",
"extents_mm": [
5.0,
5.0,
1.1
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"zmin_mm": 0.0,
"centre_offset_mm": 0.0,
"footprint_binding": "identity",
"sha256": "01aea025e5d1cc2121f308bd9ba781d81643f21a30d29d05c575a5d3f727b75b",
"checked": "2026-10-09",
"checked_by": "factory/step_pose.py (Z-up, origin, seat, binding)"
}
]
}
}