component
HC32F452JEUB-QFN48TR
Public Made by Adomby adom
XHSC Microcontrollers (MCU/MPU/SOC), QFN-48(5x5). Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.
main
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{
"slug": "hc32f452jeub-qfn48tr",
"version": "0.1.0",
"type": "component",
"description": "XHSC Microcontrollers (MCU/MPU/SOC), QFN-48(5x5). Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.",
"tags": [
"component",
"embedded processors & controllers",
"hc32f452jeub-qfn48tr",
"factory-2.0.0",
"extractor-text"
],
"dependencies": {},
"hero": {
"type": "image",
"path": "docs/hero.png"
},
"files": [
"page.json",
"README.md",
"hc32f452jeub-qfn48tr.kicad_sym",
"hc32f452jeub-qfn48tr.kicad_mod",
"hc32f452jeub-qfn48tr.glb",
"hc32f452jeub-qfn48tr.step",
"hc32f452jeub-qfn48tr.lbr",
"docs/hero.png",
"docs/hc32f452jeub-qfn48tr-datasheet.pdf",
"viewers/symbol.html",
"viewers/footprint.html",
"hc32f452jeub-qfn48tr-hero.glb",
"hc32f452jeub-qfn48tr-hero.overlay.json",
"hc32f452jeub-qfn48tr-etched.glb"
],
"component": {
"mpn": "HC32F452JEUB-QFN48TR",
"manufacturer": "XHSC",
"package": "QFN-48(5x5)",
"pin_count": 49,
"category": "Embedded Processors & Controllers",
"subcategory": "Microcontrollers (MCU/MPU/SOC)",
"datasheet": "https://jlcpcb.com/api/file/downloadByFileSystemAccessId/8590455031234531328",
"parts": {
"symbol": "hc32f452jeub-qfn48tr.kicad_sym",
"footprint": "hc32f452jeub-qfn48tr.kicad_mod",
"model_3d": "hc32f452jeub-qfn48tr-hero.glb",
"model_3d_plain": "hc32f452jeub-qfn48tr-etched.glb",
"model_3d_step": "hc32f452jeub-qfn48tr-etched.step",
"model_3d_step_plain": "hc32f452jeub-qfn48tr.step",
"lbr": "hc32f452jeub-qfn48tr.lbr"
},
"distributor_links": {
"lcsc": "C5263757"
},
"distributor_check": {
"checked_at": "2026-10-18T23:10:59Z",
"source": "Component Ocean /api/assign-pns",
"digikey": {
"pn": null,
"status": "quota"
},
"mouser": {
"pn": null,
"status": "quota"
}
},
"pins": [
{
"number": "1",
"name": "PH2",
"type": "bidirectional",
"description": "GPIO PH2 (also EIRQ2, FCMREF, TIM4_2_CLK, SDIO2_D4, I2S3_EXCK); supports pull-up, push-pull/open-drain and low/mid/high drive, and is 5 V tolerant as a digital input."
},
{
"number": "2",
"name": "PC13",
"type": "bidirectional",
"description": "GPIO PC13 (also EIRQ13, RTC_OUT, SDIO2_CK, I2S3_MCK); supports pull-up, push-pull/open-drain and low/mid/high drive, and is 5 V tolerant as a digital input."
},
{
"number": "3",
"name": "PC14/XTAL32_OUT",
"type": "output",
"description": "32.768 kHz crystal oscillator output (XTAL32_OUT) that drives the external 32 kHz resonator; the pin can alternatively be used as GPIO PC14 or EIRQ14."
},
{
"number": "4",
"name": "PC15/XTAL32_IN",
"type": "input",
"description": "32.768 kHz crystal oscillator input (XTAL32_IN) for the external 32 kHz resonator; the pin can alternatively be used as GPIO PC15 or EIRQ15."
},
{
"number": "5",
"name": "PH0/XTAL_EXT/XTAL_OUT",
"type": "bidirectional",
"description": "Main high-speed oscillator pin (XTAL_OUT or external clock input XTAL_EXT, 1-25 MHz external clock, 4-25 MHz crystal); also GPIO PH0 and EIRQ0, and 5 V tolerant as a digital input."
},
{
"number": "6",
"name": "PH1/XTAL_IN",
"type": "bidirectional",
"description": "Main high-speed oscillator input (XTAL_IN) for a 4-25 MHz crystal or resonator; also GPIO PH1 and EIRQ1."
},
{
"number": "7",
"name": "NRST",
"type": "input",
"description": "Reset pin, active low; when unused it should be connected to VCC through a pull-up resistor."
},
{
"number": "8",
"name": "AVSS/VREFL",
"type": "power_in",
"description": "Analog ground and low ADC reference; connect to VSS (AVSS = VSS) and short to VSS when the analog modules are not used."
},
{
"number": "9",
"name": "AVCC/VREFH",
"type": "power_in",
"description": "Analog supply, same voltage as VCC (1.8-3.6 V); the ADC reference VREFH must not exceed AVCC, and VAVCC-VREFH must stay below 1.2 V; short to AVCC when the ADC is not used."
},
{
"number": "10",
"name": "PA0",
"type": "bidirectional",
"description": "GPIO PA0 shared with ADC1_IN0 and CMP1_INP1; analog input voltage must not exceed VREFH/AVCC, and digital input is 5 V tolerant."
},
{
"number": "11",
"name": "PA1",
"type": "bidirectional",
"description": "GPIO PA1 shared with ADC1_IN1 and CMP1_INP2; analog input voltage must not exceed VREFH/AVCC, and digital input is 5 V tolerant."
},
{
"number": "12",
"name": "PA2",
"type": "bidirectional",
"description": "GPIO PA2 shared with ADC1_IN2 and CMP1_INP3; analog input voltage must not exceed VREFH/AVCC, and digital input is 5 V tolerant."
},
{
"number": "13",
"name": "PA3",
"type": "bidirectional",
"description": "GPIO PA3 shared with ADC1_IN3, PGAVSS and CMP1_INP4; analog input voltage must not exceed VREFH/AVCC, and digital input is 5 V tolerant."
},
{
"number": "14",
"name": "PA4",
"type": "bidirectional",
"description": "GPIO PA4 shared with ADC12_IN4, CMP2_INP1 and CMP3_INP4; analog input voltage must not exceed VREFH/AVCC, and digital input is 5 V tolerant."
},
{
"number": "15",
"name": "PA5",
"type": "bidirectional",
"description": "GPIO PA5 shared with ADC12_IN5 and CMP2_INP2; analog input voltage must not exceed VREFH/AVCC, and digital input is 5 V tolerant."
},
{
"number": "16",
"name": "PA6",
"type": "bidirectional",
"description": "GPIO PA6 shared with ADC12_IN6 and CMP2_INP3; analog input voltage must not exceed VREFH/AVCC, and digital input is 5 V tolerant."
},
{
"number": "17",
"name": "PA7",
"type": "bidirectional",
"description": "GPIO PA7 shared with ADC12_IN7, CMP1_INM1, CMP2_INM1 and CMP3_INM1; analog input voltage must not exceed VREFH/AVCC, and digital input is 5 V tolerant."
},
{
"number": "18",
"name": "PB0",
"type": "bidirectional",
"description": "GPIO PB0 shared with ADC12_IN8 and CMP3_INP1; analog input voltage must not exceed VREFH/AVCC, and digital input is 5 V tolerant."
},
{
"number": "19",
"name": "PB1",
"type": "bidirectional",
"description": "GPIO PB1 shared with ADC12_IN9, CMP3_INP2 and wake-up input WKUP0_1; analog input voltage must not exceed VREFH/AVCC, and digital input is 5 V tolerant."
},
{
"number": "20",
"name": "PB2/PVD2EXINP",
"type": "bidirectional",
"description": "GPIO PB2 that is also the external PVD2 comparison voltage input PVD2EXINP, WKUP0_2 and VCOUT123; digital input is 5 V tolerant."
},
{
"number": "21",
"name": "PB10",
"type": "bidirectional",
"description": "GPIO PB10 (also EIRQ10, ADTRG2, QSPI_QSIO2, SDIO1_D7, I2S3_EXCK); supports pull-up, open-drain and low/mid/high drive, and is 5 V tolerant as a digital input."
},
{
"number": "22",
"name": "VCAP_1",
"type": "passive",
"description": "Core-voltage regulator decoupling pin; connect a capacitor of 0.1 uF or 0.22 uF (single VCAP_1 part) between this pin and VSS placed close to the pin, with ESR below 0.3 ohm."
},
{
"number": "23",
"name": "VSS",
"type": "power_in",
"description": "Ground reference (0 V); connect to the board ground and decouple with VCC near the pin."
},
{
"number": "24",
"name": "VCC",
"type": "power_in",
"description": "Main supply, 1.8 V to 3.6 V; decouple to VSS with the recommended capacitors placed close to the pin."
},
{
"number": "25",
"name": "PB12",
"type": "bidirectional",
"description": "GPIO PB12 (also EIRQ12, VCOUT1, QSPI_QSIO1, SDIO2_D1, I2S3_MCK); supports pull-up, open-drain and low/mid/high drive, and is 5 V tolerant as a digital input."
},
{
"number": "26",
"name": "PB13",
"type": "bidirectional",
"description": "GPIO PB13 (also EIRQ13, VCOUT2, QSPI_QSIO0, SDIO2_D0); supports pull-up, open-drain and low/mid/high drive, and is 5 V tolerant as a digital input."
},
{
"number": "27",
"name": "PB14",
"type": "bidirectional",
"description": "GPIO PB14 (also EIRQ14, VCOUT3, QSPI_QSCK, SDIO1_D6); supports pull-up, open-drain and low/mid/high drive, and is 5 V tolerant as a digital input."
},
{
"number": "28",
"name": "PB15",
"type": "bidirectional",
"description": "GPIO PB15 (also EIRQ15, RTC_OUT, USART3_CK, SDIO1_CK); supports pull-up, open-drain and low/mid/high drive, and is 5 V tolerant as a digital input."
},
{
"number": "29",
"name": "PA8",
"type": "bidirectional",
"description": "GPIO PA8 (also EIRQ8/WKUP2_0, MCO_1, USART1_CK, SDIO1_D1, USBFS_SOF); supports pull-up, open-drain and low/mid/high drive, and is 5 V tolerant as a digital input."
},
{
"number": "30",
"name": "PA9/USBFS_VBUS",
"type": "bidirectional",
"description": "GPIO PA9 that doubles as the USB FS VBUS sense input (USBFS_VBUS); supports pull-up, open-drain and low/mid/high drive, and is 5 V tolerant as a digital input."
},
{
"number": "31",
"name": "PA10/USBFS_ID",
"type": "bidirectional",
"description": "GPIO PA10 that doubles as the USB FS ID input (USBFS_ID); supports pull-up, open-drain and low/mid/high drive, and is 5 V tolerant as a digital input."
},
{
"number": "32",
"name": "PA11/USBFS_DM",
"type": "bidirectional",
"description": "USB FS D- signal of the on-chip full-speed PHY (USBFS_DM) also usable as GPIO PA11; it is not 5 V tolerant and its input voltage must stay within VCC+0.3 V with the internal pull-up/pull-down disabled above VCC+0.3 V."
},
{
"number": "33",
"name": "PA12/USBFS_DP",
"type": "bidirectional",
"description": "USB FS D+ signal of the on-chip full-speed PHY (USBFS_DP) also usable as GPIO PA12; it is not 5 V tolerant and its input voltage must stay within VCC+0.3 V."
},
{
"number": "34",
"name": "PA13/JTMS_SWDIO",
"type": "bidirectional",
"description": "JTAG TMS / SWD data I/O (JTMS_SWDIO) also usable as GPIO PA13; digital input is 5 V tolerant."
},
{
"number": "35",
"name": "VSS",
"type": "power_in",
"description": "Ground reference (0 V); connect to the board ground and decouple with VCC near the pin."
},
{
"number": "36",
"name": "VCC",
"type": "power_in",
"description": "Main supply, 1.8 V to 3.6 V; decouple to VSS with the recommended capacitors placed close to the pin."
},
{
"number": "37",
"name": "PA14/JTCK_SWCLK",
"type": "bidirectional",
"description": "JTAG TCK / SWD clock (JTCK_SWCLK) also usable as GPIO PA14; digital input is 5 V tolerant."
},
{
"number": "38",
"name": "PA15/JTDI",
"type": "bidirectional",
"description": "JTAG data input (JTDI) also usable as GPIO PA15; digital input is 5 V tolerant."
},
{
"number": "39",
"name": "PB3/JTDO_TRACESWO",
"type": "bidirectional",
"description": "JTAG data output / SWO trace output (JTDO_TRACESWO) also usable as GPIO PB3; digital input is 5 V tolerant."
},
{
"number": "40",
"name": "PB4/NJTRST",
"type": "bidirectional",
"description": "JTAG reset input (NJTRST) also usable as GPIO PB4; digital input is 5 V tolerant."
},
{
"number": "41",
"name": "PB5",
"type": "bidirectional",
"description": "GPIO PB5 (also EIRQ5, WKUP1_1, I2S4_EXCK, SDIO1_D3); supports pull-up, open-drain and low/mid/high drive, and is 5 V tolerant as a digital input."
},
{
"number": "42",
"name": "PB6",
"type": "bidirectional",
"description": "GPIO PB6 (also EIRQ6, WKUP1_2, ADTRG2, I2S4_MCK, SDIO2_CK); supports pull-up, open-drain and low/mid/high drive, and is 5 V tolerant as a digital input."
},
{
"number": "43",
"name": "PB7",
"type": "bidirectional",
"description": "GPIO PB7 (also EIRQ7, WKUP1_3, ADTRG1, SDIO1_D0); supports pull-up, open-drain and low/mid/high drive, and is 5 V tolerant as a digital input."
},
{
"number": "44",
"name": "PB11/MD",
"type": "input",
"description": "Mode pin MD, fixed as input; it must be held high when NRST is released, and a 4.7 kOhm pull-up to VCC is recommended; PB11 is an input-only port pin and tolerates 5 V."
},
{
"number": "45",
"name": "PB8",
"type": "bidirectional",
"description": "GPIO PB8 (also EIRQ8, KEYOUT7, SDIO1_D4, USBFS_DRVVBUS); supports pull-up, open-drain and low/mid/high drive, and is 5 V tolerant as a digital input."
},
{
"number": "46",
"name": "PB9",
"type": "bidirectional",
"description": "GPIO PB9 (also EIRQ9, TIMA_6_TRIG, SPI2_SS1, KEYOUT6, SDIO1_D5); supports pull-up, open-drain and low/mid/high drive, and is 5 V tolerant as a digital input."
},
{
"number": "47",
"name": "VSS",
"type": "power_in",
"description": "Ground reference (0 V); connect to the board ground and decouple with VCC near the pin."
},
{
"number": "48",
"name": "VCC",
"type": "power_in",
"description": "Main supply, 1.8 V to 3.6 V; decouple to VSS with the recommended capacitors placed close to the pin."
},
{
"number": "49",
"name": "EP",
"type": "passive",
"description": "Exposed pad (from the footprint; not named in the datasheet pin table)."
}
],
"provenance": {
"extractor": "extract_pins 0.3",
"factory_chain": {
"factory": "2.0.0",
"extractor": "extract_pins 0.3",
"primary_model": "claude-haiku-5-5",
"primary_mode": "text",
"consensus_model": "claude-sonnet-5-5",
"consensus": "agreed",
"guards": "pin_guards 0.1: passed",
"guard_notes": [
"extractor flagged: Section 2.3 classifies VCAP_1 as IO, but it is a regulator decoupling node; I mapped it to passive. ; Crystal and XTAL pins are multi-function. Types follow the Table 2-5 direction (XTAL32_OUT O, XTAL32; On QFN48 there is no separate VREFH pin. Pin 9 is printed as AVCC/VREFH and shares the ADC reference",
"exposed pad 49 added from the footprint"
],
"pages_sent": 68,
"cost_usd": 0.3012,
"at": "2026-10-18T23:08:56"
},
"datasheet": {
"url": "https://jlcpcb.com/api/file/downloadByFileSystemAccessId/8590455031234531328",
"pages": 97,
"sha256": "66fdc58cad687d2f",
"source_tier": "lcsc"
},
"cad": "KiCad official (CC-BY-SA 4.0)",
"pins": {
"total": 49,
"described": 49,
"cites_pages": true,
"refuses_to_fabricate": true
}
},
"viewers": {
"symbol": "viewers/symbol.html",
"footprint": "viewers/footprint.html"
},
"models_3d": [
{
"file": "hc32f452jeub-qfn48tr.step",
"role": "plain",
"up": "Z",
"units": "mm",
"origin": "footprint origin = pad-pattern centre",
"seat": "z = 0",
"extents_mm": [
5.0,
5.0,
1.1
],
"zmin_mm": 0.0,
"centre_offset_mm": 0.0,
"footprint_binding": "identity",
"sha256": "bdef7330531c8a62fd1740be5d4ee88a2520275cd173f5de2a729248fb1c21a0",
"checked": "2026-10-18",
"checked_by": "factory/step_pose.py (Z-up, origin, seat, binding)"
},
{
"file": "hc32f452jeub-qfn48tr-etched.step",
"role": "eda",
"up": "Z",
"units": "mm",
"origin": "footprint origin = pad-pattern centre",
"seat": "z = 0",
"extents_mm": [
5.0,
5.0,
1.1
],
"zmin_mm": 0.0,
"centre_offset_mm": 0.0,
"footprint_binding": "identity",
"sha256": "fbb30b4778496750ecc1d8f9e310a0d162a0d41fc07d592fdc6c62f80d0894fc",
"checked": "2026-10-18",
"checked_by": "factory/step_pose.py (Z-up, origin, seat, binding)"
}
]
}
}