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HC32F146KATA-LQFP64

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XHSC Microcontrollers (MCU/MPU/SOC), LQFP-64(10x10). Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.

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Contents

README

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HC32F146KATA-LQFP64

XHSC · Microcontrollers (MCU/MPU/SOC) · LQFP-64(10x10)

HC32F146KATA-LQFP64 from XHSC, in a LQFP-64(10x10). Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.

Pinout

Pin Name Type Function
1 DVCC power_in Digital power supply, 2.7 V to 5.5 V; a ceramic bypass of about 0.1 µF should be placed close to the DVCC-DVSS pins.
2 P00 bidirectional General-purpose I/O P00 (circuit type B) with alternate functions INT00_2, SEG29, RTS6_1; CMOS Schmitt input, pull-up about 52 kΩ, optional open-drain output, IOH −5 mA / IOL 5 mA.
3 P01 bidirectional General-purpose I/O P01 (circuit type B) with alternate functions INT01_2, SEG30, SCS62_1; CMOS Schmitt input, pull-up about 52 kΩ, optional open-drain output, IOH −5 mA / IOL 5 mA.
4 P02 bidirectional General-purpose I/O P02 (circuit type B) with alternate functions INT02_2, SEG31, SCS61_1; CMOS Schmitt input, pull-up about 52 kΩ, optional open-drain output, IOH −5 mA / IOL 5 mA.
5 P03 bidirectional General-purpose I/O P03 (circuit type B) with alternate functions INT00_1, SEG32, SCS60_1; CMOS Schmitt input, pull-up about 52 kΩ, optional open-drain output, IOH −5 mA / IOL 5 mA.
6 P04 bidirectional General-purpose I/O P04 (circuit type B) with alternate functions INT01_1, SEG33, SCK6_1; CMOS Schmitt input, pull-up about 52 kΩ, optional open-drain output, IOH −5 mA / IOL 5 mA.
7 P05 bidirectional General-purpose I/O P05 (circuit type B) with alternate functions INT02_1, SEG34, SOT6_1; CMOS Schmitt input, pull-up about 52 kΩ, optional open-drain output, IOH −5 mA / IOL 5 mA.
8 P06 bidirectional General-purpose I/O P06 (circuit type C, LCD supply input) with alternate functions INT03_1, R43, SIN6_1; CMOS Schmitt input, pull-up about 52 kΩ, optional open-drain output, IOH −5 mA / IOL 5 mA.
9 P07 bidirectional General-purpose I/O P07 (circuit type C, LCD supply input) with alternate functions ADTG_1, R33, SCS50_0, NMIX; CMOS Schmitt input, pull-up about 52 kΩ, optional open-drain output, IOH −5 mA / IOL 5 mA.
10 P10 bidirectional General-purpose I/O P10 (circuit type C, LCD supply input) with alternate functions INT00_0, R23, SCK5_0; CMOS Schmitt input, pull-up about 52 kΩ, optional open-drain output, IOH −5 mA / IOL 5 mA.
11 P11 bidirectional General-purpose I/O P11 (circuit type A, analog input capable) with alternate functions INT01_0, R13, SOT5_0; CMOS Schmitt input, pull-up about 52 kΩ, optional open-drain output, IOH −5 mA / IOL 5 mA.
12 P12 bidirectional General-purpose I/O P12 (circuit type A, analog input capable) with alternate functions INT02_0, R03, SIN5_0; CMOS Schmitt input, pull-up about 52 kΩ, optional open-drain output, IOH −5 mA / IOL 5 mA.
13 RSTB input External port reset input, active low (circuit type F: CMOS Schmitt input with pull-up about 52 kΩ).
14 P13 bidirectional Low-speed crystal input XLI (32.768 kHz) or external low-speed clock input, also general-purpose I/O P13 with alternate function SOT5_2 (circuit type G).
15 P14 bidirectional Low-speed crystal output XLO, also general-purpose I/O P14 with alternate function SIN5_2 (circuit type G); usable as I/O when an external clock is applied to XLI.
16 DVSS power_in Digital ground pin (DVSS = 0 V).
17 P15 bidirectional High-speed crystal output XHO (4-16 MHz), also general-purpose I/O P15 (circuit type G); usable as I/O when an external clock is applied to XHI.
18 P16 bidirectional High-speed crystal input XHI (4-16 MHz) or external high-speed clock input, also general-purpose I/O P16 (circuit type G).
19 P20 bidirectional Mode-select input MD (low = normal operation, high = Flash serial programming mode), also general-purpose I/O P20 with SEG35; MD must be tied directly to DVCC or DVSS (circuit type E, Schmitt input with internal pull-down).
20 P21 bidirectional General-purpose I/O P21 (circuit type B) with alternate functions INT04_1, COM7, SEG36, SCK4_1, TIOA3_1; CMOS Schmitt input, pull-up about 52 kΩ, IOH −5 mA / IOL 5 mA.
21 P22 bidirectional General-purpose I/O P22 (circuit type B) with alternate functions INT05_1, COM6, SEG37, SOT4_1, TIOB3_1; CMOS Schmitt input, pull-up about 52 kΩ, IOH −5 mA / IOL 5 mA.
22 P23 bidirectional General-purpose I/O P23 (circuit type B) with alternate functions INT06_1, COM5, SEG38, SIN4_1, TIOB2_1; CMOS Schmitt input, pull-up about 52 kΩ, IOH −5 mA / IOL 5 mA.
23 P24 bidirectional General-purpose I/O P24 (circuit type B) with alternate functions INT07_1, COM4, SEG39, CTS4_1, TIOA2_1; CMOS Schmitt input, pull-up about 52 kΩ, IOH −5 mA / IOL 5 mA.
24 P25 bidirectional General-purpose I/O P25 (circuit type B) with alternate functions INT03_2, SEG0, RTS4_1; CMOS Schmitt input, pull-up about 52 kΩ, IOH −5 mA / IOL 5 mA.
25 P26 bidirectional General-purpose I/O P26 (circuit type B) with alternate functions INT04_2, SEG1, SCS41_1; CMOS Schmitt input, pull-up about 52 kΩ, IOH −5 mA / IOL 5 mA.
26 P27 bidirectional General-purpose I/O P27 (circuit type B) with alternate functions INT05_2, SEG2, SCS40_1; CMOS Schmitt input, pull-up about 52 kΩ, IOH −5 mA / IOL 5 mA.
27 P30 bidirectional General-purpose I/O P30 (circuit type B) with alternate functions SWCLK (debug clock), SEG3, SIN4_0, TIOB3_0; the debug pin must only be set as output when used as GPIO or peripheral.
28 P31 bidirectional General-purpose I/O P31 (circuit type B) with alternate functions SWDIO (debug data), SEG4, SOT4_0, TIOA3_0; the debug pin must only be set as output when used as GPIO or peripheral.
29 P32 bidirectional General-purpose I/O P32 (circuit type B) with alternate functions INT03_0, SEG5, SCK4_0, TIOA2_2; CMOS Schmitt input, pull-up about 52 kΩ, IOH −5 mA / IOL 5 mA.
30 DVSS power_in Digital ground pin (DVSS = 0 V).
31 AVSS power_in Analog ground pin (AVSS = 0 V) for the ADC and operational amplifiers.
32 VDD power_out Internal regulator filter-capacitor pin; a bypass capacitor of about 4.7 µF must be connected to VDD for the internal digital supply regulator.
33 DVCC power_in Digital power supply pin, 2.7 V to 5.5 V (second DVCC pin).
34 AVCC power_in Analog power supply; must be the same supply as DVCC (2.7 V to 5.5 V).
35 P40 bidirectional General-purpose I/O P40 (circuit type A, analog input capable) with alternate functions ADTG_0, COM3, OPAP0, CTS4_0, TIOB2_0; CMOS Schmitt input, pull-up about 52 kΩ, optional open-drain output, IOH −5 mA / IOL 5 mA.
36 P41 bidirectional General-purpose I/O P41 (circuit type B) with alternate functions COM2, OPAM0, RTS4_0, TIOA2_0; CMOS Schmitt input, pull-up about 52 kΩ, optional open-drain output, IOH −5 mA / IOL 5 mA.
37 P42 bidirectional General-purpose I/O P42 (circuit type B) with alternate functions COM1, OPAO0, SCS41_0, TIOB1_0; CMOS Schmitt input, pull-up about 52 kΩ, optional open-drain output, IOH −5 mA / IOL 5 mA.
38 P43 bidirectional General-purpose I/O P43 (circuit type A, analog input capable) with alternate functions INT04_0, A0, COM0, SCS40_0, TIOA1_0; CMOS Schmitt input, pull-up about 52 kΩ, optional open-drain output, IOH −5 mA / IOL 5 mA.
39 P44 bidirectional General-purpose I/O P44 (circuit type A, analog input capable) with alternate functions INT05_0, A1, SEG6, OPAP1; CMOS Schmitt input, pull-up about 52 kΩ, optional open-drain output, IOH −5 mA / IOL 5 mA.
40 P45 bidirectional General-purpose I/O P45 (circuit type A, analog input capable) with alternate functions INT06_0, A2, SEG7, OPAM1, TIOB0_0; CMOS Schmitt input, pull-up about 52 kΩ, optional open-drain output, IOH −5 mA / IOL 5 mA.
41 P46 bidirectional General-purpose I/O P46 (circuit type A, analog input capable) with alternate functions INT07_0, A3, SEG8, OPAO1, TIOA0_0; CMOS Schmitt input, pull-up about 52 kΩ, optional open-drain output, IOH −5 mA / IOL 5 mA.
42 P47 bidirectional General-purpose I/O P47 (circuit type A, analog input capable) with alternate functions INT08_1, A4, SEG9, TIOB0_1; CMOS Schmitt input, pull-up about 52 kΩ, optional open-drain output, IOH −5 mA / IOL 5 mA.
43 P50 bidirectional General-purpose I/O P50 (circuit type A, analog input capable) with alternate functions INT09_1, A5, SEG10, TIOA0_1; CMOS Schmitt input, pull-up about 52 kΩ, optional open-drain output, IOH −5 mA / IOL 5 mA.
44 P51 bidirectional General-purpose I/O P51 (circuit type A, analog input capable) with alternate functions INT10_1, A6, SEG11, TIOB1_1; CMOS Schmitt input, pull-up about 52 kΩ, optional open-drain output, IOH −5 mA / IOL 5 mA.
45 P52 bidirectional General-purpose I/O P52 (circuit type A, analog input capable) with alternate functions INT11_1, A7, SEG12, TIOA1_1; CMOS Schmitt input, pull-up about 52 kΩ, optional open-drain output, IOH −5 mA / IOL 5 mA.
46 P53 bidirectional General-purpose I/O P53 (circuit type B) with alternate functions INT06_2, SEG13; CMOS Schmitt input, pull-up about 52 kΩ, IOH −5 mA / IOL 5 mA.
47 P54 bidirectional General-purpose I/O P54 (circuit type D, no analog input) with alternate function INT07_2; CMOS Schmitt input, pull-up about 52 kΩ, optional open-drain output, IOH −5 mA / IOL 5 mA.
48 P55 bidirectional General-purpose I/O P55 (circuit type D, no analog input) with alternate function INT08_2; CMOS Schmitt input, pull-up about 52 kΩ, optional open-drain output, IOH −5 mA / IOL 5 mA.
49 P60 bidirectional General-purpose I/O P60 (circuit type A, analog input capable) with alternate functions INT08_0, A8, SEG14, CTS6_0, TIOB1_2; CMOS Schmitt input, pull-up about 52 kΩ, optional open-drain output, IOH −5 mA / IOL 5 mA.
50 P61 bidirectional General-purpose I/O P61 (circuit type A, analog input capable) with alternate functions INT09_0, A9, Avref (ADC reference voltage input), SEG15, RTS6_0, TIOB2_2; CMOS Schmitt input, pull-up about 52 kΩ, optional open-drain output, IOH −5 mA / IOL 5 mA.
51 P62 bidirectional General-purpose I/O P62 (circuit type B) with alternate functions INT12_1, SEG16, SCS50_1, TIOB0_2; CMOS Schmitt input, pull-up about 52 kΩ, optional open-drain output, IOH −5 mA / IOL 5 mA.
52 P63 bidirectional General-purpose I/O P63 (circuit type B) with alternate functions INT13_1, SEG17, SCK5_1, TIOA0_2; CMOS Schmitt input, pull-up about 52 kΩ, optional open-drain output, IOH −5 mA / IOL 5 mA.
53 P64 bidirectional General-purpose I/O P64 (circuit type B) with alternate functions INT14_1, SEG18, SOT5_1; CMOS Schmitt input, pull-up about 52 kΩ, optional open-drain output, IOH −5 mA / IOL 5 mA.
54 P65 bidirectional General-purpose I/O P65 (circuit type B) with alternate functions INT15_1, SEG19, SIN5_1, IRCO_1; CMOS Schmitt input, pull-up about 52 kΩ, optional open-drain output, IOH −5 mA / IOL 5 mA.
55 P66 bidirectional General-purpose I/O P66 (circuit type B) with alternate functions INT09_2, SEG20; CMOS Schmitt input, pull-up about 52 kΩ, optional open-drain output, IOH −5 mA / IOL 5 mA.
56 P67 bidirectional General-purpose I/O P67 (circuit type B) with alternate functions INT10_2, SEG21, IRCO_2; CMOS Schmitt input, pull-up about 52 kΩ, optional open-drain output, IOH −5 mA / IOL 5 mA.
57 P70 bidirectional General-purpose I/O P70 (circuit type A, analog input capable) with alternate functions INT10_0, A10, SEG22, SCK6_0; CMOS Schmitt input, pull-up about 52 kΩ, optional open-drain output, IOH −5 mA / IOL 5 mA.
58 P71 bidirectional General-purpose I/O P71 (circuit type A, analog input capable) with alternate functions INT11_0, A11, SEG23, SOT6_0; CMOS Schmitt input, pull-up about 52 kΩ, optional open-drain output, IOH −5 mA / IOL 5 mA.
59 P72 bidirectional General-purpose I/O P72 (circuit type A, analog input capable) with alternate functions INT12_0, A12, SEG24, SIN6_0; CMOS Schmitt input, pull-up about 52 kΩ, optional open-drain output, IOH −5 mA / IOL 5 mA.
60 P73 bidirectional General-purpose I/O P73 (circuit type A, analog input capable) with alternate functions INT13_0, A13, SEG25, SCS62_0, IRCO_0; CMOS Schmitt input, pull-up about 52 kΩ, optional open-drain output, IOH −5 mA / IOL 5 mA.
61 P74 bidirectional General-purpose I/O P74 (circuit type A, analog input capable) with alternate functions INT14_0, A14, SEG26, SCS61_0; CMOS Schmitt input, pull-up about 52 kΩ, optional open-drain output, IOH −5 mA / IOL 5 mA.
62 P75 bidirectional General-purpose I/O P75 (circuit type A, analog input capable) with alternate functions INT15_0, A15, SEG27, SCS60_0; CMOS Schmitt input, pull-up about 52 kΩ, optional open-drain output, IOH −5 mA / IOL 5 mA.
63 P76 bidirectional General-purpose I/O P76 (circuit type B) with alternate functions INT11_2, SEG28, CTS6_1; CMOS Schmitt input, pull-up about 52 kΩ, optional open-drain output, IOH −5 mA / IOL 5 mA.
64 DVSS power_in Digital ground pin (DVSS = 0 V).

Key specifications

Parameter Value
Manufacturer XHSC
Package LQFP-64(10x10)
Category Embedded Processors & Controllers
Pins 64

Electrical characteristics

Limits as printed in the datasheet (page.json metadata.characteristics carries them as data).

Parameter Symbol Min Typ Max Unit Conditions Page
Supply voltage (DVCC and AVCC) absolute max VCC -0.3 5.8 V DVSS=0 V; DVCC not below DVSS-0.3 V 41
Input voltage absolute max VI -0.3 5.8 V 41
Output voltage absolute max VO -0.3 5.8 V 41
L-level max output current, 12 mA class IO port IOL 12.8 mA peak single pin (*3) 41
L-level max output current, 5 mA class IO port IOL 5.1 mA peak single pin (*3) 41
L-level average output current per pin IOLAV 5 mA average per pin over 100 ms (*4) 41
L-level total max output current, all pins ∑IOL 100 mA 41
L-level total average output current, all pins ∑IOLAV 50 mA average over 100 ms, all pins (*5) 41
H-level max output current, 12 mA class IO port IOH 12.8 mA peak single pin (*3); printed without sign 41
H-level max output current, 5 mA class IO port IOH 5.1 mA peak single pin (*3); printed without sign 41
H-level average output current per pin IOHAV 5 mA average per pin over 100 ms (*4) 41
H-level total max output current, all pins ∑IOH 100 mA 41
H-level total average output current, all pins ∑IOHAV 50 mA average over 100 ms, all pins (*5) 41
Power dissipation PD 165 mW 41
Storage temperature TSTG -55 150 °C 41
Supply voltage DVCC DVCC 2.7 5.5 V LCD not used (*1) 42
Supply voltage AVCC AVCC 2.7 5.5 V must be the same as DVCC (*2) 42
LCD supply voltage VLCD 2.7 V upper limit is DVCC 42
Voltage regulator filter capacitor CS 1 10 µF voltage regulator filter pin (*3) 42
Operating temperature Ta -40 85 °C 42
Operating current, run, PLL mode Icc 11.8 12.4 mA 48 MHz; run from flash; PLL; NOP; CKENx stops all peripheral clocks 43
Operating current, run, internal high-speed oscillator Icc 1.5 2.1 mA 4 MHz; NOP; CKENx stops all peripheral clocks 43
Operating current, run, external high-speed crystal Icc 1.5 2.2 mA 4 MHz; NOP; internal oscillator stopped; CKENx stops all peripheral clocks 43
Operating current, run, 48 MHz external clock input Icc 10.4 10.8 mA 48 MHz; NOP; internal high-speed oscillator stopped; PCLK1 peripheral bus clock stopped 43
Operating current, run, external low-speed crystal Icc 492 858 µA 32.768 kHz; NOP; CKENx stops all peripheral clocks 43
Operating current, run, internal low-speed oscillator Icc 503 853 µA 32 kHz; NOP; CKENx stops all peripheral clocks 43
Sleep current, PLL mode Iccs 2.4 3 mA 48 MHz; CPU sleep; CKENx stops all peripheral clocks 43
Sleep current, internal high-speed oscillator Iccs 0.7 1.3 mA 4 MHz; CPU sleep; CKENx stops all peripheral clocks 43
Sleep current, external high-speed crystal Iccs 0.9 1.7 mA 4 MHz; CPU sleep; CKENx stops all peripheral clocks 43
LCD bias voltage VR03, 1/4 bias VR03 -10 10 % VR03 = DVCC x 1/4, internal divider, LCD contrast 100% 47
LCD bias voltage VR13, 1/4 bias VR13 -10 10 % VR13 = DVCC x 1/2, internal divider, LCD contrast 100% 47
LCD bias voltage VR23, 1/4 bias VR23 -10 10 % VR23 = DVCC x 3/4, internal divider, LCD contrast 100% 47
LCD bias voltage VR33, 1/4 bias VR33 -10 10 % VR33 = DVCC, internal divider, LCD contrast 100% 47
LCD bias voltage VR03, 1/3 bias VR03 -10 10 % VR03 = DVCC x 1/3, internal divider, LCD contrast 100% 47
LCD bias voltage VR13, 1/3 bias VR13 -10 10 % VR13 = DVCC x 2/3, internal divider, LCD contrast 100% 47
LCD bias voltage VR23, 1/3 bias VR23 -10 10 % VR23 = DVCC, internal divider, LCD contrast 100% 47
LCD bias voltage VR33, 1/3 bias VR33 -10 10 % VR33 = DVCC, internal divider, LCD contrast 100% 47
External high-speed crystal input frequency FCH 4 48 MHz external high-speed crystal 48
External high-speed clock input frequency FCH 4 48 MHz external high-speed clock 48
External high-speed clock input period tCYLH 20.83 250 ns external high-speed clock 48
External high-speed clock duty cycle PWH/Tcylh, PWL/Tcylh 45 55 % external high-speed clock 48
External high-speed clock rise/fall time tCF, tCR 5 ns external high-speed clock 48
Main internal circuit clock frequency FCM 48 MHz main clock 48
Basic clock frequency (HCLK/FCLK) FCC 48 MHz HCLK/FCLK 48
APB0 bus clock frequency FCP0 48 MHz APB0 bus clock 48
APB1 bus clock frequency FCP1 38 MHz APB1 bus clock as printed 48
External low-speed clock input frequency 1/tCYLL 32 50 kHz external low-speed clock 49
External low-speed clock input period tCYLL 20 31.25 µs external low-speed clock 49
External low-speed clock duty cycle PWH/Tcyll, PWL/Tcyll 45 55 % external low-speed clock 49
SWDIO setup time tSWS 15 ns external load CL=30 pF (table note) 72
SWDIO hold time tSWH 15 ns external load CL=30 pF (table note) 72
SWDIO delay time tSWD 45 ns external load CL=30 pF (table note) 72
ADC dynamic current, no reference signal IADC 0.5 0.6 mA 1 Msample/s; AVCC>=3 V 73
ADC capture time TADCACQ 4 8 12 cycles 73
ADC conversion time TADCCONV 20 24 28 cycles 73
ADC effective number of bits ENOB 10 Bits 1 Msample/s 73
ADC signal-to-noise and distortion ratio SNDR 65 72 dB 73
ADC differential nonlinearity DNL -1 1 LSB 73
ADC integral nonlinearity INL -3 3 LSB 73

CAD (KiCad official)

  • Symbol: HC32F146KATA-LQFP64
  • Footprint: Package_QFP:LQFP-64_10x10mm_P0.5mm
  • 3D model: LQFP-64(10x10) (KiCad packages3D, STEP)
  • 3D model files: hc32f146kata-lqfp64-etched.step / hc32f146kata-lqfp64-etched.glb carry the MPN laser-etched on the die in a toggleable Adom.LaserEtch group (Fusion-ready); hc32f146kata-lqfp64.step / hc32f146kata-lqfp64.glb are the bare package body.

Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

  • Datasheet: XHSC datasheet (94 pp, sha256 5432c3d8e35770c9, retrieved 2026-10-19, tier: lcsc)
  • Datasheet language: Chinese. Pin names, descriptions, and specs on this page were extracted and translated to English by ds2sf; the linked PDF is the manufacturer original.
  • Extractor: parts-factory 2.0.0 / extract_pins 0.3, primary claude-haiku-5-5 (text), consensus claude-sonnet-5-5 (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
  • CAD: KiCad official libraries (CC-BY-SA 4.0).

Datasheet PDF