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Ray Publish 0.1.0 d7cf4eb 9d ago
{
  "slug": "hc32f005c6pb-tssop20",
  "version": "0.1.0",
  "type": "component",
  "description": "XHSC Microcontrollers (MCU/MPU/SOC), TSSOP-20. Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.",
  "tags": [
    "component",
    "embedded processors & controllers",
    "hc32f005c6pb-tssop20",
    "factory-2.0.0",
    "extractor-text"
  ],
  "dependencies": {},
  "hero": {
    "type": "image",
    "path": "docs/hero.png"
  },
  "files": [
    "page.json",
    "README.md",
    "hc32f005c6pb-tssop20.kicad_sym",
    "hc32f005c6pb-tssop20.kicad_mod",
    "hc32f005c6pb-tssop20.glb",
    "hc32f005c6pb-tssop20.step",
    "hc32f005c6pb-tssop20.lbr",
    "docs/hero.png",
    "docs/hc32f005c6pb-tssop20-datasheet.pdf",
    "viewers/symbol.html",
    "viewers/footprint.html",
    "hc32f005c6pb-tssop20-hero.glb",
    "hc32f005c6pb-tssop20-hero.overlay.json",
    "hc32f005c6pb-tssop20-etched.glb"
  ],
  "component": {
    "mpn": "HC32F005C6PB-TSSOP20",
    "manufacturer": "XHSC",
    "package": "TSSOP-20",
    "pin_count": 20,
    "category": "Embedded Processors & Controllers",
    "subcategory": "Microcontrollers (MCU/MPU/SOC)",
    "datasheet": "https://jlcpcb.com/api/file/downloadByFileSystemAccessId/8590223435059400704",
    "parts": {
      "symbol": "hc32f005c6pb-tssop20.kicad_sym",
      "footprint": "hc32f005c6pb-tssop20.kicad_mod",
      "model_3d": "hc32f005c6pb-tssop20-hero.glb",
      "model_3d_plain": "hc32f005c6pb-tssop20-etched.glb",
      "model_3d_step": "hc32f005c6pb-tssop20-etched.step",
      "model_3d_step_plain": "hc32f005c6pb-tssop20.step",
      "lbr": "hc32f005c6pb-tssop20.lbr"
    },
    "distributor_links": {
      "lcsc": "C784651"
    },
    "distributor_check": {
      "checked_at": "2026-10-18T18:09:32Z",
      "source": "Component Ocean /api/assign-pns",
      "digikey": {
        "pn": null,
        "status": "quota"
      },
      "mouser": {
        "pn": null,
        "status": "quota"
      }
    },
    "pins": [
      {
        "number": "1",
        "name": "P34",
        "type": "bidirectional",
        "description": "General-purpose digital I/O P34 with alternate functions PCA_CH0, TIM5_CHA, TIM0_EXT, TIM4_CHA, TIM1_TOG and analog input AIN4/VC4."
      },
      {
        "number": "2",
        "name": "P35",
        "type": "bidirectional",
        "description": "General-purpose digital I/O P35 with alternate functions UART1_TXD, TIM6_CHB, UART0_TXD, TIM0_GATE, TIM4_CHB, SPI_MISO, I2C_SDA and analog input AIN5/VC5; the datasheet recommends reserving P35 and P36 as the ISP programming interface."
      },
      {
        "number": "3",
        "name": "P36",
        "type": "bidirectional",
        "description": "General-purpose digital I/O P36 with alternate functions UART1_RXD, TIM6_CHA, UART0_RXD, PCA_CH4, TIM5_CHA, SPI_MOSI, I2C_SCL and analog input AIN6/VC6/AVREF; the datasheet recommends reserving P35 and P36 as the ISP programming interface."
      },
      {
        "number": "4",
        "name": "RESETB/P00",
        "type": "input",
        "description": "Active-low reset input RESETB (CMOS, internal weak pull-up about 80 kΩ, input filter pulse 3 µs, non-filtered pulse 20 µs); the pin also serves as digital input P00."
      },
      {
        "number": "5",
        "name": "XTHI/AIN7/VCIN7/P01",
        "type": "bidirectional",
        "description": "XTH crystal/external clock input XTHI (4~32 MHz) shared with general-purpose I/O P01, analog input AIN7/VC7 and alternate functions UART0_RXD, I2C_SDA, UART1_TXD, TIM0_TOG, TIM5_CHB, SPI_SCK, TIM2_EXT."
      },
      {
        "number": "6",
        "name": "XTHO/AIN8/P02",
        "type": "bidirectional",
        "description": "XTH crystal oscillator output XTHO shared with general-purpose I/O P02, analog input AIN8 and alternate functions UART0_TXD, I2C_SCL, UART1_RXD, TIM0_TOGN, TIM6_CHA, SPI_CS, TIM2_GATE."
      },
      {
        "number": "7",
        "name": "AVSS/DVSS",
        "type": "power_in",
        "description": "Chip ground (GND) for both analog and digital circuits; all VSS pins must be connected to the external supply system within its allowed range."
      },
      {
        "number": "8",
        "name": "VCAP",
        "type": "power_out",
        "description": "Output of the internal LDO core supply, for internal circuit use only, to be connected to a 4.7 µF capacitor."
      },
      {
        "number": "9",
        "name": "AVCC/DVCC",
        "type": "power_in",
        "description": "Chip power supply, 1.8~5.5 V; decoupling capacitors should be placed close to each supply pin, and VCC-VSS absolute maximum is 5.5 V."
      },
      {
        "number": "10",
        "name": "LVDIN1/P03",
        "type": "bidirectional",
        "description": "General-purpose digital I/O P03 with alternate functions PCA_CH3, SPI_CS, TIM6_CHB, PCA_ECI, VC0_OUT and LVD analog input LVDIN1."
      },
      {
        "number": "11",
        "name": "P15",
        "type": "bidirectional",
        "description": "General-purpose digital I/O P15 with alternate functions I2C_SDA, TIM2_TOG, TIM4_CHB, SPI_SCK, UART0_RXD and LVD_OUT."
      },
      {
        "number": "12",
        "name": "P14",
        "type": "bidirectional",
        "description": "General-purpose digital I/O P14 with alternate functions I2C_SCL, TIM2_TOGN, PCA external clock ECI, ADC_RDY, SPI_CS and UART0_TXD."
      },
      {
        "number": "13",
        "name": "P23/LVDIN2/VCIN0",
        "type": "bidirectional",
        "description": "General-purpose digital I/O P23 with alternate functions TIM6_CHA, TIM4_CHB, TIM4_CHA, PCA_CH0, SPI_MISO, UART1_TXD, IR_OUT (38 kHz carrier) and LVD/comparator analog input LVDIN2/VC0."
      },
      {
        "number": "14",
        "name": "P24/AIN0",
        "type": "bidirectional",
        "description": "General-purpose digital I/O P24 with alternate functions TIM4_CHB, TIM5_CHB, HCLK_OUT, PCA_CH1, SPI_MOSI, UART1_RXD, VC1_OUT and analog input AIN0."
      },
      {
        "number": "15",
        "name": "P25/LVDIN3/VC1",
        "type": "bidirectional",
        "description": "General-purpose digital I/O P25 with alternate functions SPI_SCK, PCA_CH0, TIM5_CHA, LVD_OUT, I2C_SDA, TIM1_GATE and analog input LVDIN3/VC1."
      },
      {
        "number": "16",
        "name": "P26/AIN1",
        "type": "bidirectional",
        "description": "General-purpose digital I/O P26 with alternate functions SPI_MOSI, TIM4_CHA, TIM5_CHB, PCA_CH2, I2C_SCL, TIM1_EXT and analog input AIN1."
      },
      {
        "number": "17",
        "name": "P27/SWDIO",
        "type": "bidirectional",
        "description": "General-purpose digital I/O P27 with alternate functions SPI_MISO, TIM5_CHA, TIM6_CHA, PCA_CH3, UART0_RXD, RCH_OUT, XTH_OUT, and the SWD debug data pin SWDIO; also an optional ISP programming pin."
      },
      {
        "number": "18",
        "name": "P31/SWCLK",
        "type": "bidirectional",
        "description": "General-purpose digital I/O P31 with alternate functions PCA_ECI, PCLK_OUT, VC0OUT, UART0_TXD, RCL_OUT, HCLK_OUT, and the SWD debug clock pin SWCLK; also an optional ISP programming pin."
      },
      {
        "number": "19",
        "name": "P32/AIN2/VCIN2",
        "type": "bidirectional",
        "description": "General-purpose digital I/O P32 with alternate functions PCA_CH2, TIM6_CHB, VC1OUT, UART1_TXD, PCA_CH4 and analog input AIN2/VC2."
      },
      {
        "number": "20",
        "name": "P33/AIN3/VCIN3",
        "type": "bidirectional",
        "description": "General-purpose digital I/O P33 with alternate functions PCA_CH1, TIM5_CHB, PCA_ECI, UART1_RXD, TIM1_TOGN and analog input AIN3/VC3."
      }
    ],
    "provenance": {
      "extractor": "extract_pins 0.3",
      "factory_chain": {
        "factory": "2.0.0",
        "extractor": "extract_pins 0.3",
        "primary_model": "claude-haiku-5-5",
        "primary_mode": "text",
        "consensus_model": "claude-sonnet-5-5",
        "consensus": "agreed",
        "guards": "pin_guards 0.1: passed",
        "guard_notes": [
          "extractor flagged: Pin assignments for TSSOP20 were taken from the TSSOP20 pin diagram on page 16 and cross-checked aga; Pin 7 is labeled AVSS/DVSS and pin 9 is AVCC/DVCC in the diagram; the datasheet does not split these; Pin types for multiplexed GPIO pins are classed as bidirectional, which is my KiCad mapping, not a d"
        ],
        "pages_sent": 39,
        "cost_usd": 0.1475,
        "at": "2026-10-18T18:07:28"
      },
      "datasheet": {
        "url": "https://jlcpcb.com/api/file/downloadByFileSystemAccessId/8590223435059400704",
        "pages": 65,
        "sha256": "32e17fb33a932a3d",
        "source_tier": "lcsc"
      },
      "cad": "KiCad official (CC-BY-SA 4.0)",
      "pins": {
        "total": 20,
        "described": 20,
        "cites_pages": true,
        "refuses_to_fabricate": true
      }
    },
    "viewers": {
      "symbol": "viewers/symbol.html",
      "footprint": "viewers/footprint.html"
    },
    "models_3d": [
      {
        "file": "hc32f005c6pb-tssop20.step",
        "role": "plain",
        "up": "Z",
        "units": "mm",
        "origin": "footprint origin = pad-pattern centre",
        "seat": "z = 0",
        "extents_mm": [
          6.4,
          6.5,
          1.2
        ],
        "zmin_mm": -0.0,
        "centre_offset_mm": 0.0,
        "footprint_binding": "identity",
        "sha256": "97339947f3a7196470ec2f1d9f9b92bb2fc2ab66ad53be0cf105192585ef3c9a",
        "checked": "2026-10-18",
        "checked_by": "factory/step_pose.py (Z-up, origin, seat, binding)"
      },
      {
        "file": "hc32f005c6pb-tssop20-etched.step",
        "role": "eda",
        "up": "Z",
        "units": "mm",
        "origin": "footprint origin = pad-pattern centre",
        "seat": "z = 0",
        "extents_mm": [
          6.4,
          6.5,
          1.2
        ],
        "zmin_mm": -0.0,
        "centre_offset_mm": 0.0,
        "footprint_binding": "identity",
        "sha256": "35d1f35cedca546c3c978b0c872461617924c6786d2df2f1c7d4edc680bbd944",
        "checked": "2026-10-18",
        "checked_by": "factory/step_pose.py (Z-up, origin, seat, binding)"
      }
    ]
  }
}