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HC32A4A0PITI-LQFP100

Public Made by Adom

by adom

XHSC Microcontrollers (MCU/MPU/SOC), LQFP-100(14x14). Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.

componentembedded processors & controllershc32a4a0piti-lqfp100factory-2.0.0extractor-text
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3D Model

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Symbol & Footprint

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Contents

README

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HC32A4A0PITI-LQFP100

XHSC · Microcontrollers (MCU/MPU/SOC) · LQFP-100(14x14)

HC32A4A0PITI-LQFP100 from XHSC, in a LQFP-100(14x14). Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.

Pinout

Pin Name Type Function
1 PE2 bidirectional General-purpose I/O PE2 with 5 V withstand per Table 2-4; alternate functions include EIRQ2, TRACECLK, FCMREF and serial group FG2.
2 PE3 bidirectional General-purpose I/O PE3 with 5 V withstand per Table 2-4; alternate functions include EIRQ3, TRACED0, USART6_CK and serial group FG2.
3 PE4 bidirectional General-purpose I/O PE4 with 5 V withstand per Table 2-4; alternate functions include EIRQ4, TRACED1, USART6_CTS and serial group FG2.
4 PE5 bidirectional General-purpose I/O PE5 with 5 V withstand per Table 2-4; alternate functions include EIRQ5, TRACED2, CTCREF, USART6_RTS and serial group FG2.
5 PE6 bidirectional General-purpose I/O PE6 with 5 V withstand per Table 2-4; alternate functions include EIRQ6, TRACED3, TIMA_9_TRIG and serial group FG2.
6 VBAT power_in Backup battery supply, 1.65 V to 3.6 V per Table 3-5; short to VCC with a 100 nF decoupling capacitor when not in use.
7 PC13 bidirectional General-purpose I/O PC13 with 5 V withstand per Table 2-4; alternate functions include RTCIC0 timestamp input, EIRQ13/WKUP3_1 and RTC_OUT.
8 PC14/XTAL32_OUT output 32 kHz sub-clock oscillator output XTAL32_OUT, also GPIO PC14 with 5 V withstand per Table 2-4 and alternate EIRQ14.
9 PC15/XTAL32_IN input 32 kHz sub-clock oscillator input XTAL32_IN, also GPIO PC15 with 5 V withstand per Table 2-4 and alternate EIRQ15.
10 VSS power_in Source ground, connected to 0 V.
11 VCC power_in Power supply, connect to 1.8 V to 3.6 V per Table 3-5 with a nearby decoupling capacitor to VSS.
12 PH0/XTAL_IN input External master clock oscillator input XTAL_IN, also GPIO PH0 with 5 V withstand per Table 2-4 and alternate EIRQ0.
13 PH1/XTAL_OUT output External master clock oscillator output XTAL_OUT, also GPIO PH1 with 5 V withstand per Table 2-4 and alternate EIRQ1.
14 NRST input Reset input, active low; connect a resistor to VCC (pull-up) when not in use.
15 PC0 bidirectional General-purpose I/O PC0 with 5 V withstand per Table 2-4; alternate functions include ADC123_IN10, CMP3_INP4, EIRQ0 and serial group FG3.
16 PC1 bidirectional General-purpose I/O PC1 with 5 V withstand per Table 2-4; alternate functions include ADC123_IN11, EIRQ1 and serial group FG3.
17 PC2 bidirectional General-purpose I/O PC2 with 5 V withstand per Table 2-4; alternate functions include ADC123_IN12, EIRQ2 and serial group FG3.
18 PC3 bidirectional General-purpose I/O PC3 with 5 V withstand per Table 2-4; alternate functions include ADC123_IN13, CMP1_INM4, EIRQ3 and serial group FG3.
19 VCC power_in Power supply, connect to 1.8 V to 3.6 V per Table 3-5 with a nearby decoupling capacitor to VSS.
20 AVSS_VREFL power_in Analog power ground shared with the analog reference low pin VREFL; connect to the same voltage as VSS.
21 VREFH power_in Analog reference voltage input, must not be higher than AVCC; short to AVCC when the ADC is not used.
22 AVCC power_in Analog power supply, connect to the same voltage as VCC and short to VCC when the analog module is not used.
23 PA0 bidirectional General-purpose I/O PA0 without 5 V withstand per Table 2-4; analog input ADC123_IN0 and PGA_1 must not exceed VREFH/AVCC.
24 PA1 bidirectional General-purpose I/O PA1 without 5 V withstand per Table 2-4; analog input ADC123_IN1 and PGA_2 must not exceed VREFH/AVCC.
25 PA2 bidirectional General-purpose I/O PA2 without 5 V withstand per Table 2-4; analog input ADC123_IN2 and PGA_3 must not exceed VREFH/AVCC.
26 PA3 bidirectional General-purpose I/O PA3 with 5 V withstand per Table 2-4; alternate functions include ADC123_IN3, PGA123_VSS, CMP1_INP4 and serial group FG2.
27 AVSS power_in Analog power ground, connect to the same voltage as VSS.
28 AVCC power_in Analog power supply, connect to the same voltage as VCC.
29 PA4 bidirectional General-purpose I/O PA4 with 5 V withstand per Table 2-4; alternate functions include ADC12_IN4, DAC1_OUT1, CMP2_INP3 and serial group FG1.
30 PA5 bidirectional General-purpose I/O PA5 with 5 V withstand per Table 2-4; alternate functions include ADC12_IN5, DAC1_OUT2, CMP2_INP4 and serial group FG1.
31 PA6 bidirectional General-purpose I/O PA6 without 5 V withstand per Table 2-4; alternate functions include ADC12_IN6, PGA_4, CMP1_INP2 and serial group FG1.
32 PA7 bidirectional General-purpose I/O PA7 with 5 V withstand per Table 2-4; alternate functions include ADC12_IN7, PGA4_VSS, CMP123_INM3 and serial group FG1.
33 PC4 bidirectional General-purpose I/O PC4 with 5 V withstand per Table 2-4; alternate functions include ADC12_IN14, DAC2_OUT1, CMP2_INM4 and serial group FG1.
34 PC5 bidirectional General-purpose I/O PC5 with 5 V withstand per Table 2-4; alternate functions include ADC12_IN15, DAC2_OUT2, CMP3_INM4 and serial group FG1.
35 PB0 bidirectional General-purpose I/O PB0 with 5 V withstand per Table 2-4; alternate functions include ADC12_IN8, CMP3_INP2, EIRQ0 and serial group FG1.
36 PB1 bidirectional General-purpose I/O PB1 with 5 V withstand per Table 2-4; alternate functions include ADC12_IN9, CMP3_INP3, EIRQ1/WKUP0_1 and serial group FG1.
37 PB2/PVD2EXINP bidirectional General-purpose I/O PB2 with 5 V withstand per Table 2-4; PVD2EXINP is the PVD2 external input compare voltage, also alternate EIRQ2/WKUP0_2.
38 PE7 bidirectional General-purpose I/O PE7 with 5 V withstand per Table 2-4; alternate functions include ADTRG1, EIRQ7 and serial group FG2.
39 PE8 bidirectional General-purpose I/O PE8 with 5 V withstand per Table 2-4; alternate functions include CTCREF, EIRQ8 and serial group FG2.
40 PE9 bidirectional General-purpose I/O PE9 with 5 V withstand per Table 2-4; alternate functions include ADTRG3, EIRQ9 and serial group FG2.
41 PE10 bidirectional General-purpose I/O PE10 with 5 V withstand per Table 2-4; alternate functions include CMP1_INP3, EIRQ10 and serial group FG3.
42 PE11 bidirectional General-purpose I/O PE11 with 5 V withstand per Table 2-4; alternate functions include EIRQ11, USBHS_ULPI_D7 and serial group FG3.
43 PE12 bidirectional General-purpose I/O PE12 with 5 V withstand per Table 2-4; alternate functions include CMP4_INM3, EIRQ12 and serial group FG3.
44 PE13 bidirectional General-purpose I/O PE13 with 5 V withstand per Table 2-4; alternate functions include CMP4_INM4, EIRQ13 and serial group FG3.
45 PE14 bidirectional General-purpose I/O PE14 with 5 V withstand per Table 2-4; alternate functions include CMP4_INP3, EIRQ14 and serial group FG3.
46 PE15 bidirectional General-purpose I/O PE15 with 5 V withstand per Table 2-4; alternate functions include CMP4_INP4, EIRQ15 and serial group FG3.
47 PB10 bidirectional General-purpose I/O PB10 with 5 V withstand per Table 2-4; alternate functions include ADTRG2, EIRQ10 and serial group FG3.
48 PB11 bidirectional General-purpose I/O PB11 with 5 V withstand per Table 2-4; alternate functions include EIRQ11 and serial group FG3.
49 VCAP_1 passive Core voltage stabilization pin; Table 2-6 states it is connected to VSS to stabilize the core voltage.
50 VCC power_in Power supply, connect to 1.8 V to 3.6 V per Table 3-5 with a nearby decoupling capacitor to VSS.
51 PB12 bidirectional General-purpose I/O PB12 with 5 V withstand per Table 2-4; alternate functions include VCOUT1, USBHS_ULPI_D5, USBHS_ID and serial group FG1.
52 PB13 bidirectional General-purpose I/O PB13 with 5 V withstand per Table 2-4; alternate functions include VCOUT2, USBHS_ULPI_D6, USBHS_VBUS and serial group FG1.
53 PB14/USBHS_DM bidirectional General-purpose I/O PB14 without 5 V withstand per Table 2-4; USBHS_DM is the USB high-speed on-chip full-speed PHY D- signal.
54 PB15/USBHS_DP bidirectional General-purpose I/O PB15 without 5 V withstand per Table 2-4; USBHS_DP is the USB high-speed on-chip full-speed PHY D+ signal.
55 PD8 bidirectional General-purpose I/O PD8 with 5 V withstand per Table 2-4; alternate functions include VCOUT4, USBHS_DRVVBUS, EXMC_DATA13 and serial group FG1.
56 PD9 bidirectional General-purpose I/O PD9 with 5 V withstand per Table 2-4; alternate functions include VCOUT3, USBHS_ULPI_D4, EXMC_DATA14 and serial group FG1.
57 PD10 bidirectional General-purpose I/O PD10 with 5 V withstand per Table 2-4; alternate functions include CAN2_TST_SAMPLE, EXMC_DATA15 and serial group FG1.
58 PD11 bidirectional General-purpose I/O PD11 with 5 V withstand per Table 2-4; alternate functions include CAN2_TST_CLOCK, EXMC_ADD16 and serial group FG1.
59 PD12 bidirectional General-purpose I/O PD12 with 5 V withstand per Table 2-4; alternate functions include EIRQ12, EXMC_ADD17 and serial group FG3.
60 PD13 bidirectional General-purpose I/O PD13 with 5 V withstand per Table 2-4; alternate functions include EIRQ13, EXMC_ADD18 and serial group FG3.
61 PD14 bidirectional General-purpose I/O PD14 with 5 V withstand per Table 2-4; alternate functions include ADTRG1, EXMC_DATA0 and serial group FG3.
62 PD15 bidirectional General-purpose I/O PD15 with 5 V withstand per Table 2-4; alternate functions include ADTRG2, EXMC_DATA1 and serial group FG3.
63 PC6 bidirectional General-purpose I/O PC6 with 5 V withstand per Table 2-4; alternate functions include EIRQ6, DVP_DATA0 and serial group FG3.
64 PC7 bidirectional General-purpose I/O PC7 with 5 V withstand per Table 2-4; alternate functions include EIRQ7, DVP_DATA1 and serial group FG3.
65 PC8 bidirectional General-purpose I/O PC8 with 5 V withstand per Table 2-4; alternate functions include EIRQ8, DVP_DATA2 and serial group FG2.
66 PC9 bidirectional General-purpose I/O PC9 with 5 V withstand per Table 2-4; alternate functions include EIRQ9, MCO_2, USBFS_DRVVBUS and serial group FG2.
67 PA8 bidirectional General-purpose I/O PA8 with 5 V withstand per Table 2-4; alternate functions include EIRQ8/WKUP2_0, MCO_1, USBFS_SOF and serial group FG2.
68 PA9 bidirectional General-purpose I/O PA9 with 5 V withstand per Table 2-4; alternate functions include EIRQ9/WKUP2_1, USBFS_VBUS and serial group FG2.
69 PA10 bidirectional General-purpose I/O PA10 with 5 V withstand per Table 2-4; alternate functions include EIRQ10/WKUP2_2, USBFS_ID and serial group FG2.
70 PA11/USBFS_DM bidirectional General-purpose I/O PA11 without 5 V withstand per Table 2-4; USBFS_DM is the USB full-speed on-chip PHY D- signal.
71 PA12/USBFS_DP bidirectional General-purpose I/O PA12 without 5 V withstand per Table 2-4; USBFS_DP is the USB full-speed on-chip PHY D+ signal.
72 PA13/JTMS_SWDIO bidirectional General-purpose I/O PA13 with 5 V withstand per Table 2-4; JTMS_SWDIO is the online debug interface (SWD data) signal.
73 VCAP_2 passive Core voltage stabilization pin; Table 2-6 states it is connected to VSS to stabilize the core voltage.
74 VSS power_in Source ground, connected to 0 V.
75 VCC power_in Power supply, connect to 1.8 V to 3.6 V per Table 3-5 with a nearby decoupling capacitor to VSS.
76 PA14/JTCK_SWCLK bidirectional General-purpose I/O PA14 with 5 V withstand per Table 2-4; JTCK_SWCLK is the online debug interface clock, also alternate EIRQ14/WKUP3_2 and serial group FG1.
77 PA15/JTDI bidirectional General-purpose I/O PA15 with 5 V withstand per Table 2-4; JTDI is the JTAG data input, also alternate EIRQ15/WKUP3_3 and serial group FG1.
78 PC10 bidirectional General-purpose I/O PC10 with 5 V withstand per Table 2-4; alternate functions include EIRQ10, CAN1_TST_SAMPLE and serial group FG3.
79 PC11 bidirectional General-purpose I/O PC11 with 5 V withstand per Table 2-4; alternate functions include EIRQ11, CAN1_TST_CLOCK and serial group FG3.
80 PC12 bidirectional General-purpose I/O PC12 with 5 V withstand per Table 2-4; alternate functions include EIRQ12, DVP_DATA9 and serial group FG3.
81 PD0 bidirectional General-purpose I/O PD0 with 5 V withstand per Table 2-4; alternate functions include EIRQ0, VCOUT, EXMC_DATA2 and serial group FG3.
82 PD1 bidirectional General-purpose I/O PD1 with 5 V withstand per Table 2-4; alternate functions include EIRQ1, EXMC_DATA3 and serial group FG3.
83 PD2 bidirectional General-purpose I/O PD2 with 5 V withstand per Table 2-4; alternate functions include EIRQ2, VCOUT4, DVP_DATA11 and serial group FG3.
84 PD3 bidirectional General-purpose I/O PD3 with 5 V withstand per Table 2-4; alternate functions include EIRQ3, VCOUT1, DVP_DATA5 and serial group FG3.
85 PD4 bidirectional General-purpose I/O PD4 with 5 V withstand per Table 2-4; alternate functions include EIRQ4, VCOUT2, DVP_DATA12 and serial group FG2.
86 PD5 bidirectional General-purpose I/O PD5 with 5 V withstand per Table 2-4; alternate functions include EIRQ5, VCOUT3, EXMC_WE and serial group FG2.
87 PD6 bidirectional General-purpose I/O PD6 with 5 V withstand per Table 2-4; alternate functions include ADTRG1, EXMC_RB0, DVP_DATA10 and serial group FG2.
88 PD7 bidirectional General-purpose I/O PD7 with 5 V withstand per Table 2-4; alternate functions include ADTRG2, EXMC_CE0 and serial group FG2.
89 PB3/JTDO_TRACESWO bidirectional General-purpose I/O PB3 with 5 V withstand per Table 2-4; JTDO_TRACESWO is the JTAG/SWO trace output, also alternate EIRQ3/WKUP0_3 and serial group FG1.
90 PB4/NJTRST bidirectional General-purpose I/O PB4 with 5 V withstand per Table 2-4; NJTRST is the JTAG test reset input, also alternate EIRQ4/WKUP1_0 and serial group FG1.
91 PB5 bidirectional General-purpose I/O PB5 with 5 V withstand per Table 2-4; alternate functions include ADTRG3, EIRQ5/WKUP1_1, USBHS_ULPI_D7 and serial group FG1.
92 PB6 bidirectional General-purpose I/O PB6 with 5 V withstand per Table 2-4; alternate functions include ADTRG2, EIRQ6/WKUP1_2, EXMC_CE1 and serial group FG1.
93 PB7 bidirectional General-purpose I/O PB7 with 5 V withstand per Table 2-4; alternate functions include ADTRG1, EIRQ7/WKUP1_3, EXMC_ADV and serial group FG1.
94 PI13/MD bidirectional General-purpose I/O PI13 with 5 V withstand per Table 2-4; MD is the mode input, which must be held low when NRST is released (a 4.7 kΩ pull-down to VSS is recommended).
95 PB8 bidirectional General-purpose I/O PB8 with 5 V withstand per Table 2-4; alternate functions include EIRQ8, USBFS_DRVVBUS, ETH_MII_TXD3 and serial group FG1.
96 PB9 bidirectional General-purpose I/O PB9 with 5 V withstand per Table 2-4; alternate functions include EIRQ9, ETH_MII_TXD2, DVP_DATA7 and serial group FG1.
97 PE0 bidirectional General-purpose I/O PE0 with 5 V withstand per Table 2-4; alternate functions include EIRQ0, MCO_1, EXMC_CE4 and serial group FG1.
98 PE1 bidirectional General-purpose I/O PE1 with 5 V withstand per Table 2-4; alternate functions include EIRQ1, MCO_2, EXMC_CE5 and serial group FG1.
99 VSS power_in Source ground, connected to 0 V.
100 VCC power_in Power supply, connect to 1.8 V to 3.6 V per Table 3-5 with a nearby decoupling capacitor to VSS.

Key specifications

Parameter Value
Manufacturer XHSC
Package LQFP-100(14x14)
Category Embedded Processors & Controllers
Pins 100

Electrical characteristics

Limits as printed in the datasheet (page.json metadata.characteristics carries them as data).

Parameter Symbol Min Typ Max Unit Conditions Page
External mains voltage (including AVCC, VCC, and VBAT) VCC -VSS -0.3 4 V 58
Input voltage on pins other than PA11/USBFS_DM, PA12/USBFS_DP, PB14/USBHS_DM, PB15/USBHS_DP, PA0, PA1, PA2, PA6 VIN -0.3 5.8 V Max printed as VCC+4.0 (Max 5.8V) 58
Input voltage on pins PA11/USBFS_DM, PA12/USBFS_DP, PB14/USBHS_DM, PB15/USBHS_DP, PA0, PA1, PA2, PA6 VIN -0.3 4 V Max printed as Vcc+0.7 (Max 4.0V) 58
Total current flowing into all VCC X power lines (sourced) ΣIVCC 240 mA 59
Total current flowing out of all VSS X ground wires (sinking current) ΣIVSS -240 mA 59
Maximum current flowing into each VCC X power line (source current) IVCC 100 mA 59
Maximum current flowing out of each VSS X ground wire (sink current) IVSS -100 mA 59
Arbitrary I/O and control pin output current IIO 20 mA 59
Output pull current of any I/O and control pin IIO -20 mA 59
Total output sink current on all I/O and control pins ΣIIO 120 mA 59
Total output source current on all I/O and control pins ΣIIO -120 mA 59
Storage temperature range TSTG -65 150 °C 59
Maximum Junction Temperature Range TJ -40 125 °C 59
Internal AHB clock frequency fHCLK 240 MHz High Speed Mode; PWRC2.DVS=11, PWRC2.DDAS=1111, PWRC3.DDAS=0xff 60
Internal AHB clock frequency fHCLK 8 MHz Super low speed mode; PWRC2.DVS=10, PWRC2.DDAS=0000, PWRC3.DDAS=0x00 60
Standard operating voltage VCC 1.8 3.6 V 60
Analog working voltage VAVCC 1.8 3.6 V 60
Backup working voltage VBAT 1.65 3.6 V 60
Input Voltage on 5V Tolerant Pin VIN -0.3 5.5 V 2 V ≤ VCC ≤ 3.6 V; 2 V ≤ AVCC ≤ 3.6 V 60
Input Voltage on 5V Tolerant Pin VIN -0.3 5.2 V VCC < 2 V; AVCC < 2V 60
Input voltage on pins PA11/USBFS_DM, PA12/USBFS_DP, PB14/USBHS_DM, PB15/USBHS_DP, PA0, PA1, PA2, PA6 VIN -0.3 V Max printed as VCC+0.3 60
VCC rise time rate tVCC 20 20000 µs/V 60
VCC fall time rate 20 20000 µs/V 60
Power-on/power-off reset threshold VPOR 1.6 1.68 1.8 V Rising edge VPOR 61
Power-on/power-off reset threshold VPOR 1.56 1.64 1.76 V Falling edge VPOR 61
NRST reset minimum width TNRST 10 µs 61
NRST reset release time TINRST 25 35 50 µs 61
Power-on reset release time TRSTPOR 2500 3000 µs 61
User external timer frequency fXTAL_EXT 1 25 MHz 73
XTAL_IN rise or fall time tr(XTAL) tf(XTAL) 5 ns 73
Duty ratio Duty(XTAL) 40 60 % 73
Oscillator frequency fXTAL_IN 4 25 MHz 73
XTAL accuracy AXTAL -500 500 ppm 73
Start time tSU(XTAL) 2 ms VCC is stable, crystal oscillator=8MHz 73
XTAL32 precision AXTAL32 -500 500 ppm 75
Frequency Accuracy -3 3 % TA = -40 to 105 °C 76
Frequency Accuracy -1.5 1.5 % TA = 25℃ 76
Frequency (MRC oscillator) fMRC 7.2 8 8.8 MHz 76
Frequency (LRC oscillator) fLRC 27.853 32.768 37.683 kHz 76
Frequency (SWDTLRC oscillator) fSWDTLRC 9 10 11 kHz 76
Frequency (RTCRC oscillator) fRRC 29.5 32.768 36 kHz 77
I2S-PLL (PLLA) PFD input clock fPLL_IN 1 25 MHz 77
I2S-PLL (PLLA) multiplier output clock fPLL_OUT 15 240 MHz 77
I2S-PLL (PLLA) VCO output fVCO_OUT 240 480 MHz 77
I2S-PLL (PLLA) lock time tLOCK 80 120 µs 77
System PLL (PLLH) PFD input clock fPLL_IN 8 25 MHz 77
System PLL (PLLH) multiplier output clock fPLL_OUT 37.5 600 MHz 77
System PLL (PLLH) VCO output fVCO_OUT 600 1200 MHz 77
System PLL (PLLH) lock time tLOCK 80 120 µs 77
Supply current (flash read mode) IVCC 5 mA Read mode, VCC =1.8 V~3.6V 78
Supply current (flash programming mode) IVCC 10 mA Programming mode, VCC =1.8 V~3.6V 78
Programming, number of block erases Nend 10 kcycles TA = 85℃ 78
Data retention period Tret 10 years TA = 85℃, after 10 kcycles 78
Electrostatic discharge voltage (HBM) VESD(HBM) 2000 V TA = + 25 ° C, compliant with JESD22-A114 79
Electrostatic discharge voltage (charging device model) VESD(CDM) 500 V TA = + 25 ° C, JESD22-C101 compliant 79
Static Latch-up LU 200 mA TA =+105 °C per JESD78A 79
I/O input leakage current ILKG 1 µA VSS≤VIN≤VCC 80
I/O input leakage current ILKG 10 µA VIN = 5.5V 80
Run mode supply current (high speed mode, while(1), full-module clock ON) ICC_RUN 120 mA fHCLK = 240MHz, Ta=85°C 63
Run mode supply current (high speed mode, while(1), full-module clock ON) ICC_RUN 160 mA fHCLK = 240MHz, Ta=105°C 63

CAD (KiCad official)

  • Symbol: HC32A4A0PITI-LQFP100
  • Footprint: Package_QFP:LQFP-100_14x14mm_P0.5mm
  • 3D model: LQFP-100(14x14) (KiCad packages3D, STEP)
  • 3D model files: hc32a4a0piti-lqfp100-etched.step / hc32a4a0piti-lqfp100-etched.glb carry the MPN laser-etched on the die in a toggleable Adom.LaserEtch group (Fusion-ready); hc32a4a0piti-lqfp100.step / hc32a4a0piti-lqfp100.glb are the bare package body.

Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

  • Datasheet: XHSC datasheet (127 pp, sha256 e4f680ef91bd6cc5, retrieved 2026-10-18, tier: lcsc)
  • Extractor: parts-factory 2.0.0 / extract_pins 0.3, primary claude-haiku-5-5 (text), consensus claude-sonnet-5-5 (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
  • CAD: KiCad official libraries (CC-BY-SA 4.0).

Datasheet PDF