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HC32A460PETB-LQFP100

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XHSC Microcontroller Units (MCUs/MPUs/SOCs), LQFP-100(14x14). Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.

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HC32A460PETB-LQFP100

XHSC · Microcontroller Units (MCUs/MPUs/SOCs) · LQFP-100(14x14)

HC32A460PETB-LQFP100 from XHSC, in a LQFP-100(14x14). Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.

Pinout

Pin Name Type Function
1 PE2 bidirectional GPIO PE2 with EIRQ2, TRACECK, TIMA_3_PWM5, USART3_CK and EVENTOUT functions.
2 PE3 bidirectional GPIO PE3 with EIRQ3, TRACED0, TIMA_3_PWM6, USART4_CK and EVENTOUT functions.
3 PE4 bidirectional GPIO PE4 with EIRQ4, TRACED1, TIMA_3_PWM7 and EVENTOUT functions.
4 PE5 bidirectional GPIO PE5 with EIRQ5, TRACED2, TIMA_3_PWM8 and EVENTOUT functions.
5 PE6 bidirectional GPIO PE6 with EIRQ6, TRACED3 and EVENTOUT functions.
6 PH2 bidirectional GPIO PH2 with EIRQ2, FCMREF, TIM4_2_CLK, TIMA_4_PWM7, EMB_IN4, SDIO2_D4, I2S3_EXCK and EVENTOUT functions.
7 PC13 bidirectional GPIO PC13 with EIRQ13, RTC_OUT, TIMA_4_PWM8, SDIO2_CK, I2S3_MCK and EVNTP313 functions.
8 PC14/XTAL32_OUT bidirectional GPIO PC14 or external 32 kHz oscillator output XTAL32_OUT, with EIRQ14 and TIMA_4_PWM5.
9 PC15/XTAL32_IN bidirectional GPIO PC15 or external 32 kHz oscillator input XTAL32_IN, with EIRQ15 and TIMA_4_PWM6.
10 VSS power_in Digital supply ground, connected to 0 V.
11 VCC power_in Digital power supply, 1.8 V to 3.6 V, decoupled to nearby VSS.
12 PH0/XTAL_IN bidirectional GPIO PH0 or external main clock oscillator input XTAL_IN (4-24 MHz), with EIRQ0 and TIMA_5_PWM3.
13 PH1/XTAL_OUT bidirectional GPIO PH1 or external main clock oscillator output XTAL_OUT, with EIRQ1 and TIMA_5_PWM4.
14 NRST input Active-low reset pin; pull up to VCC through a resistor when unused.
15 PC0/ADC12_IN10 bidirectional GPIO PC0 with analog inputs ADC12_IN10 and CMP3_INP3, EIRQ0, TIMA_2_PWM5, SDIO2_D5.
16 PC1/ADC12_IN11 bidirectional GPIO PC1 with analog input ADC12_IN11, EIRQ1, TIMA_2_PWM6, SDIO2_D6.
17 PC2/ADC1_IN12 bidirectional GPIO PC2 with analog input ADC1_IN12, EIRQ2, TIMA_2_PWM7, EMB_IN3, SDIO2_D7.
18 PC3/ADC1_IN13 bidirectional GPIO PC3 with analog inputs ADC1_IN13 and CMP1_INM2, EIRQ3, TIMA_2_PWM8, SDIO1_WP.
19 VCC power_in Digital power supply, 1.8 V to 3.6 V, decoupled to nearby VSS.
20 AVSS/VREFL power_in Analog ground and reference voltage low; connect to the same voltage as AVSS (VSS if analog unused).
21 VREFH power_in Analog reference voltage for ADC1 and ADC2, must not exceed AVCC; tie to AVCC if ADC unused.
22 AVCC power_in Analog power supply at the same voltage as VCC (1.8-3.6 V); short to VCC if analog unused.
23 PA0/ADC1_IN0 bidirectional GPIO PA0 with ADC1_IN0, CMP1_INP1, EIRQ0/WKUP0_0, TIM4_2_OUH, TIMA_2_PWM1, SPI1_SS1, SDIO2_D4.
24 PA1/ADC1_IN1 bidirectional GPIO PA1 with ADC1_IN1, CMP1_INP2, EIRQ1, TIM4_2_OUL, TIMA_2_PWM2, SPI1_SS2, SDIO2_D5.
25 PA2/ADC1_IN2 bidirectional GPIO PA2 with ADC1_IN2, CMP1_INP3, EIRQ2, TIM4_2_OVH, TIMA_2_PWM3, SPI1_SS3, SDIO2_D6.
26 PA3/ADC1_IN3 bidirectional GPIO PA3 with ADC1_IN3, PGAVSS, CMP1_INP4, EIRQ3, TIM4_2_OVL, TIMA_2_PWM4, SDIO2_D7.
27 AVSS power_in Analog supply ground.
28 AVCC power_in Analog power supply at the same voltage as VCC (1.8-3.6 V).
29 PA4/ADC12_IN4 bidirectional GPIO PA4 with ADC12_IN4, CMP2_INP1, CMP3_INP4, EIRQ4, TIM4_2_OWH, USART2_CK, KEYOUT0, I2S1_EXCK.
30 PA5/ADC12_IN5 bidirectional GPIO PA5 with ADC12_IN5, CMP2_INP2, EIRQ5, TIM4_2_OWL, TIMA_2_PWM1, KEYOUT1, I2S1_MCK.
31 PA6/ADC12_IN6 bidirectional GPIO PA6 with ADC12_IN6, CMP2_INP3, EIRQ6, TIMA_3_PWM1, EMB_IN2, KEYOUT2, SDIO1_CMD.
32 PA7/ADC12_IN7 bidirectional GPIO PA7 with ADC12_IN7, CMP1/2/3_INM1, EIRQ7, TIM4_1_OUL, TIM6_1_PWMB, EMB_IN3, KEYOUT3, SDIO2_WP.
33 PC4/ADC1_IN14 bidirectional GPIO PC4 with ADC1_IN14, CMP2_INM2, EIRQ4, TIM4_2_OUH, USART1_CK, SDIO2_CD.
34 PC5/ADC1_IN15 bidirectional GPIO PC5 with ADC1_IN15, CMP3_INM2, EIRQ5, TIM4_2_OUL, SDIO2_CMD.
35 PB0/ADC12_IN8 bidirectional GPIO PB0 with ADC12_IN8, CMP3_INP1, EIRQ0, TIM4_1_OVL, TIM6_2_PWMB, USART4_CK, KEYOUT4, SDIO2_CMD.
36 PB1/ADC12_IN9 bidirectional GPIO PB1 with ADC12_IN9, CMP3_INP2, EIRQ1/WKUP0_1, TIM4_1_OWL, QSPI_QSSN, KEYOUT5, SDIO2_D3, I2S2_EXCK.
37 PB2/PVD2EXINP bidirectional GPIO PB2 with PVD2EXINP external PVD2 comparison input, EIRQ2/WKUP0_2, VCOUT123, QSPI_QSIO3, SDIO2_D2, I2S2_MCK.
38 PE7 bidirectional GPIO PE7 with EIRQ7, ADTRG1, TIM6_TRIGA, TIMA_1_TRIG, USART1_CK.
39 PE8 bidirectional GPIO PE8 with EIRQ8, TIM4_1_OUL, TIM6_1_PWMB, TIMA_1_PWM5.
40 PE9 bidirectional GPIO PE9 with EIRQ9, TIM4_1_OUH, TIM6_1_PWMA, TIMA_1_PWM1.
41 PE10 bidirectional GPIO PE10 with EIRQ10, TIM4_1_OVL, TIM6_2_PWMB, TIMA_1_PWM6.
42 PE11 bidirectional GPIO PE11 with EIRQ11, TIM4_1_OVH, TIM6_2_PWMA, TIMA_1_PWM2.
43 PE12 bidirectional GPIO PE12 with EIRQ12, TIM4_1_OWL, TIM6_3_PWMB, TIMA_1_PWM7, SPI1_SS1.
44 PE13 bidirectional GPIO PE13 with EIRQ13, TIM4_1_OWH, TIM6_3_PWMA, TIMA_1_PWM3, SPI1_SS2.
45 PE14 bidirectional GPIO PE14 with EIRQ14, TIM4_1_CLK, TIMA_1_PWM4, SPI1_SS3, SDIO1_CD.
46 PE15 bidirectional GPIO PE15 with EIRQ15, TIMA_1_PWM8, TIMA_5_TRIG, EMB_IN2, USART4_CK, SDIO1_WP.
47 PB10 bidirectional GPIO PB10 with EIRQ10, ADTRG2, TIM4_2_OVH, QSPI_QSIO2, SDIO1_D7, I2S3_EXCK.
48 VCAP_1 passive Core voltage pin; connect 0.047 µF or 0.1 µF capacitor (ESR < 0.3 Ω) to VSS.
49 VSS power_in Digital supply ground, connected to 0 V.
50 VCC power_in Digital power supply, 1.8 V to 3.6 V, decoupled to nearby VSS.
51 PB12 bidirectional GPIO PB12 with EIRQ12, VCOUT1, TIM4_2_OVL, TIM6_TRIGB, EMB_IN2, QSPI_QSIO1, SDIO2_D1, I2S3_MCK.
52 PB13 bidirectional GPIO PB13 with EIRQ13, VCOUT2, TIM4_1_OUL, TIM6_1_PWMB, QSPI_QSIO0, SDIO2_D0.
53 PB14 bidirectional GPIO PB14 with EIRQ14, VCOUT3, TIM4_1_OVL, TIM6_2_PWMB, QSPI_QSCK, SDIO1_D6.
54 PB15 bidirectional GPIO PB15 with EIRQ15, RTC_OUT, TIM4_1_OWL, TIM6_3_PWMB, EMB_IN4, USART3_CK, SDIO1_CK.
55 PD8 bidirectional GPIO PD8 with EIRQ8, TIM4_3_OUL, TIMA_6_PWM1, QSPI_QSIO0, KEYOUT7.
56 PD9 bidirectional GPIO PD9 with EIRQ9, TIM4_3_OVL, TIMA_6_PWM2, QSPI_QSIO1, KEYOUT6.
57 PD10 bidirectional GPIO PD10 with EIRQ10, TIM4_3_OWL, TIMA_6_PWM3, QSPI_QSIO2, KEYOUT5.
58 PD11 bidirectional GPIO PD11 with EIRQ11, TIM4_3_CLK, TIMA_6_PWM4, QSPI_QSIO3, KEYOUT4.
59 PD12 bidirectional GPIO PD12 with EIRQ12, TIMA_4_PWM1, TIMA_5_PWM5.
60 PD13 bidirectional GPIO PD13 with EIRQ13, TIMA_4_PWM2, TIMA_5_PWM6.
61 PD14 bidirectional GPIO PD14 with EIRQ14, TIMA_4_PWM3, TIMA_5_PWM7.
62 PD15 bidirectional GPIO PD15 with EIRQ15, TIMA_4_PWM4, TIMA_5_PWM8.
63 PC6 bidirectional GPIO PC6 with EIRQ6, TIMA_3_PWM1, TIMA_5_PWM8, QSPI_QSCK, KEYOUT3, SDIO1_D6.
64 PC7 bidirectional GPIO PC7 with EIRQ7, TIM4_2_CLK, TIMA_3_PWM2, TIMA_5_PWM7, QSPI_QSSN, KEYOUT2, SDIO1_D7, I2S2_EXCK.
65 PC8 bidirectional GPIO PC8 with EIRQ8, TIM4_2_OWH, TIMA_3_PWM3, TIMA_5_PWM6, USART3_CK, KEYOUT1, SDIO1_D0, I2S2_MCK.
66 PC9 bidirectional GPIO PC9 with EIRQ9, MCO_2 clock output, TIM4_2_OWL, TIMA_3_PWM4, TIMA_5_PWM5, KEYOUT0, SDIO1_D1.
67 PA8 bidirectional GPIO PA8 with EIRQ8/WKUP2_0, MCO_1 clock output, TIM4_1_OUH, TIM6_1_PWMA, USART1_CK, SDIO1_D1, USBFS_SOF.
68 PA9/USBFS_VBUS bidirectional GPIO PA9 with USBFS_VBUS input, EIRQ9/WKUP2_1, TIM4_1_OVH, TIM6_2_PWMA, SDIO1_D2.
69 PA10/USBFS_ID bidirectional GPIO PA10 with USBFS_ID input, EIRQ10/WKUP2_2, TIM4_1_OWH, TIM6_3_PWMA, SDIO1_CD.
70 PA11/USBFS_DM bidirectional GPIO PA11 or USBFS D- signal; not 5V tolerant (input max VCC+0.3 V), with EIRQ11/WKUP2_3.
71 PA12/USBFS_DP bidirectional GPIO PA12 or USBFS D+ signal; not 5V tolerant (input max VCC+0.3 V), with EIRQ12/WKUP3_0.
72 PA13/JTMS_SWDIO bidirectional GPIO PA13 or JTAG JTMS / SWD SWDIO debug data pin, with EIRQ13/WKUP3_1.
73 VCAP_2 passive Core voltage pin; connect 0.047 µF or 0.1 µF capacitor (ESR < 0.3 Ω) to VSS.
74 VSS power_in Digital supply ground, connected to 0 V.
75 VCC power_in Digital power supply, 1.8 V to 3.6 V, decoupled to nearby VSS.
76 PA14/JTCK_SWCLK bidirectional GPIO PA14 or JTAG JTCK / SWD SWCLK debug clock, with EIRQ14/WKUP3_2.
77 PA15/JTDI bidirectional GPIO PA15 or JTAG JTDI, with EIRQ15/WKUP3_3.
78 PC10 bidirectional GPIO PC10 with EIRQ10, TIM4_3_OUH, TIMA_2_PWM7, TIMA_5_PWM1, SDIO1_D2.
79 PC11 bidirectional GPIO PC11 with EIRQ11, TIM4_3_OVH, TIMA_2_PWM8, TIMA_5_PWM2, SDIO1_D3.
80 PC12 bidirectional GPIO PC12 with EIRQ12, TIM4_3_OWH, TIMA_4_TRIG, TIMA_5_PWM3, SDIO1_CK.
81 PD0 bidirectional GPIO PD0 with EIRQ0, VCOUT123, TIMA_5_PWM4.
82 PD1 bidirectional GPIO PD1 with EIRQ1, TIMA_3_TRIG, TIMA_6_PWM5.
83 PD2 bidirectional GPIO PD2 with EIRQ2, TIMA_2_PWM4, TIMA_6_PWM6, SDIO1_CMD.
84 PD3 bidirectional GPIO PD3 with EIRQ3, VCOUT1, TIMA_6_PWM7.
85 PD4 bidirectional GPIO PD4 with EIRQ4, VCOUT2, TIMA_6_PWM8.
86 PD5 bidirectional GPIO PD5 with EIRQ5 and VCOUT3.
87 PD6 bidirectional GPIO PD6 with EIRQ6 and USART2_CK.
88 PD7 bidirectional GPIO PD7 with EIRQ7 and USART2_CK.
89 PB3/JTDO_TRACESWO bidirectional GPIO PB3 or JTAG JTDO / TRACESWO debug output, with EIRQ3/WKUP0_3, FCMREF, TIM4_3_CLK, SDIO2_D0.
90 PB4/NJTRST bidirectional GPIO PB4 or JTAG NJTRST, with EIRQ4/WKUP1_0, TIM4_3_OWL, TIMA_3_PWM1, SDIO1_D0.
91 PB5 bidirectional GPIO PB5 with EIRQ5/WKUP1_1, TIM4_3_OWH, TIMA_3_PWM2, SDIO1_D3, I2S4_EXCK.
92 PB6 bidirectional GPIO PB6 with EIRQ6/WKUP1_2, ADTRG2, TIM4_3_OVL, TIMA_4_PWM1, SDIO2_CK, I2S4_MCK.
93 PB7 bidirectional GPIO PB7 with EIRQ7/WKUP1_3, ADTRG1, TIM4_3_OVH, TIMA_4_PWM2, SDIO1_D0.
94 PB11/MD input Input-only mode pin (NMI); must be held high when NRST is released, 4.7 kΩ pull-up to VCC recommended.
95 PB8 bidirectional GPIO PB8 with EIRQ8, TIM4_3_OUL, TIMA_4_PWM3, KEYOUT7, SDIO1_D4, USBFS_DRVVBUS.
96 PB9 bidirectional GPIO PB9 with EIRQ9, TIM4_3_OUH, TIMA_4_PWM4, TIMA_6_TRIG, SPI2_SS1, KEYOUT6, SDIO1_D5.
97 PE0 bidirectional GPIO PE0 with EIRQ0, MCO_1 clock output, TIMA_4_TRIG, SPI2_SS2.
98 PE1 bidirectional GPIO PE1 with EIRQ1, MCO_2 clock output, TIM4_3_CLK, SPI2_SS3.
99 VSS power_in Digital supply ground, connected to 0 V.
100 VCC power_in Digital power supply, 1.8 V to 3.6 V, decoupled to nearby VSS.

Key specifications

Parameter Value
Manufacturer XHSC
Package LQFP-100(14x14)
Category Single Chip Microcomputer/Microcontroller
Pins 100

Electrical characteristics

Limits as printed in the datasheet (page.json metadata.characteristics carries them as data).

Parameter Symbol Min Typ Max Unit Conditions Page
Supply voltage VCC 1.8 3.6 V 系统电源 2
Operating temperature -40 105 °C HC32A460PETB, 工业级 12
USB FS operating voltage VCC 3 3.6 V USB Full-Speed 77
USB FS input low level VIL 0.8 V 77
USB FS input high level VIH 2 V 77
USB FS differential input sensitivity VDI 0.2 V 77
USB FS differential common mode voltage VCM 0.8 2.5 V 77
USB FS static output low level VOL 0.3 V RL=1.5kΩ to 3.6V 77
USB FS static output high level VOH 2.8 3.6 V RL=15kΩ to VSS 77
USB FS cross-over voltage VCRS 1.3 2 V CL=50pF 77
USB FS rise time tR 4 20 ns CL=50pF, 10%~90% of /VOH-VOL/ 77
USB FS fall time tF 4 20 ns CL=50pF, 10%~90% of /VOH-VOL/ 77
USB FS rise/fall time ratio tRFMA 90 111.1 % CL=50pF 77
USB FS pull-down resistance RPD 14.25 24.8 kΩ VIN= VCC, in host mode 77
USB FS pull-up resistance, idle RPU 0.9 1.2 1.575 kΩ VIN= VSS, idle state 77
USB FS pull-up resistance, device mode RPU 1.425 2.3 3.09 kΩ VIN= VSS, in device mode 77
USB LS cross-over voltage VCRS 1.3 2 V CL=200pF~600pF 78
USB LS rise time tR 75 300 ns CL=200pF~600pF, 10%~90% of /VOH-VOL/ 78
USB LS fall time tF 75 300 ns CL=200pF~600pF, 10%~90% of /VOH-VOL/ 78
USB LS rise/fall time ratio tRFMA 80 125 % CL=200pF~600pF 78
PLL input clock fPLL_IN 1 24 MHz 79
PLL multiplier output clock fPLL_OUT 15 240 MHz 79
PLL VCO output fVCO_OUT 240 480 MHz 79
PLL lock time tLOCK 80 120 µs 79
PLL period jitter JitterPLL 200 ps PLL输入时钟=4MHz 系统时钟=120MHz 79
I2S clock frequency, master fCK 20 MHz Master data: 32 bits (max printed 64*Fs) 71
I2S clock duty cycle DCK 30 70 % Slave receiver 71
I2S WS valid time tv(WS) 6 ns Master mode 71
I2S data input setup, master receiver tsu(SD_MR) 22 ns Master receiver(2.7V~3.6V) 71
I2S data input setup, slave receiver tsu(SD_SR) 7 ns Slave receiver 71
I2S data output valid, master transmitter tv(SD_MT) 10 ns Master transmitter(after enable edge) 71
I2C SCL frequency, standard mode fSCL 0 100 KHz 标准模式(SM) 73
I2C SCL frequency, fast mode fSCL 0 400 KHz 快速模式(FM) 73
I2C SCL low time, fast mode tLOW 1.3 us 快速模式(FM) 73
I2C SCL high time, fast mode tHIGH 0.6 us 快速模式(FM) 73
I2C rise time, standard mode tR 1000 ns 标准模式(SM) 73
I2C rise time, fast mode tR 6.5 300 ns 快速模式(FM) 73
I2C load capacitance Cb 400 pF SM and FM 73
SPI data input setup, slave tsu(SI) 4 ns slave mode 1.8V≤Vcc≤3.6V 74
SPI data input hold, slave th(SI) 3 ns slave mode 1.8V≤Vcc≤3.6V 74
SPI data output valid, slave tv(SO) 15 ns slave mode 2.7V≤Vcc≤3.6V 74
SPI data output valid, slave tv(SO) 26 ns slave mode 1.8V≤Vcc＜2.7V 74
SPI data input setup, master tsu(MI) 5 ns master mode 2.7V≤Vcc≤3.6V 74
SPI data input setup, master tsu(MI) 9 ns master mode 1.8V≤Vcc＜2.7V 74
SPI data output valid, master tv(MO) 4 ns master mode 2.7V≤Vcc≤3.6V 75
SPI data output valid, master tv(MO) 9 ns master mode 1.8V≤Vcc≤2.7V 75

CAD (KiCad official)

  • Symbol: HC32A460PETB-LQFP100
  • Footprint: Package_QFP:LQFP-100_14x14mm_P0.5mm
  • 3D model: LQFP-100(14x14) (KiCad packages3D, STEP)
  • 3D model files: hc32a460petb-lqfp100-etched.step / hc32a460petb-lqfp100-etched.glb carry the MPN laser-etched on the die in a toggleable Adom.LaserEtch group (Fusion-ready); hc32a460petb-lqfp100.step / hc32a460petb-lqfp100.glb are the bare package body.

Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

  • Datasheet: XHSC datasheet (105 pp, sha256 8af76011ea47fd03, retrieved 2026-10-23, tier: lcsc)
  • Datasheet language: Chinese. Pin names, descriptions, and specs on this page were extracted and translated to English by ds2sf; the linked PDF is the manufacturer original.
  • Extractor: parts-factory 2.0.0 / extract_pins 0.3, primary claude-sonnet-5-5 (text), consensus claude-sonnet-5-5 (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
  • CAD: KiCad official libraries (CC-BY-SA 4.0).

Datasheet PDF