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HAT2016R-VB

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VBsemi Elec MOSFETs, SO-8. Pinout extracted from the datasheet, KiCad symbol/footprint/3D.

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docs hat2016r-vb: re-etch, flat white mark read from pin 1 (service-occt 1.4.0) + chip hero · Ray 1mo ago
viewers hat2016r-vb: viewers · Ray 1mo ago
hat2016r-vb-etched.fit.json hat2016r-vb: re-etch, flat white mark read from pin 1 (service-occt 1.4.0) + chip hero · Ray 1mo ago
hat2016r-vb-etched.glb hat2016r-vb: re-etch, flat white mark read from pin 1 (service-occt 1.4.0) + chip hero · Ray 1mo ago
hat2016r-vb-etched.step hat2016r-vb: re-etch, flat white mark read from pin 1 (service-occt 1.4.0) + chip hero · Ray 1mo ago
hat2016r-vb.glb Publish 0.1.0 · Ray 1mo ago
hat2016r-vb.kicad_mod Publish 0.1.0 · Ray 1mo ago
hat2016r-vb.kicad_sym Publish 0.1.0 · Ray 1mo ago
hat2016r-vb.lbr Publish 0.1.0 · Ray 1mo ago
hat2016r-vb.step Publish 0.1.0 · Ray 1mo ago
package.json Publish 0.1.0 · Ray 1mo ago
page.json hat2016r-vb: specified limits as data (metadata.characteristics, 41 rows from the datasheet) · Ray 24d ago
README.md hat2016r-vb: specified limits as data (metadata.characteristics, 41 rows from the datasheet) · Ray 24d ago

HAT2016R-VB

VBsemi Elec · MOSFETs · SO-8

HAT2016R-VB from VBsemi Elec, in a SO-8. Pinout and pin descriptions extracted from the manufacturer datasheet by ds2sf; symbol, footprint, and 3D from KiCad-official CAD.

Pinout

Pin Name Type Function
1 S1 passive Source of MOSFET 1 (N-channel). Body-diode anode reference for MOSFET 1; connect to the low-side rail or the shared source node in synchronous topologies.
2 G1 input Gate of MOSFET 1. VGS(th) = 1.0-2.5 V; absolute maximum VGS = ±20 V. Drive relative to S1; a gate resistor (typ. 4.3 Ω internal Rg) shapes switching di/dt.
3 S2 passive Source of MOSFET 2 (N-channel). Body-diode anode reference for MOSFET 2; independent from S1 inside the package.
4 G2 input Gate of MOSFET 2. VGS(th) = 1.0-2.5 V; absolute maximum VGS = ±20 V. Drive relative to S2.
5 D2 passive Drain of MOSFET 2 (N-channel). VDS(max) = 30 V. Tied to pin 6 internally for current handling and thermal spreading.
6 D2 passive Drain of MOSFET 2 (N-channel). VDS(max) = 30 V. Parallel with pin 5.
7 D1 passive Drain of MOSFET 1 (N-channel). VDS(max) = 30 V. Tied to pin 8 internally for current handling and thermal spreading.
8 D1 passive Drain of MOSFET 1 (N-channel). VDS(max) = 30 V. Parallel with pin 7.

Key specifications

Parameter Value
Manufacturer VBsemi Elec
Package SO-8
Category Transistors/Thyristors
Pins 8

Ordering variants

Same part, different packaging or reel option.

  • HAT2016R-VB

Electrical characteristics

Limits as printed in the datasheet (page.json metadata.characteristics carries them as data).

Parameter Symbol Min Typ Max Unit Conditions Page
Drain-Source Voltage VDS 30 V 1
Gate-Source Voltage VGS -20 20 V 1
Continuous Drain Current ID 6.8 A TC = 25 °C, package limited (note a); column inferred from scrambled text 1
Continuous Drain Current ID 5.6 A TC = 70 °C; column inferred from scrambled text 1
Continuous Drain Current ID 6.2 A TA = 25 °C, notes b, c (t ≤ 10 s) 1
Continuous Drain Current ID 5.2 A TA = 70 °C, note c 1
Pulsed Drain Current IDM 30 A 1
Continuous Source-Drain Diode Current IS 2.25 A TC = 25 °C 1
Continuous Source-Drain Diode Current IS 1.48 A TA = 25 °C, notes b, c 1
Single Pulse Avalanche Current IAS 5 A L = 0.1 mH 1
Single Pulse Avalanche Energy EAS 1.25 mJ 1
Maximum Power Dissipation PD 2.7 W TC = 25 °C 1
Maximum Power Dissipation PD 1.77 W TC = 70 °C 1
Maximum Power Dissipation PD 1.78 W TA = 25 °C, notes b, c 1
Maximum Power Dissipation PD 1.14 W TA = 70 °C, notes b, c 1
Operating Junction and Storage Temperature Range TJ, Tstg -55 150 °C 1
Maximum Junction-to-Ambient RthJA 58 70 °C/W t ≤ 10 s, notes a, c, d 1
Maximum Junction-to-Ambient (Steady State) RthJA 110 °C/W Steady State, note d 1
Maximum Junction-to-Foot (Drain) RthJF 38 45 °C/W Steady State 1
Drain-Source Breakdown Voltage V(BR)DSS 30 V VGS = 0 V, ID = 250 µA 2
Gate-Source Threshold Voltage VGS(th) 1 2.5 V VDS = VGS, ID = 250 µA 2
Gate-Source Leakage IGSS -100 100 nA VDS = 0 V, VGS = ± 20 V 2
Zero Gate Voltage Drain Current IDSS 1 µA VDS = 30 V, VGS = 0 V; column inferred 2
Zero Gate Voltage Drain Current IDSS 10 µA VDS = 30 V, VGS = 0 V, TJ = 55 °C; column inferred 2
On-State Drain Current ID(on) 10 A VDS ≥ 5 V, VGS = 10 V; column inferred 2
Drain-Source On-State Resistance RDS(on) 0.026 Ω VGS = 4.5 V, ID = 4 A; column inferred 2
Gate Resistance Rg 0.8 4.3 8.6 Ω f = 1 MHz 2
Total Gate Charge Qg 3.7 5.6 nC VDS = 15 V, VGS = 4.5 V, ID = 5 A; column inferred 2
Turn-On Delay Time (VGEN = 4.5 V) td(on) 12 24 ns VDD = 15 V, RL = 3 Ω, ID ≅ 5 A, VGEN = 4.5 V, Rg = 1 Ω; column inferred 2
Rise Time (VGEN = 4.5 V) tr 55 100 ns VDD = 15 V, RL = 3 Ω, ID ≅ 5 A, VGEN = 4.5 V, Rg = 1 Ω; column inferred 2
Turn-Off Delay Time (VGEN = 4.5 V) td(off) 11 22 ns VDD = 15 V, RL = 3 Ω, ID ≅ 5 A, VGEN = 4.5 V, Rg = 1 Ω; column inferred 2
Fall Time (VGEN = 4.5 V) tf 8 16 ns VDD = 15 V, RL = 3 Ω, ID ≅ 5 A, VGEN = 4.5 V, Rg = 1 Ω; column inferred 2
Turn-On Delay Time (VGEN = 10 V) td(on) 4 8 ns VDD = 15 V, RL = 3 Ω, ID ≅ 5 A, VGEN = 10 V, Rg = 1 Ω; column inferred 2
Rise Time (VGEN = 10 V) tr 9 18 ns VDD = 15 V, RL = 3 Ω, ID ≅ 5 A, VGEN = 10 V, Rg = 1 Ω; column inferred 2
Turn-Off Delay Time (VGEN = 10 V) td(off) 10 20 ns VDD = 15 V, RL = 3 Ω, ID ≅ 5 A, VGEN = 10 V, Rg = 1 Ω; column inferred 2
Fall Time (VGEN = 10 V) tf 6 12 ns VDD = 15 V, RL = 3 Ω, ID ≅ 5 A, VGEN = 10 V, Rg = 1 Ω; column inferred 2
Continuous Source-Drain Diode Current IS 2.25 A TC = 25 °C 2
Pulse Diode Forward Current ISM 24 A 2
Body Diode Voltage VSD 0.8 1.2 V IS = 2 A, VGS = 0 V 2
Body Diode Reverse Recovery Time trr 11 20 ns IF = 5 A, dI/dt = 100 A/µs, TJ = 25 °C; column inferred 2
Body Diode Reverse Recovery Charge Qrr 4 8 nC IF = 5 A, dI/dt = 100 A/µs, TJ = 25 °C; column inferred 2

CAD (KiCad official)

  • Symbol: HAT2016R-VB
  • Footprint: Package_SO:SOIC-8_3.9x4.9mm_P1.27mm
  • 3D model: SO-8 (KiCad packages3D, STEP)
  • 3D model files: hat2016r-vb-etched.step / hat2016r-vb-etched.glb carry the MPN laser-etched on the die in a toggleable Adom.LaserEtch group (Fusion-ready); hat2016r-vb.step / hat2016r-vb.glb are the bare package body.

Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

  • Datasheet: VBsemi Elec datasheet (9 pp, sha256 ee54425995fbd427, retrieved 2026-08-17, tier: lcsc)
  • Extractor: ds2sf (Claude). Every pin and dimension is cited to a datasheet page; it refuses to fabricate.
  • CAD: KiCad official libraries (CC-BY-SA 4.0).

Datasheet PDF