component
HA9P5127-5Z
Public Made by Adomby adom
RENESAS Operational Amplifier, SOIC-8. Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.
3D Model
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Symbol & Footprint
Schematic Symbol
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PCB Footprint
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Datasheet
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Contents
README
markdownHA9P5127-5Z
RENESAS · Operational Amplifier · SOIC-8
HA9P5127-5Z from RENESAS, in a SOIC-8. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.
Pinout
| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | BAL | passive | Offset balance terminal that pairs with pin 8 for an external 10k offset-adjust trimmer (typical range ±4mV with RT = 10kΩ). |
| 2 | -IN | input | Inverting input; differential input voltage is limited to 0.7V, and above that the input current must be limited to 25mA. |
| 3 | +IN | input | Non-inverting input; differential input voltage is limited to 0.7V, and above that the input current must be limited to 25mA. |
| 4 | V- | power_in | Negative supply terminal, also the substrate potential; supply between V+ and V- is rated 44V maximum with operation from ±5V to ±15V. |
| 5 | NC | unconnected | No internal connection. |
| 6 | OUT | output | Amplifier output with full short circuit protection, typical output current 25mA and swing of ±13.5V to ±13.8V into 2kΩ. |
| 7 | V+ | power_in | Positive supply terminal; supply between V+ and V- is rated 44V maximum with operation from ±5V to ±15V. |
| 8 | BAL | passive | Offset balance terminal that pairs with pin 1 for an external 10k offset-adjust trimmer whose wiper goes to V+. |
Key specifications
| Parameter | Value |
|---|---|
| Manufacturer | RENESAS |
| Package | SOIC-8 |
| Category | Operational Amplifier/Comparator |
| Pins | 8 |
Electrical characteristics
Limits as printed in the datasheet (page.json metadata.characteristics carries them as data).
| Parameter | Symbol | Min | Typ | Max | Unit | Conditions | Page |
|---|---|---|---|---|---|---|---|
| Supply voltage between V+ and V- | 44 | V | 2 | ||||
| Differential input voltage | 0.7 | V | Note 7 | 2 | |||
| Maximum junction temperature (plastic) | 150 | °C | Plastic package | 2 | |||
| Storage temperature range | -65 | 150 | °C | 2 | |||
| Operating temperature range | 0 | 75 | °C | HA5127/27A-5 | 2 | ||
| Thermal resistance junction-ambient | θJA | 157 | °C/W | SOIC package, typical, Note 6 | 2 | ||
| Offset Voltage (Full) | VOS | 70 | 300 | μV | VSUPPLY=±15V, Full temp | 2 | |
| Average Offset Voltage Drift | 0.4 | 1.8 | μV/°C | Full | 2 | ||
| Bias Current (25°C) | IB | 15 | 80 | nA | 25°C | 2 | |
| Bias Current (Full) | IB | 35 | 150 | nA | Full | 2 | |
| Offset Current (25°C) | IOS | 12 | 75 | nA | 25°C | 2 | |
| Offset Current (Full) | IOS | 30 | 135 | nA | Full | 2 | |
| Common Mode Range | 10.3 | 11.5 | V | Full (printed ±10.3 / ±11.5) | 2 | ||
| Differential Input Resistance | 0.8 | 4 | MΩ | 25°C, Note 8 | 2 | ||
| Input Noise Voltage | 0.09 | 0.25 | μVP-P | 0.1Hz to 10Hz, 25°C | 2 | ||
| Input Noise Voltage Density | 3.8 | 8 | nV/√Hz | f = 10Hz, 25°C | 2 | ||
| Input Noise Voltage Density | 3.3 | 4.5 | nV/√Hz | f = 100Hz | 2 | ||
| Input Noise Voltage Density | 3.2 | 3.8 | nV/√Hz | f = 1000Hz | 2 | ||
| Input Noise Current Density | 0.4 | 0.6 | pA/√Hz | f = 1000Hz | 2 | ||
| Large Signal Voltage Gain (25°C) | AVOL | 700 | 1500 | V/mV | VOUT = ±10V, RL = 2kΩ, 25°C | 2 | |
| Large Signal Voltage Gain (Full) | AVOL | 300 | 800 | V/mV | VOUT = ±10V, RL = 2kΩ, Full | 2 | |
| Common Mode Rejection Ratio | CMRR | 100 | 120 | dB | VCM = ±10V, Full | 2 | |
| Minimum Stable Gain | 1 | V/V | 25°C | 2 | |||
| Unity-Gain-Bandwidth | 5 | 8.5 | MHz | 25°C | 2 | ||
| Output Voltage Swing | VOUT | 10 | 11.5 | V | RL = 600Ω, 25°C (printed ±) | 2 | |
| Output Voltage Swing | VOUT | 11.5 | 13.5 | V | RL = 2kΩ, Full (printed ±) | 2 | |
| Full Power Bandwidth | FPBW | 111 | 160 | kHz | 25°C, Note 10 | 2 | |
| Output Current | 16.5 | 25 | mA | 25°C | 2 | ||
| Rise Time | 150 | ns | 25°C, Note 11 | 3 | |||
| Slew Rate | 7 | 10 | V/μs | VOUT = 10V, 25°C | 3 | ||
| Overshoot | 20 | 40 | % | 25°C, Note 11 | 3 | ||
| Supply Current (Full) | 4 | mA | Full | 3 | |||
| Power Supply Rejection Ratio | PSRR | 16 | 51 | μV/V | VS = ±4.5V to ±18V, Full | 3 | |
| Offset Voltage (25°C) | VOS | 30 | μV | 25°C | 2 | ||
| Input Noise Current Density | 1.7 | pA/√Hz | f = 10Hz, 25°C | 2 | |||
| Input Noise Current Density | 1 | pA/√Hz | f = 100Hz | 2 | |||
| Output Resistance | 70 | Ω | Open Loop, 25°C | 2 | |||
| Settling Time | 1.5 | μs | 25°C, Note 12 | 3 | |||
| Supply Current (25°C) | 3.5 | mA | 25°C | 3 |
Materials and finish
As the datasheet states them (page.json metadata.appearance; the 3D model's colours follow it).
| Part | Material | Colour / plating | Datasheet says | Page |
|---|---|---|---|---|
| contacts | tin | solder dip or tin plate lead finish is applied. 3. Dimensions b1 and c1 apply to lead base metal only. Dimension | 12 |
CAD (KiCad official)
- Symbol:
HA9P5127-5Z - Footprint:
Package_SO:SOIC-8_3.9x4.9mm_P1.27mm - 3D model: SOIC-8 (KiCad packages3D, STEP)
- 3D model files:
ha9p5127-5z-etched.step/ha9p5127-5z-etched.glbcarry the MPN laser-etched on the die in a toggleableAdom.LaserEtchgroup (Fusion-ready);ha9p5127-5z.step/ha9p5127-5z.glbare the bare package body.
Provenance
Data extracted from the manufacturer datasheet, not a distributor listing:
- Datasheet: RENESAS datasheet (12 pp, sha256
a071a72513c8f5e7, retrieved 2026-10-31, tier: manufacturer) - Extractor: parts-factory
2.0.0/extract_pins 0.3, primaryclaude-haiku-5-5(text), consensusclaude-sonnet-5-5(agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish. - CAD: KiCad official libraries (CC-BY-SA 4.0).