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Generated by kicad-footprint-generator · KiCad file format 20260206
Name Last commit message Last updated
docs h7233-1: re-etch, flat white mark read from pin 1 (service-occt 1.4.0) + chip hero · Ray
viewers pin 1: carry the footprint's marker into the .lbr, the viewer and page.json (silk-marker, drawn, top-left) · Ray
h7233-1-etched.fit.json h7233-1: re-etch, flat white mark read from pin 1 (service-occt 1.4.0) + chip hero · Ray
h7233-1-etched.glb h7233-1: re-etch, flat white mark read from pin 1 (service-occt 1.4.0) + chip hero · Ray
h7233-1-etched.step h7233-1: re-etch, flat white mark read from pin 1 (service-occt 1.4.0) + chip hero · Ray
h7233-1.glb Publish 0.1.0 · Ray
h7233-1.kicad_mod Publish 0.1.0 · Ray
h7233-1.kicad_sym Publish 0.1.0 · Ray
h7233-1.lbr rebuild the library on adom-lbr 2.32.0. The published copy was built by 2.18.0, which imported every KiCad roundrect an… · Ray
h7233-1.step Publish 0.1.0 · Ray
package.json Publish 0.2.0 · Ray
pads.json pin 1: carry the footprint's marker into the .lbr, the viewer and page.json (silk-marker, drawn, top-left) · Ray
page.json h7233-1: component.models_3d pose record per STEP (Z-up, seated z=0, pad-centre origin, identity binding) · Ray
README.md h7233-1: laser-etched CAD + chip hero (factory 2.0.0 backfill) · Ray

H7233-1

Shanghai Siproin Microelectronics · Voltage Regulators - Linear, Low Drop Out (LDO) Regulators · SOT-23-3

H7233-1 from Shanghai Siproin Microelectronics, in a SOT-23-3. Pinout and pin descriptions extracted from the manufacturer datasheet by ds2sf; symbol, footprint, and 3D from KiCad-official CAD.

Pinout

Pin Name Type Function
1 GND power_in Ground / Vss reference. Internally tied to the negative rail of the voltage reference and pass-transistor return.
2 VOUT power_out Regulated 3.3V output. Requires an output capacitor of 1uF tantalum or 6.8uF ceramic for stability. Delivers >400mA output current when Vin-Vout >= 1V.
3 VIN power_in Unregulated input supply, 3.5V to 15V (absolute max 18V). Requires a 1uF input capacitor for stable operation.

Key specifications

Parameter Value
Manufacturer Shanghai Siproin Microelectronics
Package SOT-23-3
Category PMIC
Pins 3

Ordering variants

Same part, different packaging or reel option.

  • H7233-1MR
  • H7233-1MG
  • H7233-1PR
  • H7233-1PG
  • H7233-1M5R
  • H7233-1M5G

CAD (KiCad official)

  • Symbol: H7233-1
  • Footprint: Package_TO_SOT_SMD:SOT-23-3
  • 3D model: SOT-23-3 (KiCad packages3D, STEP)
  • 3D model files: h7233-1-etched.step / h7233-1-etched.glb carry the MPN laser-etched on the die in a toggleable Adom.LaserEtch group (Fusion-ready); h7233-1.step / h7233-1.glb are the bare package body.

3D model downloads

Two STEP files. Same geometry, different body top:

File Size Use it when
h7233-1.step 59 KB You want the bare part, or you mark your own boards.
h7233-1-etched.step 1.2 MB You want the part with H7233-1 already on it.

The marking in the etched file is real recessed geometry cut into the solid, not a texture or a decal: 302 faces against 69 in the bare model. It survives export, section views, and rendering in any CAD tool, and it drops straight into KiCad or Fusion with no extra setup.

Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

  • Datasheet: Shanghai Siproin Microelectronics datasheet (9 pp, sha256 2df0180fb7063165, retrieved 2026-08-17, tier: lcsc)
  • Extractor: ds2sf (Claude). Every pin and dimension is cited to a datasheet page; it refuses to fabricate.
  • CAD: KiCad official libraries (CC-BY-SA 4.0).

Datasheet PDF