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H7218-1
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Shanghai Siproin Microelectronics Linear Voltage Regulators (LDO), SOT-89-3. Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.
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H7218-1
Shanghai Siproin Microelectronics · Linear Voltage Regulators (LDO) · SOT-89-3
H7218-1 from Shanghai Siproin Microelectronics, in a SOT-89-3. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.
Pinout
| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | GND | power_in | Ground pin (Vss), reference for the 1.8V output; pin order left to right in top view is GND, VIN, VOUT. |
| 2 | VIN | power_in | Input supply pin, operating input voltage 3.5V to 15V (absolute maximum 18V), decouple with 1uF input capacitor. |
| 3 | VOUT | power_out | Regulated 1.8V output (±2%) delivering over 400mA, with 1uF tantalum or 6.8uF ceramic output capacitor recommended. |
Key specifications
| Parameter | Value |
|---|---|
| Manufacturer | Shanghai Siproin Microelectronics |
| Package | SOT-89-3 |
| Category | Power Management ICs |
| Pins | 3 |
Electrical characteristics
Limits as printed in the datasheet (page.json metadata.characteristics carries them as data).
| Parameter | Symbol | Min | Typ | Max | Unit | Conditions | Page |
|---|---|---|---|---|---|---|---|
| Input Voltage | Vin | 3.5 | 15 | V | 4 | ||
| Supply Voltage | -0.3 | 18 | V | 3 | |||
| Operating Temperature | -40 | 85 | ℃ | 3 | |||
| Storage Temperature | -40 | 125 | ℃ | 3 | |||
| Output voltage accuracy (tolerance) | -2 | 2 | % | 1 | |||
| Line Regulation | △Vout1/(Vin·Vout) | 0.05 | 0.2 | %/V | 1.6V≤Vin≤8V, Iout=100mA | 4 | |
| Load Regulation | △Vout | 12 | 30 | mV | Vin=Vout+1V, 1.0mA≤Iout≤100mA | 4 | |
| Output voltage temperature coefficient | △Vout/(Ta·Vout) | -100 | 100 | Ppm/℃ | Iout=30mA, 0℃≤Ta≤70℃ | 4 | |
| Output Current | Iout | 400 | mA | Vin-Vout=1V | 4 | ||
| Dropout voltage (Vout ≤ 2.0V, applies to 1.8V) | Vdif | 0.1 | 0.12 | V | Vout ≤ 2.0V, Iout=60 mA | 4 | |
| Power Supply Rejection Ratio | PSRR | 40 | dB | F=1KHz, Vin=Vout+1V | 4 | ||
| Supply Current | Iss1 | 1 | 2 | uA | 4 |
CAD (KiCad official)
- Symbol:
H7218-1 - Footprint:
Package_TO_SOT_SMD:SOT-89-3 - 3D model: SOT-89-3 (KiCad packages3D, STEP)
- 3D model files:
h7218-1-etched.step/h7218-1-etched.glbcarry the MPN laser-etched on the die in a toggleableAdom.LaserEtchgroup (Fusion-ready);h7218-1.step/h7218-1.glbare the bare package body.
Provenance
Data extracted from the manufacturer datasheet, not a distributor listing:
- Datasheet: Shanghai Siproin Microelectronics datasheet (9 pp, sha256
2df0180fb7063165, retrieved 2026-11-05, tier: lcsc) - Extractor: parts-factory
2.0.0/extract_pins 0.3, primaryclaude-sonnet-5-5(text+vision), consensusclaude-opus-5-5(agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish. - CAD: KiCad official libraries (CC-BY-SA 4.0).
# H7218-1
**Shanghai Siproin Microelectronics** · Linear Voltage Regulators (LDO) · SOT-89-3
H7218-1 from Shanghai Siproin Microelectronics, in a SOT-89-3. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.
## Pinout
| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | GND | power_in | Ground pin (Vss), reference for the 1.8V output; pin order left to right in top view is GND, VIN, VOUT. |
| 2 | VIN | power_in | Input supply pin, operating input voltage 3.5V to 15V (absolute maximum 18V), decouple with 1uF input capacitor. |
| 3 | VOUT | power_out | Regulated 1.8V output (±2%) delivering over 400mA, with 1uF tantalum or 6.8uF ceramic output capacitor recommended. |
## Key specifications
| Parameter | Value |
|---|---|
| Manufacturer | Shanghai Siproin Microelectronics |
| Package | SOT-89-3 |
| Category | Power Management ICs |
| Pins | 3 |
## Electrical characteristics
Limits as printed in the datasheet (page.json `metadata.characteristics` carries them as data).
| Parameter | Symbol | Min | Typ | Max | Unit | Conditions | Page |
|---|---|---|---|---|---|---|---|
| Input Voltage | Vin | 3.5 | | 15 | V | | 4 |
| Supply Voltage | | -0.3 | | 18 | V | | 3 |
| Operating Temperature | | -40 | | 85 | ℃ | | 3 |
| Storage Temperature | | -40 | | 125 | ℃ | | 3 |
| Output voltage accuracy (tolerance) | | -2 | | 2 | % | | 1 |
| Line Regulation | △Vout1/(Vin·Vout) | | 0.05 | 0.2 | %/V | 1.6V≤Vin≤8V, Iout=100mA | 4 |
| Load Regulation | △Vout | | 12 | 30 | mV | Vin=Vout+1V, 1.0mA≤Iout≤100mA | 4 |
| Output voltage temperature coefficient | △Vout/(Ta·Vout) | -100 | | 100 | Ppm/℃ | Iout=30mA, 0℃≤Ta≤70℃ | 4 |
| Output Current | Iout | | 400 | | mA | Vin-Vout=1V | 4 |
| Dropout voltage (Vout ≤ 2.0V, applies to 1.8V) | Vdif | | 0.1 | 0.12 | V | Vout ≤ 2.0V, Iout=60 mA | 4 |
| Power Supply Rejection Ratio | PSRR | | 40 | | dB | F=1KHz, Vin=Vout+1V | 4 |
| Supply Current | Iss1 | | 1 | 2 | uA | | 4 |
## CAD (KiCad official)
- Symbol: `H7218-1`
- Footprint: `Package_TO_SOT_SMD:SOT-89-3`
- 3D model: SOT-89-3 (KiCad packages3D, STEP)
- 3D model files: `h7218-1-etched.step` / `h7218-1-etched.glb` carry the MPN laser-etched on the die in a toggleable `Adom.LaserEtch` group (Fusion-ready); `h7218-1.step` / `h7218-1.glb` are the bare package body.
## Provenance
Data extracted from the manufacturer datasheet, not a distributor listing:
- **Datasheet:** [Shanghai Siproin Microelectronics datasheet](docs/h7218-1-datasheet.pdf) (9 pp, sha256 `2df0180fb7063165`, retrieved 2026-11-05, tier: lcsc)
- **Extractor:** parts-factory `2.0.0` / `extract_pins 0.3`, primary `claude-sonnet-5-5` (text+vision), consensus `claude-opus-5-5` (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
- **CAD:** KiCad official libraries (CC-BY-SA 4.0).
[Datasheet PDF](docs/h7218-1-datasheet.pdf)