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H7133-1

Public Made by Adom

by adom

Shanghai Siproin Microelectronics Voltage Regulators - Linear, Low Drop Out (LDO) Regulators, SOT-23. Pinout extracted from the datasheet, KiCad symbol/footprint/3D.

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Generated by kicad-footprint-generator · KiCad file format 20260206
Name Last commit message Last updated
docs h7133-1: re-etch, flat white mark read from pin 1 (service-occt 1.4.0) + chip hero · Ray
viewers pin 1: carry the footprint's marker into the .lbr, the viewer and page.json (silk-marker, drawn, top-left) · Ray
h7133-1-etched.fit.json h7133-1: re-etch, flat white mark read from pin 1 (service-occt 1.4.0) + chip hero · Ray
h7133-1-etched.glb h7133-1: re-etch, flat white mark read from pin 1 (service-occt 1.4.0) + chip hero · Ray
h7133-1-etched.step h7133-1: re-etch, flat white mark read from pin 1 (service-occt 1.4.0) + chip hero · Ray
h7133-1-hero.glb Publish 0.2.1 · Ray
h7133-1-hero.overlay.json Publish 0.2.1 · Ray
h7133-1.glb Publish 0.1.0 · Ray
h7133-1.kicad_mod Publish 0.1.0 · Ray
h7133-1.kicad_sym h7133-1: pins per the maker drawing (part-reviewer decision, one-pass class (c) review) · Ray
h7133-1.lbr h7133-1: pins per the maker drawing (part-reviewer decision, one-pass class (c) review) · Ray
h7133-1.step Publish 0.1.0 · Ray
package.json Publish 0.2.3 · Ray
pads.json pin 1: carry the footprint's marker into the .lbr, the viewer and page.json (silk-marker, drawn, top-left) · Ray
page.json h7133-1: model_3d_plain back to the plain GLB (pkg publish re-declared the etched one) · Ray
README.md h7133-1: pin source note (part-reviewer decision): the sheet prints no pin numbers · Ray

H7133-1

Shanghai Siproin Microelectronics · Voltage Regulators - Linear, Low Drop Out (LDO) Regulators · SOT-23

H7133-1 from Shanghai Siproin Microelectronics, in a SOT-23. Pinout and pin descriptions extracted from the manufacturer datasheet by ds2sf; symbol, footprint, and 3D from KiCad-official CAD.

Pinout

SOT-23 numbering convention; names as printed by Siproin.

Pin Name Type Function
1 GND power_in Device ground / common return for the internal reference, error amplifier, and pass FET. Tie to the system ground plane; place the input and output capacitor returns close to this pin to minimize regulation error.
2 VOUT power_out Regulated 3.3 V output (SOT-23 lower-right lead).
3 VIN power_in Supply input (SOT-23 top lead).

Key specifications

Parameter Value
Manufacturer Shanghai Siproin Microelectronics
Package SOT-23
Category PMIC
Pins 3

Ordering variants

Same part, different packaging or reel option.

  • H7133-1TR
  • H7133-1TG
  • H7133-1PR
  • H7133-1PG
  • H7133-1NR
  • H7133-1NG

CAD (KiCad official)

  • Symbol: H7133-1
  • Footprint: Package_TO_SOT_SMD:SOT-23
  • 3D model: SOT-23 (KiCad packages3D, STEP)
  • 3D model files: h7133-1-etched.step / h7133-1-etched.glb carry the MPN laser-etched on the die in a toggleable Adom.LaserEtch group (Fusion-ready); h7133-1.step / h7133-1.glb are the bare package body.

3D model downloads

Two STEP files. Same geometry, different body top:

File Size Use it when
h7133-1.step 59 KB You want the bare part, or you mark your own boards.
h7133-1-etched.step 1.1 MB You want the part with H7133-1 already on it.

The marking in the etched file is real recessed geometry cut into the solid, not a texture or a decal: 282 faces against 69 in the bare model. It survives export, section views, and rendering in any CAD tool, and it drops straight into KiCad or Fusion with no extra setup.

Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

  • Datasheet: Shanghai Siproin Microelectronics datasheet (16 pp, sha256 b56d63e4e3666e63, retrieved 2026-08-17, tier: lcsc)
  • Extractor: ds2sf (Claude). Every pin and dimension is cited to a datasheet page; it refuses to fabricate.
  • CAD: KiCad official libraries (CC-BY-SA 4.0).

Datasheet PDF