component

GT74LVC1G11S6

Public Made by Adom

by adom

GTIC Gates, SOT-23-6. Pinout extracted from the datasheet, KiCad symbol/footprint/3D.

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Generated by kicad-footprint-generator · KiCad file format 20260206
Name Last commit message Last updated
docs gt74lvc1g11s6: re-etch, flat white mark read from pin 1 (service-occt 1.4.0) + chip hero · Ray 1mo ago
viewers pin 1: carry the footprint's marker into the .lbr, the viewer and page.json (silk-marker, drawn, top-left) · Ray 2mo ago
gt74lvc1g11s6-etched.fit.json gt74lvc1g11s6: re-etch, flat white mark read from pin 1 (service-occt 1.4.0) + chip hero · Ray 1mo ago
gt74lvc1g11s6-etched.glb gt74lvc1g11s6: white body in tscircuit (pre-1.8 etch structure under an assembly instance); Ray 2026-10-19: black IC bo… · Ray 15d ago
gt74lvc1g11s6-etched.step gt74lvc1g11s6: white body in tscircuit (pre-1.8 etch structure under an assembly instance); Ray 2026-10-19: black IC bo… · Ray 15d ago
gt74lvc1g11s6.glb Publish 0.1.0 · Ray 2mo ago
gt74lvc1g11s6.kicad_mod Publish 0.1.0 · Ray 2mo ago
gt74lvc1g11s6.kicad_sym Publish 0.1.0 · Ray 2mo ago
gt74lvc1g11s6.lbr rebuild the library on adom-lbr 2.32.0. The published copy was built by 2.18.0, which imported every KiCad roundrect an… · Ray 2mo ago
gt74lvc1g11s6.step Publish 0.1.0 · Ray 2mo ago
package.json Publish 0.2.0 · Ray 2mo ago
pads.json pin 1: carry the footprint's marker into the .lbr, the viewer and page.json (silk-marker, drawn, top-left) · Ray 2mo ago
page.json gt74lvc1g11s6: white body in tscircuit (pre-1.8 etch structure under an assembly instance); Ray 2026-10-19: black IC bo… · Ray 15d ago
README.md gt74lvc1g11s6: laser-etched CAD + chip hero (factory 2.0.0 backfill) · Ray 1mo ago

GT74LVC1G11S6

GTIC · Gates · SOT-23-6

GT74LVC1G11S6 from GTIC, in a SOT-23-6. Pinout and pin descriptions extracted from the manufacturer datasheet by ds2sf; symbol, footprint, and 3D from KiCad-official CAD.

Pinout

Pin Name Type Function
1 A input Data input A of the 3-input AND gate. Accepts CMOS logic levels; VIH = 0.65×VCC (at VCC=1.65-1.95 V) up to 0.7×VCC (at VCC=4.5-5.5 V). Input voltage range 0 to 5.5 V regardless of VCC (5 V tolerant).
2 GND power_in Ground reference (0 V). Continuous current through GND is rated at ±100 mA maximum.
3 B input Data input B of the 3-input AND gate. Accepts CMOS logic levels with 5.5 V tolerant input regardless of VCC. Unused inputs must be tied to VCC or GND.
4 Y output Data output; Y = A·B·C in positive logic. Push-pull CMOS output with drive strength of ±24 mA at VCC=3 V (up to ±32 mA at VCC=4.5 V).
5 VCC power_in Positive supply voltage, 1.65 V to 5.5 V recommended (absolute max 6.5 V). Quiescent current ICC ≤ 10 µA. Decouple locally with a ceramic capacitor to GND.
6 C input Data input C of the 3-input AND gate. 5.5 V tolerant input; input leakage ±5 µA max. Unused inputs must be tied to VCC or GND for proper operation.

Key specifications

Parameter Value
Manufacturer GTIC
Package SOT-23-6
Category Logic
Pins 6

Ordering variants

Same part, different packaging or reel option.

  • GT74LVC1G11S6
  • GT74LVC1G11S6C6

CAD (KiCad official)

  • Symbol: GT74LVC1G11S6
  • Footprint: Package_TO_SOT_SMD:SOT-23-6
  • 3D model: SOT-23-6 (KiCad packages3D, STEP)
  • 3D model files: gt74lvc1g11s6-etched.step / gt74lvc1g11s6-etched.glb carry the MPN laser-etched on the die in a toggleable Adom.LaserEtch group (Fusion-ready); gt74lvc1g11s6.step / gt74lvc1g11s6.glb are the bare package body.

3D model downloads

Two STEP files. Same geometry, different body top:

File Size Use it when
gt74lvc1g11s6.step 97 KB You want the bare part, or you mark your own boards.
gt74lvc1g11s6-etched.step 2.0 MB You want the part with GT74LVC1G11S6 already on it.

The marking in the etched file is real recessed geometry cut into the solid, not a texture or a decal: 499 faces against 117 in the bare model. It survives export, section views, and rendering in any CAD tool, and it drops straight into KiCad or Fusion with no extra setup.

Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

  • Datasheet: GTIC datasheet (16 pp, sha256 8e317fcfab8e3859, retrieved 2026-08-17, tier: lcsc)
  • Extractor: ds2sf (Claude). Every pin and dimension is cited to a datasheet page; it refuses to fabricate.
  • CAD: KiCad official libraries (CC-BY-SA 4.0).

Datasheet PDF