component
GT74LVC1G11S6
Public Made by Adomby adom
GTIC Gates, SOT-23-6. Pinout extracted from the datasheet, KiCad symbol/footprint/3D.
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README.md+14@@ -35,6 +35,20 @@ GT74LVC1G11S6 from GTIC, in a SOT-23-6. Pinout and pin descriptions extracted fr - Footprint: `Package_TO_SOT_SMD:SOT-23-6` - 3D model: SOT-23-6 (KiCad packages3D, STEP) +## 3D model downloads++Two STEP files. Same geometry, different body top:++| File | Size | Use it when |+|---|---|---|+| [`gt74lvc1g11s6.step`](gt74lvc1g11s6.step) | 97 KB | You want the bare part, or you mark your own boards. |+| [`gt74lvc1g11s6-etched.step`](gt74lvc1g11s6-etched.step) | 2.0 MB | You want the part with `GT74LVC1G11S6` already on it. |++The marking in the etched file is real recessed geometry cut into the solid, not a+texture or a decal: 499 faces against 117 in the bare model. It+survives export, section views, and rendering in any CAD tool, and it drops straight+into KiCad or Fusion with no extra setup.+ ## Provenance Data extracted from the manufacturer datasheet, not a distributor listing:
package.json+1−1@@ -1,6 +1,6 @@ { "slug": "gt74lvc1g11s6",- "version": "0.1.0",+ "version": "0.2.0", "type": "component", "description": "GTIC Gates, SOT-23-6. Datasheet-verified pinout, KiCad symbol/footprint/3D.", "tags": [
page.json+10−10@@ -4,7 +4,7 @@ "slug": "gt74lvc1g11s6", "title": "GT74LVC1G11S6", "brief": "GTIC Gates, SOT-23-6. Datasheet-verified pinout, KiCad symbol/footprint/3D.",- "version": "0.1.0",+ "version": "0.2.0", "license": "CC-BY-SA-4.0", "tags": [ "component",@@ -34,13 +34,13 @@ "number": "1", "name": "A", "type": "input",- "description": "Data input A of the 3-input AND gate. Accepts CMOS logic levels; VIH = 0.65\u00d7VCC (at VCC=1.65-1.95 V) up to 0.7\u00d7VCC (at VCC=4.5-5.5 V). Input voltage range 0 to 5.5 V regardless of VCC (5 V tolerant)."+ "description": "Data input A of the 3-input AND gate. Accepts CMOS logic levels; VIH = 0.65×VCC (at VCC=1.65-1.95 V) up to 0.7×VCC (at VCC=4.5-5.5 V). Input voltage range 0 to 5.5 V regardless of VCC (5 V tolerant)." }, { "number": "2", "name": "GND", "type": "power_in",- "description": "Ground reference (0 V). Continuous current through GND is rated at \u00b1100 mA maximum."+ "description": "Ground reference (0 V). Continuous current through GND is rated at ±100 mA maximum." }, { "number": "3",@@ -52,19 +52,19 @@ "number": "4", "name": "Y", "type": "output",- "description": "Data output; Y = A\u00b7B\u00b7C in positive logic. Push-pull CMOS output with drive strength of \u00b124 mA at VCC=3 V (up to \u00b132 mA at VCC=4.5 V)."+ "description": "Data output; Y = A·B·C in positive logic. Push-pull CMOS output with drive strength of ±24 mA at VCC=3 V (up to ±32 mA at VCC=4.5 V)." }, { "number": "5", "name": "VCC", "type": "power_in",- "description": "Positive supply voltage, 1.65 V to 5.5 V recommended (absolute max 6.5 V). Quiescent current ICC \u2264 10 \u00b5A. Decouple locally with a ceramic capacitor to GND."+ "description": "Positive supply voltage, 1.65 V to 5.5 V recommended (absolute max 6.5 V). Quiescent current ICC ≤ 10 µA. Decouple locally with a ceramic capacitor to GND." }, { "number": "6", "name": "C", "type": "input",- "description": "Data input C of the 3-input AND gate. 5.5 V tolerant input; input leakage \u00b15 \u00b5A max. Unused inputs must be tied to VCC or GND for proper operation."+ "description": "Data input C of the 3-input AND gate. 5.5 V tolerant input; input leakage ±5 µA max. Unused inputs must be tied to VCC or GND for proper operation." } ], "provenance": {@@ -138,9 +138,9 @@ "docs/hero.png", "docs/gt74lvc1g11s6-datasheet.pdf", "viewers/symbol.html",- "viewers/footprint.html"+ "viewers/footprint.html",+ "pads.json" ],- "visibility": {- "public": true- }+ "visibility": "public",+ "description": "GTIC Gates, SOT-23-6. Datasheet-verified pinout, KiCad symbol/footprint/3D." }