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GT74LVC1G10S6

Public Made by Adom

by adom

GTIC Gates, SOT-23-6. Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.

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Generated by kicad-footprint-generator · KiCad file format 20260206
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GT74LVC1G10S6

GTIC · Gates · SOT-23-6

GT74LVC1G10S6 from GTIC, in a SOT-23-6. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.

Pinout

Pin Name Type Function
1 A input Data input A of the NAND gate, which accepts voltages up to 5.5 V.
2 GND power_in Ground reference pin for the device.
3 B input Data input B of the NAND gate, which accepts voltages up to 5.5 V.
4 Y output Data output Y of the NAND gate, rated for ±24-mA output drive at 3.3 V.
5 VCC power_in Supply voltage pin, operating from 1.65 V to 5.5 V.
6 C input Data input C of the NAND gate, which accepts voltages up to 5.5 V.

Key specifications

Parameter Value
Manufacturer GTIC
Package SOT-23-6
Category Logic ICs
Pins 6

CAD (KiCad official)

  • Symbol: GT74LVC1G10S6
  • Footprint: Package_TO_SOT_SMD:SOT-23-6
  • 3D model: SOT-23-6 (KiCad packages3D, STEP)
  • 3D model files: gt74lvc1g10s6-etched.step / gt74lvc1g10s6-etched.glb carry the MPN laser-etched on the die in a toggleable Adom.LaserEtch group (Fusion-ready); gt74lvc1g10s6.step / gt74lvc1g10s6.glb are the bare package body.

Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

  • Datasheet: GTIC datasheet (16 pp, sha256 6adf3841eae70cd2, retrieved 2026-10-27, tier: lcsc)
  • Extractor: parts-factory 2.0.0 / extract_pins 0.3, primary claude-haiku-5-5 (text), consensus claude-sonnet-5-5 (agreed (audit)), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
  • CAD: KiCad official libraries (CC-BY-SA 4.0).

Datasheet PDF