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Contents

README

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GT74LVC1G08S5

GTIC · Gates · SOT-23-5

GT74LVC1G08S5 from GTIC, in a SOT-23-5. Pinout and pin descriptions extracted from the manufacturer datasheet by ds2sf; symbol, footprint, and 3D from KiCad-official CAD.

Pinout

Pin Name Type Function
1 A input Data input A. Logic input to the 2-input AND gate; accepts 0 to 5.5 V independent of VCC.
2 B input Data input B. Logic input to the 2-input AND gate; accepts 0 to 5.5 V independent of VCC.
3 GND power_in Ground reference (0 V).
4 Y output Data output Y = A·B. CMOS push-pull output rated ±24 mA at VCC = 3 V (±32 mA at 4.5 V).
5 VCC power_in Supply voltage, 1.65 V to 5.5 V (absolute max 6.5 V). Bypass to GND with a local ceramic capacitor.

Key specifications

Parameter Value
Manufacturer GTIC
Package SOT-23-5
Category Logic
Pins 5

Ordering variants

Same part, different packaging or reel option.

  • GT74LVC1G08S5
  • GT74LVC1G08S5C5

CAD (KiCad official)

  • Symbol: GT74LVC1G08S5
  • Footprint: Package_TO_SOT_SMD:SOT-23-5
  • 3D model: SOT-23-5 (KiCad packages3D, STEP)
  • 3D model files: gt74lvc1g08s5-etched.step / gt74lvc1g08s5-etched.glb carry the MPN laser-etched on the die in a toggleable Adom.LaserEtch group (Fusion-ready); gt74lvc1g08s5.step / gt74lvc1g08s5.glb are the bare package body.

Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

  • Datasheet: GTIC datasheet (16 pp, sha256 4915abbf12fc1533, retrieved 2026-08-17, tier: lcsc)
  • Extractor: ds2sf (Claude). Every pin and dimension is cited to a datasheet page; it refuses to fabricate.
  • CAD: KiCad official libraries (CC-BY-SA 4.0).

Datasheet PDF