# GS8594-SR

**Gainsil** · Precision Op Amps · SOP-14

GS8594-SR from Gainsil, in a SOP-14. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.

## Pinout

| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | OUTA | output | Amplifier A output, rail-to-rail swing. |
| 2 | INA- | input | Amplifier A inverting input, rail-to-rail with common-mode range VSS-0.1V to VDD+0.1V. |
| 3 | INA+ | input | Amplifier A non-inverting input, rail-to-rail with common-mode range VSS-0.1V to VDD+0.1V. |
| 4 | VDD | power_in | Positive supply, 1.8V to 5.5V single supply (absolute max 7.5V VDD to VSS), bypass with 0.1µF ceramic capacitor close to the pin. |
| 5 | INB+ | input | Amplifier B non-inverting input, rail-to-rail with common-mode range VSS-0.1V to VDD+0.1V. |
| 6 | INB- | input | Amplifier B inverting input, rail-to-rail with common-mode range VSS-0.1V to VDD+0.1V. |
| 7 | OUTB | output | Amplifier B output, rail-to-rail swing. |
| 8 | OUTC | output | Amplifier C output, rail-to-rail swing. |
| 9 | INC- | input | Amplifier C inverting input, rail-to-rail with common-mode range VSS-0.1V to VDD+0.1V. |
| 10 | INC+ | input | Amplifier C non-inverting input, rail-to-rail with common-mode range VSS-0.1V to VDD+0.1V. |
| 11 | VSS | power_in | Negative supply or ground; for dual supply operation (±0.9V to ±2.75V) bypass with a separate 0.1µF ceramic capacitor. |
| 12 | IND+ | input | Amplifier D non-inverting input, rail-to-rail with common-mode range VSS-0.1V to VDD+0.1V. |
| 13 | IND- | input | Amplifier D inverting input, rail-to-rail with common-mode range VSS-0.1V to VDD+0.1V. |
| 14 | OUTD | output | Amplifier D output, rail-to-rail swing. |

## Key specifications

| Parameter | Value |
|---|---|
| Manufacturer | Gainsil |
| Package | SOP-14 |
| Category | Amplifiers/Comparators |
| Pins | 14 |

## Electrical characteristics

Limits as printed in the datasheet (page.json `metadata.characteristics` carries them as data).

| Parameter | Symbol | Min | Typ | Max | Unit | Conditions | Page |
|---|---|---|---|---|---|---|---|
| Input Offset Voltage | VOS |  | 1 | 30 | µV |  | 3 |
| Input Offset Voltage Drift | ΔVOS/ΔT |  | 10 | 50 | nV/℃ |  | 3 |
| Common-Mode Rejection Ratio | CMRR | 110 |  |  | dB | VCM = 0V to 5V | 3 |
| Large Signal Voltage Gain | AVO | 145 |  |  | dB | RL = 10kΩ, VO = 0.3V to 4.7V | 3 |
| Output Voltage High | VOH | 4.998 |  |  | V | RL = 100kΩ to - VS | 3 |
| Output Voltage High | VOH | 4.994 |  |  | V | RL = 10kΩ to - VS | 3 |
| Output Voltage Low | VOL |  |  | 2 | mV | RL = 100kΩ to + VS | 3 |
| Output Voltage Low | VOL |  |  | 5 | mV | RL = 10kΩ to + VS | 3 |
| Power Supply Rejection Ratio | PSRR | 115 |  |  | dB | VS = 2.5V to 5.5V | 3 |
| Power Supply Voltage (VDD to Vss) |  | -0.5 |  | 7.5 | V | VDD to Vss | 2 |
| PDB Input Voltage |  |  |  | 7 | V |  | 2 |
| Operating Temperature Range |  | -45 |  | 125 | °C |  | 2 |
| Junction Temperature |  |  |  | 160 | °C |  | 2 |
| Storage Temperature Range |  | -55 |  | 150 | °C |  | 2 |
| Lead Temperature (soldering) |  |  |  | 260 | °C | soldering, 10sec | 2 |
| ESD Susceptibility HBM |  |  |  | 6 | KV | HBM | 2 |
| ESD Susceptibility MM |  |  |  | 400 | V | MM | 2 |
| Supply Voltage (single supply) |  | 1.8 |  | 5.5 | V |  | 6 |
| Input Bias Current | IB |  | 20 |  | pA |  | 3 |
| Input Offset Current | IOS |  | 10 |  | pA |  | 3 |
| Short Circuit Limit | ISC |  | 43 |  | mA | RL =10Ω to - VS | 3 |
| Output Current | IO |  | 30 |  | mA |  | 3 |
| Quiescent Current | IQ |  | 550 |  | µA | VO = 0V, RL = 0Ω | 3 |
| Gain-Bandwidth Product | GBP |  | 4.5 |  | MHz | G = +100 | 3 |
| Slew Rate | SR |  | 2.5 |  | V/µs | RL = 10kΩ | 3 |
| Overload Recovery Time |  |  | 0.1 |  | ms |  | 3 |
| Voltage Noise (en p-p) | en p-p |  | 0.2 |  | µVP-P | 0Hz to 10Hz | 3 |
| Voltage Noise Density | en |  | 30 |  | nV | f = 1kHz | 3 |

## CAD (KiCad official)

- Symbol: `GS8594-SR`
- Footprint: `Package_SO:SOIC-14_3.9x8.7mm_P1.27mm`
- 3D model: SOP-14 (KiCad packages3D, STEP)
- 3D model files: `gs8594-sr-etched.step` / `gs8594-sr-etched.glb` carry the MPN laser-etched on the die in a toggleable `Adom.LaserEtch` group (Fusion-ready); `gs8594-sr.step` / `gs8594-sr.glb` are the bare package body.

## Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

- **Datasheet:** [Gainsil datasheet](https://jlcpcb.com/api/file/downloadByFileSystemAccessId/8588884401014362112) (14 pp, sha256 `1b646d2c2feb461f`, retrieved 2026-10-19, tier: lcsc)
- **Extractor:** parts-factory `2.0.0` / `extract_pins 0.3`, primary `claude-sonnet-5-5` (text+vision), consensus `claude-opus-5-5` (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
- **CAD:** KiCad official libraries (CC-BY-SA 4.0).

[Datasheet PDF](docs/gs8594-sr-datasheet.pdf)