component

GS8591-TR

Public Made by Adom

by adom

Gainsil Precision OpAmps, SOT-23-5. Pinout extracted from the datasheet, KiCad symbol/footprint/3D.

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Generated by kicad-footprint-generator · KiCad file format 20260206
Name Last commit message Last updated
docs gs8591-tr: re-etch, flat white mark read from pin 1 (service-occt 1.4.0) + chip hero · Ray
viewers pin 1: carry the footprint's marker into the .lbr, the viewer and page.json (silk-marker, drawn, top-left) · Ray
gs8591-tr-etched.fit.json gs8591-tr: re-etch, flat white mark read from pin 1 (service-occt 1.4.0) + chip hero · Ray
gs8591-tr-etched.glb gs8591-tr: white body in tscircuit (pre-1.8 etch structure under an assembly instance); Ray 2026-10-19: black IC body w… · Ray
gs8591-tr-etched.step gs8591-tr: white body in tscircuit (pre-1.8 etch structure under an assembly instance); Ray 2026-10-19: black IC body w… · Ray
gs8591-tr.glb Publish 0.1.0 · Ray
gs8591-tr.kicad_mod Publish 0.1.0 · Ray
gs8591-tr.kicad_sym Publish 0.1.0 · Ray
gs8591-tr.lbr rebuild the library on adom-lbr 2.32.0. The published copy was built by 2.18.0, which imported every KiCad roundrect an… · Ray
gs8591-tr.step Publish 0.1.0 · Ray
package.json Publish 0.2.0 · Ray
pads.json pin 1: carry the footprint's marker into the .lbr, the viewer and page.json (silk-marker, drawn, top-left) · Ray
page.json gs8591-tr: white body in tscircuit (pre-1.8 etch structure under an assembly instance); Ray 2026-10-19: black IC body w… · Ray
README.md gs8591-tr: specified limits as data (metadata.characteristics, 15 rows from the datasheet) · Ray

GS8591-TR

Gainsil · Precision OpAmps · SOT-23-5

GS8591-TR from Gainsil, in a SOT-23-5. Pinout and pin descriptions extracted from the manufacturer datasheet by ds2sf; symbol, footprint, and 3D from KiCad-official CAD.

Pinout

Pin Name Type Function
1 OUT output Amplifier output. Rail-to-rail swing to within ~5mV of VDD/VSS on light loads (>100kΩ) and ~60mV on 10kΩ loads. Short-circuit current is typically 43mA.
2 VSS power_in Negative supply / ground. Together with VDD sets the supply range of 1.8V to 5.5V (single-supply) or ±0.9V to ±2.75V (dual-supply). Decouple with a 0.1µF ceramic to ground for dual-supply operation.
3 IN+ input Non-inverting input. Input common-mode range extends 100mV beyond the supply rails (VSS-0.1V to VDD+0.1V). Typical input bias current is 20pA.
4 IN- input Inverting input. Input common-mode range extends 100mV beyond the supply rails (VSS-0.1V to VDD+0.1V). Typical input bias current is 20pA.
5 VDD power_in Positive supply. Operating range 1.8V to 5.5V; absolute maximum VDD-VSS = 7.5V. Bypass with a 0.1µF ceramic capacitor placed close to the pin.

Key specifications

Parameter Value
Manufacturer Gainsil
Package SOT-23-5
Category Op-amp/Cmp
Pins 5

Ordering variants

Same part, different packaging or reel option.

  • GS8591-TR
  • GS8591-SR
  • GS8592-MR
  • GS8592-SR
  • GS8594-TR
  • GS8594-SR

Electrical characteristics

Limits as printed in the datasheet (page.json metadata.characteristics carries them as data).

Parameter Symbol Min Typ Max Unit Conditions Page
Input Offset Voltage VOS 1 30 µV 3
Input Offset Voltage Drift ∆VOS/∆T 10 50 nV/℃ 3
Input Bias Current IB 20 pA 3
Quiescent Current IQ 550 µA VO = 0V, RL = 0Ω 3
Gain-Bandwidth Product GBP 4.5 MHz G = +100 3
Power Supply Voltage (VDD to Vss) -0.5 7.5 V 2
PDB Input Voltage 7 V 2
Operating Temperature Range -45 125 °C 2
Junction Temperature 160 °C 2
Storage Temperature Range -55 150 °C 2
Lead Temperature 260 °C soldering, 10sec 2
Package Thermal Resistance, SOT23-5 θJA 190 °C/W TA=+25℃ 2
ESD Susceptibility HBM 6 KV HBM 2
ESD Susceptibility MM 400 V MM 2
Operating Supply Voltage 1.8 5.5 V single supply (Application Note) 6

CAD (KiCad official)

  • Symbol: GS8591-TR
  • Footprint: Package_TO_SOT_SMD:SOT-23-5
  • 3D model: SOT-23-5 (KiCad packages3D, STEP)
  • 3D model files: gs8591-tr-etched.step / gs8591-tr-etched.glb carry the MPN laser-etched on the die in a toggleable Adom.LaserEtch group (Fusion-ready); gs8591-tr.step / gs8591-tr.glb are the bare package body.

3D model downloads

Two STEP files. Same geometry, different body top:

File Size Use it when
gs8591-tr.step 85 KB You want the bare part, or you mark your own boards.
gs8591-tr-etched.step 1.9 MB You want the part with GS8591-TR already on it.

The marking in the etched file is real recessed geometry cut into the solid, not a texture or a decal: 459 faces against 102 in the bare model. It survives export, section views, and rendering in any CAD tool, and it drops straight into KiCad or Fusion with no extra setup.

Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

  • Datasheet: Gainsil datasheet (14 pp, sha256 1b646d2c2feb461f, retrieved 2026-08-17, tier: lcsc)
  • Extractor: ds2sf (Claude). Every pin and dimension is cited to a datasheet page; it refuses to fabricate.
  • CAD: KiCad official libraries (CC-BY-SA 4.0).

Datasheet PDF