component

GS8552-SR

Public Made by Adom

by adom

Gainsil Precision OpAmps, SOIC-8. Pinout extracted from the datasheet, KiCad symbol/footprint/3D.

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Generated by kicad-footprint-generator · KiCad file format 20260206
Name Last commit message Last updated
docs gs8552-sr: re-etch, flat white mark read from pin 1 (service-occt 1.4.0) + chip hero · Ray
viewers pin 1: carry the footprint's marker into the .lbr, the viewer and page.json (silk-marker, drawn, top-left) · Ray
gs8552-sr-etched.fit.json gs8552-sr: re-etch, flat white mark read from pin 1 (service-occt 1.4.0) + chip hero · Ray
gs8552-sr-etched.glb gs8552-sr: white body in tscircuit (pre-1.8 etch structure under an assembly instance); Ray 2026-10-19: black IC body w… · Ray
gs8552-sr-etched.step gs8552-sr: white body in tscircuit (pre-1.8 etch structure under an assembly instance); Ray 2026-10-19: black IC body w… · Ray
gs8552-sr.glb Publish 0.1.0 · Ray
gs8552-sr.kicad_mod Publish 0.1.0 · Ray
gs8552-sr.kicad_sym Publish 0.1.0 · Ray
gs8552-sr.lbr rebuild the library on adom-lbr 2.32.0. The published copy was built by 2.18.0, which imported every KiCad roundrect an… · Ray
gs8552-sr.step Publish 0.1.0 · Ray
package.json Publish 0.2.0 · Ray
pads.json pin 1: carry the footprint's marker into the .lbr, the viewer and page.json (silk-marker, drawn, top-left) · Ray
page.json gs8552-sr: white body in tscircuit (pre-1.8 etch structure under an assembly instance); Ray 2026-10-19: black IC body w… · Ray
README.md gs8552-sr: specified limits as data (metadata.characteristics, 11 rows from the datasheet) · Ray

GS8552-SR

Gainsil · Precision OpAmps · SOIC-8

GS8552-SR from Gainsil, in a SOIC-8. Pinout and pin descriptions extracted from the manufacturer datasheet by ds2sf; symbol, footprint, and 3D from KiCad-official CAD.

Pinout

Pin Name Type Function
1 OUTA output Amplifier A output. Rail-to-rail output stage; can swing within a few mV of VSS/VDD under light load (>100 kΩ) and within ~60 mV at 10 kΩ. Short-circuit current ~60 mA.
2 INA- input Amplifier A inverting input. Rail-to-rail common-mode range from VSS-0.1 V to VDD+0.1 V. Input bias current 20 pA (typ).
3 INA+ input Amplifier A non-inverting input. Rail-to-rail common-mode range from VSS-0.1 V to VDD+0.1 V. Input bias current 20 pA (typ).
4 VSS power_in Negative supply / ground. In single-supply mode connect to GND; in dual-supply mode connect to the negative rail. Total supply (VDD-VSS) range 1.8 V to 5.5 V (7.5 V abs max).
5 INB+ input Amplifier B non-inverting input. Rail-to-rail common-mode range from VSS-0.1 V to VDD+0.1 V. Input bias current 20 pA (typ).
6 INB- input Amplifier B inverting input. Rail-to-rail common-mode range from VSS-0.1 V to VDD+0.1 V. Input bias current 20 pA (typ).
7 OUTB output Amplifier B output. Rail-to-rail output stage; can swing within a few mV of VSS/VDD under light load (>100 kΩ) and within ~60 mV at 10 kΩ. Short-circuit current ~60 mA.
8 VDD power_in Positive supply. Single-supply 1.8 V to 5.5 V (7.5 V abs max). Bypass with a 0.1 µF ceramic to VSS/GND close to the pin.

Key specifications

Parameter Value
Manufacturer Gainsil
Package SOIC-8
Category Op-amp/Cmp
Pins 8

Ordering variants

Same part, different packaging or reel option.

  • GS8552-SR
  • GS8552-MR

Electrical characteristics

Limits as printed in the datasheet (page.json metadata.characteristics carries them as data).

Parameter Symbol Min Typ Max Unit Conditions Page
Input Offset Voltage VOS 1 30 µV 3
Input Offset Voltage Drift ∆VOS/∆T 10 50 nV/℃ 3
Power Supply Voltage (VDD to Vss) -0.5 7.5 V VDD to Vss 2
PDB Input Voltage 7 V 2
Operating Temperature Range -45 125 °C 2
Junction Temperature 160 °C 2
Storage Temperature Range -55 150 °C 2
Lead Temperature 260 °C soldering, 10sec 2
ESD Susceptibility HBM 6 KV 2
ESD Susceptibility MM 400 V 2
Package Thermal Resistance, junction-to-ambient, SOP-8 (θJA) θJA 125 °C/W TA=+25℃ 2

CAD (KiCad official)

  • Symbol: GS8552-SR
  • Footprint: Package_SO:SOIC-8_3.9x4.9mm_P1.27mm
  • 3D model: SOIC-8 (KiCad packages3D, STEP)
  • 3D model files: gs8552-sr-etched.step / gs8552-sr-etched.glb carry the MPN laser-etched on the die in a toggleable Adom.LaserEtch group (Fusion-ready); gs8552-sr.step / gs8552-sr.glb are the bare package body.

3D model downloads

Two STEP files. Same geometry, different body top:

File Size Use it when
gs8552-sr.step 122 KB You want the bare part, or you mark your own boards.
gs8552-sr-etched.step 2.4 MB You want the part with GS8552-SR already on it.

The marking in the etched file is real recessed geometry cut into the solid, not a texture or a decal: 565 faces against 147 in the bare model. It survives export, section views, and rendering in any CAD tool, and it drops straight into KiCad or Fusion with no extra setup.

Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

  • Datasheet: Gainsil datasheet (14 pp, sha256 dc9b0f2b6cedff03, retrieved 2026-08-17, tier: lcsc)
  • Extractor: ds2sf (Claude). Every pin and dimension is cited to a datasheet page; it refuses to fabricate.
  • CAD: KiCad official libraries (CC-BY-SA 4.0).

Datasheet PDF