component
GS8521-TR
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Gainsil Operational Amplifier, SOT-23-5. Pinout extracted from the datasheet, KiCad symbol/footprint/3D.
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gs8521-tr: specified limits as data (metadata.characteristics, 21 rows from the datasheet)
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GS8521-TR
Gainsil · Operational Amplifier · SOT-23-5
GS8521-TR from Gainsil, in a SOT-23-5. Pinout and pin descriptions extracted from the manufacturer datasheet by ds2sf; symbol, footprint, and 3D from KiCad-official CAD.
Pinout
| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | OUT | output | Amplifier output. Rail-to-rail output stage; swings within ~10mV of the rails with light loads (>500kOhm) and delivers ~58mA source/sink at V_S=5V. |
| 2 | VSS | power_in | Negative supply / ground. For single-supply operation tie to GND; for dual-supply operation connect to the negative rail (±1.05V to ±2.75V). Bypass with 0.1uF ceramic to V_DD. |
| 3 | IN+ | input | Non-inverting input. Rail-to-rail common-mode range extends 100mV beyond each supply rail (V_SS-0.1V to V_DD+0.1V). Input bias current ~1pA typ. |
| 4 | IN- | input | Inverting input. Rail-to-rail common-mode range extends 100mV beyond each supply rail (V_SS-0.1V to V_DD+0.1V). Input bias current ~1pA typ. |
| 5 | VDD | power_in | Positive supply. Single-supply range 2.1V to 5.5V (absolute max 7.5V V_DD to V_SS). Bypass with a 0.1uF ceramic capacitor placed close to the pin. |
Key specifications
| Parameter | Value |
|---|---|
| Manufacturer | Gainsil |
| Package | SOT-23-5 |
| Category | Op-amp/Cmp |
| Pins | 5 |
Ordering variants
Same part, different packaging or reel option.
GS8521-TRGS8521-TRSRGS8521-TRMR
Electrical characteristics
Limits as printed in the datasheet (page.json metadata.characteristics carries them as data).
| Parameter | Symbol | Min | Typ | Max | Unit | Conditions | Page |
|---|---|---|---|---|---|---|---|
| Input Offset Voltage | VOS | 0.4 | 3.5 | mV | VCM = VS/2 | 3 | |
| Common-Mode Rejection Ratio (VCM = -0.1V to 4V) | CMRR | 70 | 114 | dB | VS = 5.5V, VCM = -0.1V to 4V | 3 | |
| Common-Mode Rejection Ratio (VCM = -0.1V to 5.6V) | CMRR | 60 | 87 | dB | VS = 5.5V, VCM = -0.1V to 5.6V | 3 | |
| Open-Loop Voltage Gain (RL = 500kΩ) | AOL | 90 | 110 | dB | RL = 500kΩ, VO = +0.1V to +4.9V | 3 | |
| Open-Loop Voltage Gain (RL = 100kΩ) | AOL | 88 | 108 | dB | RL = 100kΩ, VO = +0.1V to +4.9V | 3 | |
| Output Voltage Swing from Rail (high) | VOH | 4.99 | 4.997 | V | RL = 500kΩ | 3 | |
| Output Voltage Swing from Rail (low) | VOL | 3 | 10 | mV | RL = 500kΩ | 3 | |
| Output Current (source) | ISOURCE | 40 | 58 | mA | RL = 10Ω to VS/2 | 3 | |
| Output Current (sink) | ISINK | 40 | 58 | mA | RL = 10Ω to VS/2 | 3 | |
| Common-Mode Voltage Range | VCM | -0.1 | 5.6 | V | VS = 5.5V | 3 | |
| Power Supply Rejection Ratio | PSRR | 65 | 94 | dB | VS = +2.5V to +5.5V, VCM = +0.5V | 3 | |
| Operating Voltage Range | 2.1 | 5.5 | V | 3 | |||
| Power Supply Voltage (VDD to Vss) | -0.5 | 7.5 | V | 2 | |||
| PDB Input Voltage | 7 | V | 2 | ||||
| Operating Temperature Range | -40 | 125 | °C | 2 | |||
| Junction Temperature | 160 | °C | 2 | ||||
| Storage Temperature Range | -55 | 150 | °C | 2 | |||
| Lead Temperature | 260 | °C | soldering, 10sec | 2 | |||
| Package Thermal Resistance, SOT23-5 | θJA | 190 | °C/W | TA=+25℃ | 2 | ||
| ESD Susceptibility HBM | 6 | KV | HBM | 2 | |||
| ESD Susceptibility MM | 300 | V | MM | 2 |
CAD (KiCad official)
- Symbol:
GS8521-TR - Footprint:
Package_TO_SOT_SMD:SOT-23-5 - 3D model: SOT-23-5 (KiCad packages3D, STEP)
- 3D model files:
gs8521-tr-etched.step/gs8521-tr-etched.glbcarry the MPN laser-etched on the die in a toggleableAdom.LaserEtchgroup (Fusion-ready);gs8521-tr.step/gs8521-tr.glbare the bare package body.
3D model downloads
Two STEP files. Same geometry, different body top:
| File | Size | Use it when |
|---|---|---|
gs8521-tr.step |
85 KB | You want the bare part, or you mark your own boards. |
gs8521-tr-etched.step |
1.9 MB | You want the part with GS8521-TR already on it. |
The marking in the etched file is real recessed geometry cut into the solid, not a texture or a decal: 450 faces against 102 in the bare model. It survives export, section views, and rendering in any CAD tool, and it drops straight into KiCad or Fusion with no extra setup.
Provenance
Data extracted from the manufacturer datasheet, not a distributor listing:
- Datasheet: Gainsil datasheet (13 pp, sha256
20f611aa30eb6027, retrieved 2026-08-17, tier: lcsc) - Extractor:
ds2sf(Claude). Every pin and dimension is cited to a datasheet page; it refuses to fabricate. - CAD: KiCad official libraries (CC-BY-SA 4.0).
# GS8521-TR
**Gainsil** · Operational Amplifier · SOT-23-5
GS8521-TR from Gainsil, in a SOT-23-5. Pinout and pin descriptions extracted from the manufacturer datasheet by ds2sf; symbol, footprint, and 3D from KiCad-official CAD.
## Pinout
| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | OUT | output | Amplifier output. Rail-to-rail output stage; swings within ~10mV of the rails with light loads (>500kOhm) and delivers ~58mA source/sink at V_S=5V. |
| 2 | VSS | power_in | Negative supply / ground. For single-supply operation tie to GND; for dual-supply operation connect to the negative rail (±1.05V to ±2.75V). Bypass with 0.1uF ceramic to V_DD. |
| 3 | IN+ | input | Non-inverting input. Rail-to-rail common-mode range extends 100mV beyond each supply rail (V_SS-0.1V to V_DD+0.1V). Input bias current ~1pA typ. |
| 4 | IN- | input | Inverting input. Rail-to-rail common-mode range extends 100mV beyond each supply rail (V_SS-0.1V to V_DD+0.1V). Input bias current ~1pA typ. |
| 5 | VDD | power_in | Positive supply. Single-supply range 2.1V to 5.5V (absolute max 7.5V V_DD to V_SS). Bypass with a 0.1uF ceramic capacitor placed close to the pin. |
## Key specifications
| Parameter | Value |
|---|---|
| Manufacturer | Gainsil |
| Package | SOT-23-5 |
| Category | Op-amp/Cmp |
| Pins | 5 |
## Ordering variants
Same part, different packaging or reel option.
- `GS8521-TR`
- `GS8521-TRSR`
- `GS8521-TRMR`
## Electrical characteristics
Limits as printed in the datasheet (page.json `metadata.characteristics` carries them as data).
| Parameter | Symbol | Min | Typ | Max | Unit | Conditions | Page |
|---|---|---|---|---|---|---|---|
| Input Offset Voltage | VOS | | 0.4 | 3.5 | mV | VCM = VS/2 | 3 |
| Common-Mode Rejection Ratio (VCM = -0.1V to 4V) | CMRR | 70 | 114 | | dB | VS = 5.5V, VCM = -0.1V to 4V | 3 |
| Common-Mode Rejection Ratio (VCM = -0.1V to 5.6V) | CMRR | 60 | 87 | | dB | VS = 5.5V, VCM = -0.1V to 5.6V | 3 |
| Open-Loop Voltage Gain (RL = 500kΩ) | AOL | 90 | 110 | | dB | RL = 500kΩ, VO = +0.1V to +4.9V | 3 |
| Open-Loop Voltage Gain (RL = 100kΩ) | AOL | 88 | 108 | | dB | RL = 100kΩ, VO = +0.1V to +4.9V | 3 |
| Output Voltage Swing from Rail (high) | VOH | 4.99 | 4.997 | | V | RL = 500kΩ | 3 |
| Output Voltage Swing from Rail (low) | VOL | | 3 | 10 | mV | RL = 500kΩ | 3 |
| Output Current (source) | ISOURCE | 40 | 58 | | mA | RL = 10Ω to VS/2 | 3 |
| Output Current (sink) | ISINK | 40 | 58 | | mA | RL = 10Ω to VS/2 | 3 |
| Common-Mode Voltage Range | VCM | -0.1 | | 5.6 | V | VS = 5.5V | 3 |
| Power Supply Rejection Ratio | PSRR | 65 | 94 | | dB | VS = +2.5V to +5.5V, VCM = +0.5V | 3 |
| Operating Voltage Range | | 2.1 | | 5.5 | V | | 3 |
| Power Supply Voltage (VDD to Vss) | | -0.5 | | 7.5 | V | | 2 |
| PDB Input Voltage | | | | 7 | V | | 2 |
| Operating Temperature Range | | -40 | | 125 | °C | | 2 |
| Junction Temperature | | | | 160 | °C | | 2 |
| Storage Temperature Range | | -55 | | 150 | °C | | 2 |
| Lead Temperature | | | | 260 | °C | soldering, 10sec | 2 |
| Package Thermal Resistance, SOT23-5 | θJA | | 190 | | °C/W | TA=+25℃ | 2 |
| ESD Susceptibility HBM | | | | 6 | KV | HBM | 2 |
| ESD Susceptibility MM | | | | 300 | V | MM | 2 |
## CAD (KiCad official)
- Symbol: `GS8521-TR`
- Footprint: `Package_TO_SOT_SMD:SOT-23-5`
- 3D model: SOT-23-5 (KiCad packages3D, STEP)
- 3D model files: `gs8521-tr-etched.step` / `gs8521-tr-etched.glb` carry the MPN laser-etched on the die in a toggleable `Adom.LaserEtch` group (Fusion-ready); `gs8521-tr.step` / `gs8521-tr.glb` are the bare package body.
## 3D model downloads
Two STEP files. Same geometry, different body top:
| File | Size | Use it when |
|---|---|---|
| [`gs8521-tr.step`](gs8521-tr.step) | 85 KB | You want the bare part, or you mark your own boards. |
| [`gs8521-tr-etched.step`](gs8521-tr-etched.step) | 1.9 MB | You want the part with `GS8521-TR` already on it. |
The marking in the etched file is real recessed geometry cut into the solid, not a
texture or a decal: 450 faces against 102 in the bare model. It
survives export, section views, and rendering in any CAD tool, and it drops straight
into KiCad or Fusion with no extra setup.
## Provenance
Data extracted from the manufacturer datasheet, not a distributor listing:
- **Datasheet:** [Gainsil datasheet](docs/gs8521-tr-datasheet.pdf) (13 pp, sha256 `20f611aa30eb6027`, retrieved 2026-08-17, tier: lcsc)
- **Extractor:** `ds2sf` (Claude). Every pin and dimension is cited to a datasheet page; it refuses to fabricate.
- **CAD:** KiCad official libraries (CC-BY-SA 4.0).
[Datasheet PDF](docs/gs8521-tr-datasheet.pdf)