component

GS8092-SR

Public Made by Adom

by adom

Gainsil Operational Amplifier, SOP-8. Pinout extracted from the datasheet, KiCad symbol/footprint/3D.

componentop-amp-cmpgs8092-sr
Overview Files Discover Packages Releases Dependencies Issues Breadcrumbs Pull Requests Activity
main
Download ZIP Propose a change
Generated by kicad-footprint-generator · KiCad file format 20260206
Name Last commit message Last updated
docs gs8092-sr: re-etch, flat white mark read from pin 1 (service-occt 1.4.0) + chip hero · Ray 5d ago
viewers pin 1: carry the footprint's marker into the .lbr, the viewer and page.json (silk-marker, drawn, top-left) · Ray 1mo ago
gs8092-sr-etched.fit.json gs8092-sr: re-etch, flat white mark read from pin 1 (service-occt 1.4.0) + chip hero · Ray 5d ago
gs8092-sr-etched.glb gs8092-sr: re-etch, flat white mark read from pin 1 (service-occt 1.4.0) + chip hero · Ray 5d ago
gs8092-sr-etched.step gs8092-sr: re-etch, flat white mark read from pin 1 (service-occt 1.4.0) + chip hero · Ray 5d ago
gs8092-sr.glb Publish 0.1.0 · Ray 1mo ago
gs8092-sr.kicad_mod Publish 0.1.0 · Ray 1mo ago
gs8092-sr.kicad_sym Publish 0.1.0 · Ray 1mo ago
gs8092-sr.lbr rebuild the library on adom-lbr 2.32.0. The published copy was built by 2.18.0, which imported every KiCad roundrect and oval pad as a SQUARE EAGLE smd; this carries the real pad shape across (0 -> 8 rounded pads) and stops dropping geometry drawn on KiCad User.N layers. Attributes, connects, pads and the pin-1 marker are gated against decreasing and are unchanged. · Ray 1mo ago
gs8092-sr.step Publish 0.1.0 · Ray 1mo ago
package.json Publish 0.2.0 · Ray 1mo ago
pads.json pin 1: carry the footprint's marker into the .lbr, the viewer and page.json (silk-marker, drawn, top-left) · Ray 1mo ago
page.json gs8092-sr: component.models_3d pose record per STEP (Z-up, seated z=0, pad-centre origin, identity binding) · Ray 19h ago
README.md gs8092-sr: laser-etched CAD + chip hero (factory 2.0.0 backfill) · Ray 19d ago

GS8092-SR

Gainsil · Operational Amplifier · SOP-8

GS8092-SR from Gainsil, in a SOP-8. Pinout and pin descriptions extracted from the manufacturer datasheet by ds2sf; symbol, footprint, and 3D from KiCad-official CAD.

Pinout

Pin Name Type Function
1 OUTA output Amplifier A output. Rail-to-rail CMOS output, typically swings to within 30mV (RL>1kΩ) or 120mV (RL=150Ω) of either supply rail; ~120mA min output current capability.
2 INA- input Amplifier A inverting input. High-impedance CMOS input, ~1pA typical input bias current; input voltage must stay within Vss-0.5V to VDD+0.5V.
3 INA+ input Amplifier A non-inverting input. High-impedance CMOS input, ~1pA typical input bias current; input common-mode range typically -0.2V to +3.8V on a 5V supply.
4 VSS power_in Negative supply / ground. For single-supply operation tie to GND; for dual-supply operation connect to the negative rail (typ. -1.25V to -2.75V). Bypass with a 0.1µF ceramic capacitor to ground.
5 INB+ input Amplifier B non-inverting input. High-impedance CMOS input, ~1pA typical input bias current; input common-mode range typically -0.2V to +3.8V on a 5V supply.
6 INB- input Amplifier B inverting input. High-impedance CMOS input, ~1pA typical input bias current; input voltage must stay within Vss-0.5V to VDD+0.5V.
7 OUTB output Amplifier B output. Rail-to-rail CMOS output, typically swings to within 30mV (RL>1kΩ) or 120mV (RL=150Ω) of either supply rail; ~120mA min output current capability.
8 VDD power_in Positive supply. Single-supply operating range 2.5V to 5.5V (absolute max 7.5V VDD-VSS). Bypass with a 0.1µF ceramic capacitor to VSS placed close to the pin.

Key specifications

Parameter Value
Manufacturer Gainsil
Package SOP-8
Category Op-amp/Cmp
Pins 8

Ordering variants

Same part, different packaging or reel option.

  • GS8092-SR
  • GS8092-MR
  • GS8092N-MR

CAD (KiCad official)

  • Symbol: GS8092-SR
  • Footprint: Package_SO:SOIC-8_3.9x4.9mm_P1.27mm
  • 3D model: SOP-8 (KiCad packages3D, STEP)
  • 3D model files: gs8092-sr-etched.step / gs8092-sr-etched.glb carry the MPN laser-etched on the die in a toggleable Adom.LaserEtch group (Fusion-ready); gs8092-sr.step / gs8092-sr.glb are the bare package body.

3D model downloads

Two STEP files. Same geometry, different body top:

File Size Use it when
gs8092-sr.step 122 KB You want the bare part, or you mark your own boards.
gs8092-sr-etched.step 2.5 MB You want the part with GS8092-SR already on it.

The marking in the etched file is real recessed geometry cut into the solid, not a texture or a decal: 580 faces against 147 in the bare model. It survives export, section views, and rendering in any CAD tool, and it drops straight into KiCad or Fusion with no extra setup.

Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

  • Datasheet: Gainsil datasheet (21 pp, sha256 8910dc973e35468e, retrieved 2026-08-17, tier: lcsc)
  • Extractor: ds2sf (Claude). Every pin and dimension is cited to a datasheet page; it refuses to fabricate.
  • CAD: KiCad official libraries (CC-BY-SA 4.0).

Datasheet PDF