GR8875NRKAG

{
  "slug": "gr8875nrkag",
  "version": "0.1.0",
  "type": "component",
  "description": "Grenergy DC-DC Converters, SOP-7. Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.",
  "tags": [
    "component",
    "power supply chip",
    "gr8875nrkag",
    "factory-2.0.0",
    "extractor-text"
  ],
  "dependencies": {},
  "hero": {
    "type": "image",
    "path": "docs/hero.png"
  },
  "files": [
    "page.json",
    "README.md",
    "gr8875nrkag.kicad_sym",
    "gr8875nrkag.kicad_mod",
    "gr8875nrkag.glb",
    "gr8875nrkag.step",
    "gr8875nrkag.lbr",
    "docs/hero.png",
    "docs/gr8875nrkag-datasheet.pdf",
    "viewers/symbol.html",
    "viewers/footprint.html",
    "gr8875nrkag-hero.glb",
    "gr8875nrkag-hero.overlay.json",
    "gr8875nrkag-etched.glb"
  ],
  "component": {
    "mpn": "GR8875NRKAG",
    "manufacturer": "Grenergy",
    "package": "SOP-7",
    "pin_count": 7,
    "category": "Power Supply Chip",
    "subcategory": "DC-DC Converters",
    "datasheet": "https://jlcpcb.com/api/file/downloadByFileSystemAccessId/8588884953912250368",
    "parts": {
      "symbol": "gr8875nrkag.kicad_sym",
      "footprint": "gr8875nrkag.kicad_mod",
      "model_3d": "gr8875nrkag-hero.glb",
      "model_3d_plain": "gr8875nrkag-etched.glb",
      "model_3d_step": "gr8875nrkag-etched.step",
      "model_3d_step_plain": "gr8875nrkag.step",
      "lbr": "gr8875nrkag.lbr"
    },
    "distributor_links": {
      "lcsc": "C436832"
    },
    "distributor_check": {
      "checked_at": "2026-10-19T07:26:56Z",
      "source": "Component Ocean /api/assign-pns",
      "digikey": {
        "pn": null,
        "status": "no match"
      },
      "mouser": {
        "pn": null,
        "status": "no match"
      }
    },
    "pins": [
      {
        "number": "1",
        "name": "RTL",
        "type": "input",
        "description": "Latch trigger pin: a voltage above 3.5V latches off for OVP and below 1.05V latches off for OTP, after a 100 uS debounce, with an output current of 92-108 uA and a clamped voltage of 2.2V."
      },
      {
        "number": "2",
        "name": "COMP",
        "type": "input",
        "description": "Voltage feedback pin, connected to a photo-coupler to control the duty cycle; open-loop voltage is 4.5V typical and open-loop protection is delayed by 50 mS."
      },
      {
        "number": "3",
        "name": "CS",
        "type": "input",
        "description": "Current sense pin that senses MOSFET current, with current limit of 0.80-0.90V at low line and 0.7V at high line and 250 nS leading-edge blanking."
      },
      {
        "number": "4",
        "name": "GND",
        "type": "power_in",
        "description": "Ground reference pin."
      },
      {
        "number": "5",
        "name": "OUT",
        "type": "output",
        "description": "Gate driver output for driving the external MOSFET, with output high of 8V typical, output low of 1V typical at 20 mA, and gate clamp of 11-15V at VCC = 25V."
      },
      {
        "number": "6",
        "name": "VCC",
        "type": "power_in",
        "description": "Power supply pin with UVLO on at 16-18V and off at 8-10V, OVP threshold of 27-29V, and an absolute maximum rating of 30V."
      },
      {
        "number": "8",
        "name": "HV",
        "type": "power_in",
        "description": "High-voltage pin that provides the startup current (absolute maximum 500V) and turns off its startup loop once UVLO (on) is tripped to limit startup power loss."
      }
    ],
    "provenance": {
      "extractor": "extract_pins 0.3",
      "factory_chain": {
        "factory": "2.0.0",
        "extractor": "extract_pins 0.3",
        "primary_model": "claude-haiku-5-5",
        "primary_mode": "text",
        "consensus_model": "claude-sonnet-5-5",
        "consensus": "agreed",
        "guards": "pin_guards 0.1: passed",
        "guard_notes": [
          "extractor flagged: The SOP-7 drawing shows only seven labeled leads (RTL, COMP, CS, HV, VCC, OUT, GND) on the same 1-8 ; The page 2 pin table with explicit numbers is written for the SOP-8 package (which includes NC on pi; Pin types (input, power_in, output) were assigned by me using KiCad classes. The datasheet does not "
        ],
        "pages_sent": 13,
        "cost_usd": 0.0492,
        "at": "2026-10-19T07:26:40"
      },
      "datasheet": {
        "url": "https://jlcpcb.com/api/file/downloadByFileSystemAccessId/8588884953912250368",
        "pages": 13,
        "sha256": "098d9713992dcd77",
        "source_tier": "lcsc"
      },
      "cad": "KiCad official (CC-BY-SA 4.0)",
      "pins": {
        "total": 7,
        "described": 7,
        "cites_pages": true,
        "refuses_to_fabricate": true
      }
    },
    "viewers": {
      "symbol": "viewers/symbol.html",
      "footprint": "viewers/footprint.html"
    },
    "models_3d": [
      {
        "file": "gr8875nrkag.step",
        "role": "plain",
        "up": "Z",
        "units": "mm",
        "origin": "footprint origin = pad-pattern centre",
        "seat": "z = 0",
        "extents_mm": [
          5.4,
          4.9,
          1.1
        ],
        "zmin_mm": -0.0,
        "centre_offset_mm": 0.0,
        "footprint_binding": "identity",
        "sha256": "4c9435ffd3683a4ae45655e397c25900eda4f6782a526780f4f7b7b99a32dca7",
        "checked": "2026-10-19",
        "checked_by": "factory/step_pose.py (Z-up, origin, seat, binding)"
      },
      {
        "file": "gr8875nrkag-etched.step",
        "role": "eda",
        "up": "Z",
        "units": "mm",
        "origin": "footprint origin = pad-pattern centre",
        "seat": "z = 0",
        "extents_mm": [
          5.4,
          4.9,
          1.1
        ],
        "zmin_mm": -0.0,
        "centre_offset_mm": 0.0,
        "footprint_binding": "identity",
        "sha256": "820504720144355ac4029a8fbb3db3ee8c71cded212983106c59d1c8651640d7",
        "checked": "2026-10-19",
        "checked_by": "factory/step_pose.py (Z-up, origin, seat, binding)"
      }
    ]
  }
}