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GR7140S

GR · Voltage Regulators - Linear, Low Drop Out (LDO) Regulators · SOT-23-3

GR7140S from GR, in a SOT-23-3. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.

Pinout

Pin Name Type Function
1 GND power_in Chip ground terminal (芯片接地端) of the GR71xx LDO regulator in the SOT23-3 package.
2 VOUT power_out Chip regulated output terminal (芯片输出端) of the GR71xx LDO; output voltage is 3.0 V to 5.0 V with ±3% tolerance per the selection table.
3 VIN power_in Input terminal (启动输入端) of the regulator; the maximum input voltage is 18 V in operation and 20 V absolute maximum.

Key specifications

Parameter Value
Manufacturer GR
Package SOT-23-3
Category Power Management (PMIC)
Pins 3

CAD (KiCad official)

  • Symbol: GR7140S
  • Footprint: Package_TO_SOT_SMD:SOT-23-3
  • 3D model: SOT-23-3 (KiCad packages3D, STEP)
  • 3D model files: gr7140s-etched.step / gr7140s-etched.glb carry the MPN laser-etched on the die in a toggleable Adom.LaserEtch group (Fusion-ready); gr7140s.step / gr7140s.glb are the bare package body.

Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

  • Datasheet: GR datasheet (9 pp, sha256 b4fe657ceb4564f9, retrieved 2026-10-18, tier: lcsc)
  • Datasheet language: Chinese. Pin names, descriptions, and specs on this page were extracted and translated to English by ds2sf; the linked PDF is the manufacturer original.
  • Extractor: parts-factory 2.0.0 / extract_pins 0.3, primary claude-haiku-5-5 (text), consensus claude-sonnet-5-5 (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
  • CAD: KiCad official libraries (CC-BY-SA 4.0).

Datasheet PDF