# GR7033

**GR** · Supervisor And Reset ICs · SOT-23

GR7033 from GR, in a SOT-23. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.

## Pinout

| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | OUT | output | Chip output terminal; output voltage is limited to GND-0.3 V to VDD+0.3 V (absolute maximum), and the minimum output sink current IOL is 0.5 mA at VDD = 2 V with VOUT = 0.2 V. |
| 2 | GND | power_in | Chip ground terminal. |
| 3 | VDD | power_in | Chip input (supply) terminal; the absolute maximum input voltage is 15 V and the operating voltage range is 1.5 V to 12 V. |

## Key specifications

| Parameter | Value |
|---|---|
| Manufacturer | GR |
| Package | SOT-23 |
| Category | Power Management (PMIC) |
| Pins | 3 |

## CAD (KiCad official)

- Symbol: `GR7033`
- Footprint: `Package_TO_SOT_SMD:SOT-23`
- 3D model: SOT-23 (KiCad packages3D, STEP)
- 3D model files: `gr7033-etched.step` / `gr7033-etched.glb` carry the MPN laser-etched on the die in a toggleable `Adom.LaserEtch` group (Fusion-ready); `gr7033.step` / `gr7033.glb` are the bare package body.

## Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

- **Datasheet:** [GR datasheet](https://jlcpcb.com/api/file/downloadByFileSystemAccessId/8602690589666664448) (8 pp, sha256 `9d47eee97f51050d`, retrieved 2026-10-18, tier: lcsc)
- **Datasheet language:** Chinese. Pin names, descriptions, and specs on this page were extracted and translated to English by ds2sf; the linked PDF is the manufacturer original.
- **Extractor:** parts-factory `2.0.0` / `extract_pins 0.3`, primary `claude-haiku-5-5` (text), consensus `claude-sonnet-5-5` (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
- **CAD:** KiCad official libraries (CC-BY-SA 4.0).

[Datasheet PDF](docs/gr7033-datasheet.pdf)