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GP9101-F500-C5H5-SW
Public Made by Adomby adom
Guestgood Analog To Digital Converters (ADC), SOP-8. Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.
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GP9101-F500-C5H5-SW
Guestgood · Analog To Digital Converters (ADC) · SOP-8
GP9101-F500-C5H5-SW from Guestgood, in a SOP-8. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.
Pinout
| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | NC | unconnected | No connection; the datasheet lists it as not connected. |
| 2 | NC | unconnected | No connection; the datasheet lists it as not connected. |
| 3 | VIN | power_in | Analog voltage input, 0 V to VCC, linearly converted to a PWM duty cycle of 0% to 100% (DPWM = VIN/VCC). |
| 4 | NC | unconnected | No connection; the datasheet lists it as not connected. |
| 5 | GND | power_in | Ground. |
| 6 | PWM | output | PWM duty-cycle signal output, with frequency selectable from 1 Hz to 1 MHz (default 1 kHz). |
| 7 | PWMB | output | Complementary output of the PWM signal. |
| 8 | VCC | power_in | Power supply, 4.5 V to 5.5 V (5 V typical). |
Key specifications
| Parameter | Value |
|---|---|
| Manufacturer | Guestgood |
| Package | SOP-8 |
| Category | Data Acquisition |
| Pins | 8 |
Electrical characteristics
Limits as printed in the datasheet (page.json metadata.characteristics carries them as data).
| Parameter | Symbol | Min | Typ | Max | Unit | Conditions | Page |
|---|---|---|---|---|---|---|---|
| PWM frequency error | ∆fpwm | -3 | 0 | 3 | % | 6 | |
| PWM duty cycle error | ∆Dpwm | 0.5 | 1 | % | 6 | ||
| PWM jitter | Jpwm | 0.1 | 0.2 | %p-p | Measured at 1 kHz PWM frequency | 6 | |
| PWM duty cycle range | Dpwm | 0 | 100 | % | Average duty cycle | 6 | |
| Supply voltage | VCC | 4.5 | 5 | 5.5 | V | 6 | |
| Supply current | ICC | 2 | 2.5 | mA | VCC @ 5.0V | 6 | |
| Input voltage | VIN | 0 | V | 6 | |||
| Input leakage current | IIL | 3 | μA | VIN = VCC or VSS | 6 | ||
| Output leakage current | ILO | 3 | μA | VIN = VCC or VSS | 6 | ||
| Output low voltage | VOL | 0.4 | V | VCC @ 5.0V, IOL = 10 mA | 6 | ||
| Output rise time | Tr | 20 | 40 | ns | VCC @ 5.0V, CLOAD=5pF | 6 | |
| Output fall time | Tf | 20 | 40 | ns | VCC @ 5.0V, CLOAD=5pF | 6 | |
| Industrial operating temperature | -40 | 125 | ℃ | Absolute maximum rating | 2 | ||
| Storage temperature | -50 | 125 | ℃ | 2 | |||
| Input voltage (absolute maximum) | -0.3 | V | Upper limit printed as VCC + 0.3 V | 2 | |||
| Maximum voltage | 5.5 | V | 2 | ||||
| ESD protection | 4000 | V | Printed as > 4000 V | 2 | |||
| Operating temperature (SW variant) | -40 | 85 | ℃ | Ordering suffix -SW (SOP8, -40℃-85℃) | 8 |
CAD (KiCad official)
- Symbol:
GP9101-F500-C5H5-SW - Footprint:
Package_SO:SOIC-8_3.9x4.9mm_P1.27mm - 3D model: SOP-8 (KiCad packages3D, STEP)
- 3D model files:
gp9101-f500-c5h5-sw-etched.step/gp9101-f500-c5h5-sw-etched.glbcarry the MPN laser-etched on the die in a toggleableAdom.LaserEtchgroup (Fusion-ready);gp9101-f500-c5h5-sw.step/gp9101-f500-c5h5-sw.glbare the bare package body.
Provenance
Data extracted from the manufacturer datasheet, not a distributor listing:
- Datasheet: Guestgood datasheet (9 pp, sha256
daa0762d946d057b, retrieved 2026-10-19, tier: lcsc) - Datasheet language: Chinese. Pin names, descriptions, and specs on this page were extracted and translated to English by ds2sf; the linked PDF is the manufacturer original.
- Extractor: parts-factory
2.0.0/extract_pins 0.3, primaryclaude-sonnet-5-5(text+vision), consensusclaude-opus-5-5(agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish. - CAD: KiCad official libraries (CC-BY-SA 4.0).
# GP9101-F500-C5H5-SW
**Guestgood** · Analog To Digital Converters (ADC) · SOP-8
GP9101-F500-C5H5-SW from Guestgood, in a SOP-8. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.
## Pinout
| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | NC | unconnected | No connection; the datasheet lists it as not connected. |
| 2 | NC | unconnected | No connection; the datasheet lists it as not connected. |
| 3 | VIN | power_in | Analog voltage input, 0 V to VCC, linearly converted to a PWM duty cycle of 0% to 100% (DPWM = VIN/VCC). |
| 4 | NC | unconnected | No connection; the datasheet lists it as not connected. |
| 5 | GND | power_in | Ground. |
| 6 | PWM | output | PWM duty-cycle signal output, with frequency selectable from 1 Hz to 1 MHz (default 1 kHz). |
| 7 | PWMB | output | Complementary output of the PWM signal. |
| 8 | VCC | power_in | Power supply, 4.5 V to 5.5 V (5 V typical). |
## Key specifications
| Parameter | Value |
|---|---|
| Manufacturer | Guestgood |
| Package | SOP-8 |
| Category | Data Acquisition |
| Pins | 8 |
## Electrical characteristics
Limits as printed in the datasheet (page.json `metadata.characteristics` carries them as data).
| Parameter | Symbol | Min | Typ | Max | Unit | Conditions | Page |
|---|---|---|---|---|---|---|---|
| PWM frequency error | ∆fpwm | -3 | 0 | 3 | % | | 6 |
| PWM duty cycle error | ∆Dpwm | | 0.5 | 1 | % | | 6 |
| PWM jitter | Jpwm | | 0.1 | 0.2 | %p-p | Measured at 1 kHz PWM frequency | 6 |
| PWM duty cycle range | Dpwm | 0 | | 100 | % | Average duty cycle | 6 |
| Supply voltage | VCC | 4.5 | 5 | 5.5 | V | | 6 |
| Supply current | ICC | | 2 | 2.5 | mA | VCC @ 5.0V | 6 |
| Input voltage | VIN | 0 | | | V | | 6 |
| Input leakage current | IIL | | | 3 | μA | VIN = VCC or VSS | 6 |
| Output leakage current | ILO | | | 3 | μA | VIN = VCC or VSS | 6 |
| Output low voltage | VOL | | | 0.4 | V | VCC @ 5.0V, IOL = 10 mA | 6 |
| Output rise time | Tr | | 20 | 40 | ns | VCC @ 5.0V, CLOAD=5pF | 6 |
| Output fall time | Tf | | 20 | 40 | ns | VCC @ 5.0V, CLOAD=5pF | 6 |
| Industrial operating temperature | | -40 | | 125 | ℃ | Absolute maximum rating | 2 |
| Storage temperature | | -50 | | 125 | ℃ | | 2 |
| Input voltage (absolute maximum) | | -0.3 | | | V | Upper limit printed as VCC + 0.3 V | 2 |
| Maximum voltage | | | | 5.5 | V | | 2 |
| ESD protection | | 4000 | | | V | Printed as > 4000 V | 2 |
| Operating temperature (SW variant) | | -40 | | 85 | ℃ | Ordering suffix -SW (SOP8, -40℃-85℃) | 8 |
## CAD (KiCad official)
- Symbol: `GP9101-F500-C5H5-SW`
- Footprint: `Package_SO:SOIC-8_3.9x4.9mm_P1.27mm`
- 3D model: SOP-8 (KiCad packages3D, STEP)
- 3D model files: `gp9101-f500-c5h5-sw-etched.step` / `gp9101-f500-c5h5-sw-etched.glb` carry the MPN laser-etched on the die in a toggleable `Adom.LaserEtch` group (Fusion-ready); `gp9101-f500-c5h5-sw.step` / `gp9101-f500-c5h5-sw.glb` are the bare package body.
## Provenance
Data extracted from the manufacturer datasheet, not a distributor listing:
- **Datasheet:** [Guestgood datasheet](https://jlcpcb.com/api/file/downloadByFileSystemAccessId/8756349122775257088) (9 pp, sha256 `daa0762d946d057b`, retrieved 2026-10-19, tier: lcsc)
- **Datasheet language:** Chinese. Pin names, descriptions, and specs on this page were extracted and translated to English by ds2sf; the linked PDF is the manufacturer original.
- **Extractor:** parts-factory `2.0.0` / `extract_pins 0.3`, primary `claude-sonnet-5-5` (text+vision), consensus `claude-opus-5-5` (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
- **CAD:** KiCad official libraries (CC-BY-SA 4.0).
[Datasheet PDF](docs/gp9101-f500-c5h5-sw-datasheet.pdf)