Loads when you scroll to it. Unloads after 5 minutes in the background.

Symbol & Footprint

Schematic Symbol

Open full view ↗
Loads when you scroll to it. Unloads after 5 minutes in the background.

PCB Footprint

Open full view ↗
Loads when you scroll to it. Unloads after 5 minutes in the background.
Loads when you scroll to it. Unloads after 5 minutes in the background.
Download PDF
Contents

README

markdown

GP9101-F50-N-SW

Guestgood · Analog To Digital Converters (ADCs) · SOP-8

GP9101-F50-N-SW from Guestgood, in a SOP-8. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.

Pinout

Pin Name Type Function
1 NC unconnected No connection; leave unconnected.
2 NC unconnected No connection; leave unconnected.
3 VIN power_in Analog voltage input, 0 V to VCC, converted linearly to PWM duty cycle (DPWM = VIN/VCC); absolute maximum -0.3 V to VCC + 0.3 V.
4 NC unconnected No connection; leave unconnected.
5 GND power_in Ground.
6 PWM output PWM duty-cycle output, 0% to 100%, frequency 1 Hz to 1 MHz (default 1 kHz).
7 PWMB output Complementary output of the PWM signal.
8 VCC power_in Power supply, 4.5 V to 5.5 V (5.5 V maximum).

Key specifications

Parameter Value
Manufacturer Guestgood
Package SOP-8
Category ADC/DAC/Data Conversion
Pins 8

Electrical characteristics

Limits as printed in the datasheet (page.json metadata.characteristics carries them as data).

Parameter Symbol Min Typ Max Unit Conditions Page
Supply voltage VCC VCC 4.5 5 5.5 V 6
Industrial operating temperature -40 125 ℃ 2
Storage temperature -50 125 ℃ 2
Input voltage -0.3 V printed as -0.3 V to VCC + 0.3 V; upper limit not numeric 2
Maximum voltage 5.5 V 2
ESD protection 4000 V printed as > 4000 V 2
Operating temperature (SW grade, -40℃-85℃) -40 85 ℃ ordering table, suffix -SW 8
PWM signal frequency fpwm 1 Hz note 1; default and max printed as 1K and 1M 6
PWM frequency error ∆fpwm -3 0 3 % 6
PWM duty cycle error ∆Dpwm 0.5 1 % 6
PWM duty cycle Dpwm 0 100 % note 2, average duty cycle 6
PWM jitter Jpwm 0.1 0.2 %p-p measured at 1 kHz, note 3 6
Supply current ICC 2 2.5 mA VCC @ 5.0V 6
Input voltage range (DC table) VIN 0 V printed as 0 to VCC 6
Input leakage current IIL 3 μA VIN = VCC or VSS 6
Output leakage current ILO 3 μA VIN = VCC or VSS 6
Output low voltage VOL 0.4 V VCC @ 5.0V, IOL = 10 mA 6
Output high voltage VOH -0.4 V VCC @ 5.0V, IOL = 10 mA; printed as VCC -0.4 V, -0.4 is the printed offset from VCC 6
Output rise time Tr 20 40 ns VCC @ 5.0V, CLOAD=5pF 6
Output fall time Tf 20 40 ns VCC @ 5.0V, CLOAD=5pF 6

CAD (KiCad official)

  • Symbol: GP9101-F50-N-SW
  • Footprint: Package_SO:SOIC-8_3.9x4.9mm_P1.27mm
  • 3D model: SOP-8 (KiCad packages3D, STEP)
  • 3D model files: gp9101-f50-n-sw-etched.step / gp9101-f50-n-sw-etched.glb carry the MPN laser-etched on the die in a toggleable Adom.LaserEtch group (Fusion-ready); gp9101-f50-n-sw.step / gp9101-f50-n-sw.glb are the bare package body.

Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

  • Datasheet: Guestgood datasheet (9 pp, sha256 daa0762d946d057b, retrieved 2026-11-05, tier: lcsc)
  • Datasheet language: Chinese. Pin names, descriptions, and specs on this page were extracted and translated to English by ds2sf; the linked PDF is the manufacturer original.
  • Extractor: parts-factory 2.0.0 / extract_pins 0.3, primary claude-sonnet-5-5 (text+vision), consensus claude-opus-5-5 (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
  • CAD: KiCad official libraries (CC-BY-SA 4.0).

Datasheet PDF