component
GP1200QLGT
Public Made by Adomby adom
HaloChip AC-DC Controllers And Regulators, SOT-23-6. Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.
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GP1200QLGT
HaloChip · AC-DC Controllers And Regulators · SOT-23-6
GP1200QLGT from HaloChip, in a SOT-23-6. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.
Pinout
| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | GND | power_in | Chip ground (芯片地) and the reference for the controller; the datasheet gives no electrical limit for this pin. |
| 2 | GATE | output | Drives the external primary-side MOSFET through a totem-pole driver, clamped to 16 V typical at VDD=24 V (absolute maximum 20 V), with 700 ns typical rise time and 35 ns typical fall time at 0.5 nF load. |
| 3 | CS | input | Peak current sense input for cycle-by-cycle over-current protection, with 500 ns typical leading-edge blanking and 100 ns over-current detection delay at 0.5 nF GATE load; absolute voltage range -0.3 V to 7 V. |
| 4 | CC | input | Constant-current control pin whose internal reference is 500 mV (490 to 510 mV), with absolute voltage range -0.3 V to 7 V. |
| 5 | FB | input | Output voltage feedback input with a 2.0 V reference (1.97 to 2.03 V), output short-circuit threshold of 1.2 V, and absolute voltage range -0.7 V to 7 V. |
| 6 | VDD | power_in | Chip supply pin with start-up at 18 to 22 V, under-voltage lockout off at 8 to 10 V, over-voltage protection at 31 to 35 V, and clamp at 33 to 37 V (absolute maximum 35 V, clamp current maximum 10 mA). |
Key specifications
| Parameter | Value |
|---|---|
| Manufacturer | HaloChip |
| Package | SOT-23-6 |
| Category | Power Management (PMIC) |
| Pins | 6 |
Electrical characteristics
Limits as printed in the datasheet (page.json metadata.characteristics carries them as data).
| Parameter | Symbol | Min | Typ | Max | Unit | Conditions | Page |
|---|---|---|---|---|---|---|---|
| VDD supply voltage | VDD | 35 | V | 3 | |||
| VDD clamping current | IVDD_clamping | 10 | mA | 3 | |||
| GATE pin voltage | 20 | V | 3 | ||||
| CC,CS pin voltage (current sense) | CC,CS | -0.3 | 7 | V | 3 | ||
| FB pin voltage (feedback input) | FB | -0.7 | 7 | V | 3 | ||
| Thermal resistance SOT23-6 | 250 | ℃/W | 3 | ||||
| Maximum junction temperature | TJ | 150 | ℃ | 3 | |||
| Operating temperature range | Ta | -40 | 85 | ℃ | 3 | ||
| Storage temperature range | TSZG | -55 | 150 | ℃ | 3 | ||
| Maximum soldering temperature | Tlead | 260 | ℃ | 10 s soldering | 3 | ||
| ESD (human body model) | ESD | 2 | kV | Human body model, 100pF discharged through 1.5KΩ (note 2) | 3 | ||
| Maximum switching frequency | 120 | khz | 3 | ||||
| Startup current | I_Startup | 2 | 20 | uA | VDD =UVLO(ON)-1V, Measure current into VDD | 4 | |
| Operating current | I_VDD_Op | 1 | 1.5 | mA | VFB=1V,CL=0.5nF, VDD=20V | 4 | |
| Start-up voltage (UVLO on) | UVLO(ON) | 18 | 20 | 22 | V | 4 | |
| Shut-down voltage (UVLO off) | UVLO(OFF) | 8 | 9.5 | 10 | V | 4 | |
| VDD overvoltage protection | VDD_OVP | 31 | 33 | 35 | V | 4 | |
| VDD clamp voltage | VDD_Clamp | 33 | 35 | 37 | V | I(VDD ) = 7 mA | 4 |
| Reference voltage (FB error amplifier) | VFB_EA_Ref | 1.97 | 2 | 2.03 | V | 4 | |
| Internal reference voltage (CC pin) | V_CC_ref | 490 | 500 | 510 | mV | 4 | |
| Output short-circuit protection threshold | VFB_Short | 1.2 | V | 4 | |||
| Output short-circuit protection response time | TFB_Short | 50 | ms | 4 | |||
| Demagnetization detection comparison voltage | VFB_DEM | 75 | mV | 4 | |||
| Minimum off time | Tmin_OFF | 2 | us | 4 | |||
| Maximum off time | Tmax_OFF | 3 | ms | 4 | |||
| Maximum line-compensation current | ICable_max | 55 | uA | 4 | |||
| Leading-edge blanking time | T_blanking | 500 | ns | 4 | |||
| Overcurrent detection delay | TD_OC | 100 | ns | CL=0.5nF at GATE | 4 | ||
| Gate clamp voltage | VG_Clamp | 16 | V | VDD=24V | 4 | ||
| Gate rise time | T_r | 700 | ns | CL=0.5nF | 5 | ||
| Gate fall time | T_f | 35 | ns | CL=0.5nF | 5 |
CAD (KiCad official)
- Symbol:
GP1200QLGT - Footprint:
Package_TO_SOT_SMD:SOT-23-6 - 3D model: SOT-23-6 (KiCad packages3D, STEP)
- 3D model files:
gp1200qlgt-etched.step/gp1200qlgt-etched.glbcarry the MPN laser-etched on the die in a toggleableAdom.LaserEtchgroup (Fusion-ready);gp1200qlgt.step/gp1200qlgt.glbare the bare package body.
Provenance
Data extracted from the manufacturer datasheet, not a distributor listing:
- Datasheet: HaloChip datasheet (9 pp, sha256
32812f5c6d2df259, retrieved 2026-10-17, tier: lcsc) - Datasheet language: Chinese. Pin names, descriptions, and specs on this page were extracted and translated to English by ds2sf; the linked PDF is the manufacturer original.
- Extractor: parts-factory
2.0.0/extract_pins 0.3, primaryclaude-haiku-5-5(text), consensusclaude-sonnet-5-5(agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish. - CAD: KiCad official libraries (CC-BY-SA 4.0).
# GP1200QLGT
**HaloChip** · AC-DC Controllers And Regulators · SOT-23-6
GP1200QLGT from HaloChip, in a SOT-23-6. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.
## Pinout
| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | GND | power_in | Chip ground (芯片地) and the reference for the controller; the datasheet gives no electrical limit for this pin. |
| 2 | GATE | output | Drives the external primary-side MOSFET through a totem-pole driver, clamped to 16 V typical at VDD=24 V (absolute maximum 20 V), with 700 ns typical rise time and 35 ns typical fall time at 0.5 nF load. |
| 3 | CS | input | Peak current sense input for cycle-by-cycle over-current protection, with 500 ns typical leading-edge blanking and 100 ns over-current detection delay at 0.5 nF GATE load; absolute voltage range -0.3 V to 7 V. |
| 4 | CC | input | Constant-current control pin whose internal reference is 500 mV (490 to 510 mV), with absolute voltage range -0.3 V to 7 V. |
| 5 | FB | input | Output voltage feedback input with a 2.0 V reference (1.97 to 2.03 V), output short-circuit threshold of 1.2 V, and absolute voltage range -0.7 V to 7 V. |
| 6 | VDD | power_in | Chip supply pin with start-up at 18 to 22 V, under-voltage lockout off at 8 to 10 V, over-voltage protection at 31 to 35 V, and clamp at 33 to 37 V (absolute maximum 35 V, clamp current maximum 10 mA). |
## Key specifications
| Parameter | Value |
|---|---|
| Manufacturer | HaloChip |
| Package | SOT-23-6 |
| Category | Power Management (PMIC) |
| Pins | 6 |
## Electrical characteristics
Limits as printed in the datasheet (page.json `metadata.characteristics` carries them as data).
| Parameter | Symbol | Min | Typ | Max | Unit | Conditions | Page |
|---|---|---|---|---|---|---|---|
| VDD supply voltage | VDD | | | 35 | V | | 3 |
| VDD clamping current | IVDD_clamping | | | 10 | mA | | 3 |
| GATE pin voltage | | | | 20 | V | | 3 |
| CC,CS pin voltage (current sense) | CC,CS | -0.3 | | 7 | V | | 3 |
| FB pin voltage (feedback input) | FB | -0.7 | | 7 | V | | 3 |
| Thermal resistance SOT23-6 | | | | 250 | ℃/W | | 3 |
| Maximum junction temperature | TJ | | | 150 | ℃ | | 3 |
| Operating temperature range | Ta | -40 | | 85 | ℃ | | 3 |
| Storage temperature range | TSZG | -55 | | 150 | ℃ | | 3 |
| Maximum soldering temperature | Tlead | | | 260 | ℃ | 10 s soldering | 3 |
| ESD (human body model) | ESD | | | 2 | kV | Human body model, 100pF discharged through 1.5KΩ (note 2) | 3 |
| Maximum switching frequency | | | | 120 | khz | | 3 |
| Startup current | I_Startup | | 2 | 20 | uA | VDD =UVLO(ON)-1V, Measure current into VDD | 4 |
| Operating current | I_VDD_Op | | 1 | 1.5 | mA | VFB=1V,CL=0.5nF, VDD=20V | 4 |
| Start-up voltage (UVLO on) | UVLO(ON) | 18 | 20 | 22 | V | | 4 |
| Shut-down voltage (UVLO off) | UVLO(OFF) | 8 | 9.5 | 10 | V | | 4 |
| VDD overvoltage protection | VDD_OVP | 31 | 33 | 35 | V | | 4 |
| VDD clamp voltage | VDD_Clamp | 33 | 35 | 37 | V | I(VDD ) = 7 mA | 4 |
| Reference voltage (FB error amplifier) | VFB_EA_Ref | 1.97 | 2 | 2.03 | V | | 4 |
| Internal reference voltage (CC pin) | V_CC_ref | 490 | 500 | 510 | mV | | 4 |
| Output short-circuit protection threshold | VFB_Short | | 1.2 | | V | | 4 |
| Output short-circuit protection response time | TFB_Short | | 50 | | ms | | 4 |
| Demagnetization detection comparison voltage | VFB_DEM | | 75 | | mV | | 4 |
| Minimum off time | Tmin_OFF | | 2 | | us | | 4 |
| Maximum off time | Tmax_OFF | | 3 | | ms | | 4 |
| Maximum line-compensation current | ICable_max | | 55 | | uA | | 4 |
| Leading-edge blanking time | T_blanking | | 500 | | ns | | 4 |
| Overcurrent detection delay | TD_OC | | 100 | | ns | CL=0.5nF at GATE | 4 |
| Gate clamp voltage | VG_Clamp | | 16 | | V | VDD=24V | 4 |
| Gate rise time | T_r | | 700 | | ns | CL=0.5nF | 5 |
| Gate fall time | T_f | | 35 | | ns | CL=0.5nF | 5 |
## CAD (KiCad official)
- Symbol: `GP1200QLGT`
- Footprint: `Package_TO_SOT_SMD:SOT-23-6`
- 3D model: SOT-23-6 (KiCad packages3D, STEP)
- 3D model files: `gp1200qlgt-etched.step` / `gp1200qlgt-etched.glb` carry the MPN laser-etched on the die in a toggleable `Adom.LaserEtch` group (Fusion-ready); `gp1200qlgt.step` / `gp1200qlgt.glb` are the bare package body.
## Provenance
Data extracted from the manufacturer datasheet, not a distributor listing:
- **Datasheet:** [HaloChip datasheet](https://jlcpcb.com/api/file/downloadByFileSystemAccessId/8600519937643323392) (9 pp, sha256 `32812f5c6d2df259`, retrieved 2026-10-17, tier: lcsc)
- **Datasheet language:** Chinese. Pin names, descriptions, and specs on this page were extracted and translated to English by ds2sf; the linked PDF is the manufacturer original.
- **Extractor:** parts-factory `2.0.0` / `extract_pins 0.3`, primary `claude-haiku-5-5` (text), consensus `claude-sonnet-5-5` (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
- **CAD:** KiCad official libraries (CC-BY-SA 4.0).
[Datasheet PDF](docs/gp1200qlgt-datasheet.pdf)