# GM7350K

**GATEMODE** · Voltage Regulators - Linear, Low Drop Out (LDO) Regulators · SOT-23-5

GM7350K from GATEMODE, in a SOT-23-5. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.

## Pinout

| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | IN | power_in | Input voltage pin; the device operates from 4.5 V to 40 V, with an absolute maximum VIN of 45 V. |
| 2 | GND | power_in | Ground reference pin; connect it directly to the PCB ground plane. |
| 3 | EN | input | Enable pin: drive above 1.2 V to enable the device and below 0.6 V to put it into low-current shutdown (about 280 nA typical); it can be left floating to enable the device, with an absolute maximum of 45 V. |
| 4 | NC | unconnected | No connection. |
| 5 | OUT | power_out | Regulated output voltage pin (5.0 V fixed for GM7350K); the absolute maximum VOUT is 7 V. |

## Key specifications

| Parameter | Value |
|---|---|
| Manufacturer | GATEMODE |
| Package | SOT-23-5 |
| Category | Power Management (PMIC) |
| Pins | 5 |

## Electrical characteristics

Limits as printed in the datasheet (page.json `metadata.characteristics` carries them as data).

| Parameter | Symbol | Min | Typ | Max | Unit | Conditions | Page |
|---|---|---|---|---|---|---|---|
| Input voltage (absolute maximum) | VIN | -0.3 |  | 45 | V |  | 3 |
| Enable voltage (absolute maximum) | VEN | -0.3 |  | 45 | V |  | 3 |
| Output voltage (absolute maximum) | VOUT | -0.3 |  | 7 | V |  | 3 |
| Operating junction temperature (absolute maximum) | TJ | -55 |  | 150 | °C |  | 3 |
| Storage temperature (absolute maximum) | Tstg | -55 |  | 150 | °C |  | 3 |
| ESD human body model | V(ESD) | -2000 |  | 2000 | V | Human body model, per ANSI/ESDA/JEDEC JS-001 | 3 |
| ESD charged device model | V(ESD) | -500 |  | 500 | V | Charged device model, per JEDEC JESD22-C101 | 3 |
| Input voltage (recommended operating) | VIN | 4.5 |  | 40 | V |  | 3 |
| Output voltage (recommended operating) | VOUT | 1.8 |  | 5 | V |  | 3 |
| Enable voltage (recommended operating) | VEN | 0 |  | 40 | V |  | 3 |
| Operating junction temperature (recommended) | TJ | -40 |  | 125 | °C |  | 3 |
| Input voltage range | VIN | 4.5 |  | 40 | V |  | 4 |
| Output voltage range | VOUT | 1.8 |  | 5 | V |  | 4 |
| DC output accuracy | VOUT | -2 |  | 2 | % |  | 4 |
| DC output accuracy (second accuracy row) | VOUT | -1 |  | 1 | % |  | 4 |
| Line regulation | ΔVOUT |  | 3 | 10 | mV | VIN=VOUT(nom) + 1 V to 40V,ILOAD=10mA | 4 |
| Output current limit | I(CL) | 250 |  | 300 | mA | VOUT=0.9xVOUT(NOM) | 4 |
| Enable pin low (disabled) | VEN | 0 |  | 0.6 | V |  | 4 |
| Load regulation |  |  | 60 |  | mV | VIN = VOUT(typ) + 1.5V or 3V (whichever is greater), 100µA ≤ IOUT ≤ 200mA | 4 |
| Dropout voltage at IOUT=50mA | VOD |  | 200 |  | mV | IOUT=50mA | 4 |
| Dropout voltage at IOUT=100mA | VOD |  | 400 |  | mV | IOUT=100mA | 4 |
| Dropout voltage at IOUT=150mA | VOD |  | 700 |  | mV | IOUT=150mA | 4 |
| Ground pin current at no load | IGND |  | 5 |  | μA | IOUT = 0mA | 4 |
| Ground pin current at 150mA | IGND |  | 500 |  | μA | IOUT = 150mA | 4 |
| Shutdown current | ISHUTDOWN |  | 280 |  | nA | VEN ≤ 0.4V, VIN = 7V | 4 |
| Power-supply rejection ratio at 10Hz | PSRR |  | 80 |  | dB | f = 10Hz | 4 |
| Power-supply rejection ratio at 100Hz | PSRR |  | 62 |  | dB | f = 100Hz | 4 |
| Power-supply rejection ratio at 1kHz | PSRR |  | 52 |  | dB | f = 1kHz | 4 |
| Output noise voltage | Vn |  | 190 |  | μVRMS | BW=10Hz to 100kHz, IOUT=10mA,VIN=2.7V,VOUT=1.2V | 4 |
| Start-up time | tSTR |  | 800 |  | μs | VOUT(nom) =5V | 4 |
| Enable pin high (enabled) | VEN |  | 1.2 |  | V |  | 4 |
| VIN undervoltage lock-out (rising) | UVLO |  | 4.5 |  | V | VIN rising | 4 |
| Thermal shutdown temperature (increasing) | tSD |  | 158 |  | °C | Shutdown, temperature increasing | 4 |
| Thermal shutdown reset temperature (decreasing) | tSD |  | 140 |  | °C | Reset, temperature decreasing | 4 |
| Junction-to-ambient thermal resistance, SOT23-5 | θJA |  | 220 |  | °C/W |  | 3 |
| Junction-to-case thermal resistance, SOT23-5 | θJC |  | 62 |  | °C/W |  | 3 |

## CAD (KiCad official)

- Symbol: `GM7350K`
- Footprint: `Package_TO_SOT_SMD:SOT-23-5`
- 3D model: SOT-23-5 (KiCad packages3D, STEP)
- 3D model files: `gm7350k-etched.step` / `gm7350k-etched.glb` carry the MPN laser-etched on the die in a toggleable `Adom.LaserEtch` group (Fusion-ready); `gm7350k.step` / `gm7350k.glb` are the bare package body.

## Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

- **Datasheet:** [GATEMODE datasheet](https://jlcpcb.com/api/file/downloadByFileSystemAccessId/8775420229851586560) (16 pp, sha256 `1aeb1beb1e5d0bb3`, retrieved 2026-10-18, tier: lcsc)
- **Extractor:** parts-factory `2.0.0` / `extract_pins 0.3`, primary `claude-haiku-5-5` (text), consensus `claude-sonnet-5-5` (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
- **CAD:** KiCad official libraries (CC-BY-SA 4.0).

[Datasheet PDF](docs/gm7350k-datasheet.pdf)