GM12051ACPZ-R7

GONGMOSEMI · Voltage Regulators - Linear, Low Drop Out (LDO) Regulators · DFN-10(3x3)

GM12051ACPZ-R7 from GONGMOSEMI, in a DFN-10(3x3). Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.

Pinout

Pin	Name	Type	Function
1	IN	power_in	Regulator supply input, which requires a typical 4.7µF bypass capacitor and more input capacitance for large load transients; the part operates from 2.6V to 20V and its UVLO rising threshold is 2.4V minimum (2.55V typical).
2	IN	power_in	Regulator supply input (second IN pin, tied to the same node as pin 1), which requires a typical 4.7µF bypass capacitor and more input capacitance for large load transients.
3	EN/UV	input	Enable/UVLO pin: pulling it low puts the device in shutdown (under 1µA quiescent, output off), it turns on when rising above 1.07V with 100mV hysteresis, and it must not be left floating (tie to IN if unused).
4	PG	output	Power-good open-drain output that is pulled high when PGFB is above 295mV, and it should be left floating if the power-good function is not used.
5	ILIM	passive	Current-limit programming pin: a resistor from ILIM to GND sets the current limit with a nominal scale factor of 278mA·kΩ, also serves as a 0V to 300mV current monitor, and should be tied to GND if current limiting is not needed.
6	PGFB	input	Power-good feedback input that trips the PG output at 295mV on the rising edge with 20mV hysteresis, sets the PG threshold via an external divider from OUT as 0.295V(1+RPG2/RPG1), and activates fast start; tie it to IN if power-good and fast start are not used.
7	SET	input	Voltage-set pin, the error amplifier inverting input, which sources a precision 100µA through an external resistor to GND so that VOUT = ISET×RSET over a 1V to 15V output range; a capacitor from SET to GND improves noise, PSRR and transient response at the cost of longer startup.
8	GND	power_in	Ground pin, which must be soldered to the PCB ground together with the exposed pad for correct electrical and thermal performance.
9	OUTS	input	Output sense pin, the non-inverting input of the error amplifier, which should be Kelvin-connected directly to the output capacitor and load for best transient performance and load regulation.
10	OUT	power_out	Regulator output that supplies the load and requires a minimum 10µF output capacitor with ESR below 50mΩ and ESL below 2nH for stability.
11	GND	power_in	Ground pin, which must be soldered to the PCB ground together with the exposed pad for correct electrical and thermal performance.

Key specifications

Parameter	Value
Manufacturer	GONGMOSEMI
Package	DFN-10(3x3)
Category	Power Management (PMIC)
Pins	11

CAD (KiCad official)

Symbol: GM12051ACPZ-R7
Footprint: Package_DFN_QFN:DFN-10-1EP_3x3mm_P0.5mm_EP1.55x2.48mm
3D model: DFN-10(3x3) (KiCad packages3D, STEP)
3D model files: gm12051acpz-r7-etched.step / gm12051acpz-r7-etched.glb carry the MPN laser-etched on the die in a toggleable Adom.LaserEtch group (Fusion-ready); gm12051acpz-r7.step / gm12051acpz-r7.glb are the bare package body.

Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

Datasheet: GONGMOSEMI datasheet (22 pp, sha256 8941e0d44edbaf5b, retrieved 2026-10-09, tier: lcsc)
Datasheet language: Chinese. Pin names, descriptions, and specs on this page were extracted and translated to English by ds2sf; the linked PDF is the manufacturer original.
Extractor: parts-factory 2.0.0 / extract_pins 0.3, primary claude-haiku-5-5 (text), consensus claude-sonnet-5-5 (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
CAD: KiCad official libraries (CC-BY-SA 4.0).

Datasheet PDF

# GM12051ACPZ-R7

**GONGMOSEMI** · Voltage Regulators - Linear, Low Drop Out (LDO) Regulators · DFN-10(3x3)

GM12051ACPZ-R7 from GONGMOSEMI, in a DFN-10(3x3). Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.

## Pinout

| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | IN | power_in | Regulator supply input, which requires a typical 4.7µF bypass capacitor and more input capacitance for large load transients; the part operates from 2.6V to 20V and its UVLO rising threshold is 2.4V minimum (2.55V typical). |
| 2 | IN | power_in | Regulator supply input (second IN pin, tied to the same node as pin 1), which requires a typical 4.7µF bypass capacitor and more input capacitance for large load transients. |
| 3 | EN/UV | input | Enable/UVLO pin: pulling it low puts the device in shutdown (under 1µA quiescent, output off), it turns on when rising above 1.07V with 100mV hysteresis, and it must not be left floating (tie to IN if unused). |
| 4 | PG | output | Power-good open-drain output that is pulled high when PGFB is above 295mV, and it should be left floating if the power-good function is not used. |
| 5 | ILIM | passive | Current-limit programming pin: a resistor from ILIM to GND sets the current limit with a nominal scale factor of 278mA·kΩ, also serves as a 0V to 300mV current monitor, and should be tied to GND if current limiting is not needed. |
| 6 | PGFB | input | Power-good feedback input that trips the PG output at 295mV on the rising edge with 20mV hysteresis, sets the PG threshold via an external divider from OUT as 0.295V(1+RPG2/RPG1), and activates fast start; tie it to IN if power-good and fast start are not used. |
| 7 | SET | input | Voltage-set pin, the error amplifier inverting input, which sources a precision 100µA through an external resistor to GND so that VOUT = ISET×RSET over a 1V to 15V output range; a capacitor from SET to GND improves noise, PSRR and transient response at the cost of longer startup. |
| 8 | GND | power_in | Ground pin, which must be soldered to the PCB ground together with the exposed pad for correct electrical and thermal performance. |
| 9 | OUTS | input | Output sense pin, the non-inverting input of the error amplifier, which should be Kelvin-connected directly to the output capacitor and load for best transient performance and load regulation. |
| 10 | OUT | power_out | Regulator output that supplies the load and requires a minimum 10µF output capacitor with ESR below 50mΩ and ESL below 2nH for stability. |
| 11 | GND | power_in | Ground pin, which must be soldered to the PCB ground together with the exposed pad for correct electrical and thermal performance. |

## Key specifications

| Parameter | Value |
|---|---|
| Manufacturer | GONGMOSEMI |
| Package | DFN-10(3x3) |
| Category | Power Management (PMIC) |
| Pins | 11 |

## CAD (KiCad official)

- Symbol: `GM12051ACPZ-R7`
- Footprint: `Package_DFN_QFN:DFN-10-1EP_3x3mm_P0.5mm_EP1.55x2.48mm`
- 3D model: DFN-10(3x3) (KiCad packages3D, STEP)
- 3D model files: `gm12051acpz-r7-etched.step` / `gm12051acpz-r7-etched.glb` carry the MPN laser-etched on the die in a toggleable `Adom.LaserEtch` group (Fusion-ready); `gm12051acpz-r7.step` / `gm12051acpz-r7.glb` are the bare package body.

## Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

- **Datasheet:** [GONGMOSEMI datasheet](https://jlcpcb.com/api/file/downloadByFileSystemAccessId/8773986117659824128) (22 pp, sha256 `8941e0d44edbaf5b`, retrieved 2026-10-09, tier: lcsc)
- **Datasheet language:** Chinese. Pin names, descriptions, and specs on this page were extracted and translated to English by ds2sf; the linked PDF is the manufacturer original.
- **Extractor:** parts-factory `2.0.0` / `extract_pins 0.3`, primary `claude-haiku-5-5` (text), consensus `claude-sonnet-5-5` (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
- **CAD:** KiCad official libraries (CC-BY-SA 4.0).

[Datasheet PDF](docs/gm12051acpz-r7-datasheet.pdf)