component
GL850G-HHY22
Public Made by Adomby adom
Genesys Logic USB Converters, SSOP-28-208mil. Pinout extracted from the datasheet, KiCad symbol/footprint/3D.
main
Ray
gl850g-hhy22: component.models_3d pose record per STEP (Z-up, seated z=0, pad-centre origin, identity binding)
9905649
123456789101112131415161718192021222324252627282930313233343536373839404142434445464748495051525354555657585960616263646566676869707172737475767778798081828384858687888990919293949596979899100101102103104105106107108109110111112113114115116117118119120121122123124125126127128129130131132133134135136137138139140141142143144145146147148149150151152153154155156157158159160161162163164165166167168169170171172173174175176177178179180181182183184185186187188189190191192193194195196197198199200201202203204205206207208209210211212213214215216217218219220221222223224225226227228229230231232233234235236237238239240241242243244245246247248249250251252253254255256257258259260261262263264265266267268269270271272273274275276277278279280281282283284285286287288289290291292293294295296297298299300301302303304305306307308309310311312313314315316317318319320321322323324325326327328329330331332333334335
{
"schema_version": 1,
"type": "component",
"slug": "gl850g-hhy22",
"title": "GL850G-HHY22",
"brief": "Genesys Logic USB Converters, SSOP-28-208mil. Pinout extracted from the datasheet, KiCad symbol/footprint/3D.",
"version": "0.2.0",
"license": "CC-BY-SA-4.0",
"tags": [
"component",
"interface",
"gl850g-hhy22"
],
"component": {
"mpn": "GL850G-HHY22",
"manufacturer": "Genesys Logic",
"package": "SSOP-28-208mil",
"pin_count": 28,
"category": "Interface",
"subcategory": "USB Converters",
"datasheet": "https://datasheet.lcsc.com/datasheet/pdf/8bd427ad99f44a6b8a994ca1da0bb774.pdf",
"parts": {
"symbol": "gl850g-hhy22.kicad_sym",
"footprint": "gl850g-hhy22.kicad_mod",
"model_3d": "gl850g-hhy22-etched.glb",
"model_3d_plain": "gl850g-hhy22.glb",
"model_3d_step": "gl850g-hhy22-etched.step",
"model_3d_step_plain": "gl850g-hhy22.step",
"lbr": "gl850g-hhy22.lbr"
},
"distributor_links": {
"lcsc": "C136617"
},
"pins": [
{
"number": "1",
"name": "AVDD",
"type": "power_in",
"description": "3.3 V analog power input for internal analog circuits (USB PHY, PLL)."
},
{
"number": "2",
"name": "DM2",
"type": "bidirectional",
"description": "USB 2.0 downstream port 2, D- differential data line."
},
{
"number": "3",
"name": "DP2",
"type": "bidirectional",
"description": "USB 2.0 downstream port 2, D+ differential data line."
},
{
"number": "4",
"name": "RREF",
"type": "passive",
"description": "USB PHY bias reference. Connect a 680 Ω resistor from RREF to AGND to set the USB transmitter bias current."
},
{
"number": "5",
"name": "AVDD",
"type": "power_in",
"description": "3.3 V analog power input for internal analog circuits."
},
{
"number": "6",
"name": "X1",
"type": "input",
"description": "12 MHz crystal input, or external 12/27/48 MHz clock input (only 12 MHz supported on SSOP-28; SEL48/SEL27 select pins are not brought out)."
},
{
"number": "7",
"name": "X2",
"type": "output",
"description": "12 MHz crystal output. Leave open if driving X1 from an external oscillator."
},
{
"number": "8",
"name": "DM3",
"type": "bidirectional",
"description": "USB 2.0 downstream port 3, D- differential data line."
},
{
"number": "9",
"name": "DP3",
"type": "bidirectional",
"description": "USB 2.0 downstream port 3, D+ differential data line."
},
{
"number": "10",
"name": "AVDD",
"type": "power_in",
"description": "3.3 V analog power input for internal analog circuits."
},
{
"number": "11",
"name": "DM4",
"type": "bidirectional",
"description": "USB 2.0 downstream port 4, D- differential data line."
},
{
"number": "12",
"name": "DP4",
"type": "bidirectional",
"description": "USB 2.0 downstream port 4, D+ differential data line."
},
{
"number": "13",
"name": "RESET#",
"type": "input",
"description": "Active-low external reset input, 5 V tolerant. Internally pulled high through ~10 kΩ. Drive low to reset the whole chip."
},
{
"number": "14",
"name": "TEST/SCL",
"type": "bidirectional",
"description": "Dual-function pin. TEST: 0 = normal operation (internal pull-down), 1 = test mode. In SSOP-28/QFN-28 it also serves as the I2C clock output for an external 24C02 EEPROM."
},
{
"number": "15",
"name": "GND",
"type": "power_in",
"description": "Common ground return."
},
{
"number": "16",
"name": "DVDD",
"type": "power_in",
"description": "3.3 V digital power input for the digital core."
},
{
"number": "17",
"name": "PSELF",
"type": "input",
"description": "Self/bus power strap, 5 V tolerant. 0 = bus-powered hub, 1 = self-powered hub."
},
{
"number": "18",
"name": "PGANG",
"type": "bidirectional",
"description": "Gang/Individual power-management strap and status output. Default input at power-on reset; sampled during strapping (gang input = 1, individual input = 0), then switches to an output that is high in normal mode and low when the hub is suspended. SSOP-28 supports GANG mode only."
},
{
"number": "19",
"name": "OVCUR2#",
"type": "input",
"description": "Active-low over-current indicator for downstream ports 3-4 in GANG mode, 5 V tolerant. Flag asserts when OVCUR is low for more than 3 ms."
},
{
"number": "20",
"name": "PWREN2#",
"type": "output",
"description": "Active-low power-enable output for downstream ports 3-4 in GANG mode. *Power switch is not supported in the GL850G-22 version - this output is non-functional on GL850G-HHY22."
},
{
"number": "21",
"name": "OVCUR1#",
"type": "input",
"description": "Active-low over-current indicator for downstream ports 1-2 in GANG mode, 5 V tolerant. In GANG mode OVCUR1# is the only over-current flag used."
},
{
"number": "22",
"name": "PWREN1#",
"type": "output",
"description": "Active-low power-enable output for downstream ports 1-2 in GANG mode. In GANG mode PWREN1# is the only power-enable output used. *Power switch not supported in GL850G-22 version."
},
{
"number": "23",
"name": "V5",
"type": "power_in",
"description": "5 V power input to the on-chip 5 V→3.3 V regulator. Leave NC when using an external 3.3 V regulator."
},
{
"number": "24",
"name": "V33",
"type": "power_out",
"description": "5 V→3.3 V regulator output AND 3.3 V supply pin (SSOP-28/QFN-28). Bypass to ground; also drives AVDD/DVDD externally."
},
{
"number": "25",
"name": "DM0",
"type": "bidirectional",
"description": "USB 2.0 upstream (USPORT) port, D- differential data line."
},
{
"number": "26",
"name": "DP0",
"type": "bidirectional",
"description": "USB 2.0 upstream (USPORT) port, D+ differential data line."
},
{
"number": "27",
"name": "DM1",
"type": "bidirectional",
"description": "USB 2.0 downstream port 1, D- differential data line."
},
{
"number": "28",
"name": "DP1",
"type": "bidirectional",
"description": "USB 2.0 downstream port 1, D+ differential data line."
}
],
"provenance": {
"extractor": "ds2sf",
"datasheet": {
"url": "https://datasheet.lcsc.com/datasheet/pdf/8bd427ad99f44a6b8a994ca1da0bb774.pdf",
"pages": 39,
"sha256": "58ba9f67e305425f",
"source_tier": "lcsc"
},
"cad": "KiCad official (CC-BY-SA 4.0)",
"pins": {
"total": 28,
"described": 28,
"cites_pages": true,
"refuses_to_fabricate": true
}
},
"viewers": {
"symbol": "viewers/symbol.html",
"footprint": "viewers/footprint.html"
},
"pin1": {
"pad": "1",
"at": [
-3.5,
-4.225
],
"corner": "top-left",
"source": "silk-marker",
"derived_from": "SSOP-28_5.3x10.2mm_P0.65mm@sha256:bbb0d0449b996c0a",
"mark": "drawn"
},
"models_3d": [
{
"file": "gl850g-hhy22.step",
"role": "plain",
"up": "Z",
"units": "mm",
"origin": "footprint origin = pad-pattern centre",
"seat": "z = 0",
"extents_mm": [
7.8,
10.2,
2.1
],
"zmin_mm": 0,
"centre_offset_mm": 0,
"footprint_binding": "identity",
"sha256": "7aa76979ae41da44bded1ed74115012868f2f3f5a757faf32bb9df4f92c1e313",
"checked": "2026-10-07",
"checked_by": "factory/step_pose.py (Z-up, origin, seat, binding)"
},
{
"file": "gl850g-hhy22-etched.step",
"role": "eda",
"up": "Z",
"units": "mm",
"origin": "footprint origin = pad-pattern centre",
"seat": "z = 0",
"extents_mm": [
7.8,
10.2,
2.1
],
"zmin_mm": 0,
"centre_offset_mm": 0,
"footprint_binding": "identity",
"sha256": "8555243a7ee75360ff7543792de9740cf922f8b286781d0c8c0395dfff24a139",
"checked": "2026-10-07",
"checked_by": "factory/step_pose.py (Z-up, origin, seat, binding)"
}
]
},
"metadata": {
"specs": {
"Manufacturer": "Genesys Logic",
"Package": "SSOP-28-208mil",
"Category": "Interface",
"Pins": "28"
}
},
"sections": [
"hero",
"viewers",
"readme",
"breadcrumbs",
"info"
],
"discovery_triggers": [
"gl850g-hhy22"
],
"discovery_pitch": "GL850G-HHY22 (Genesys Logic) component page with datasheet-verified CAD.",
"author": {
"name": "Ray"
},
"dependencies": {},
"hero": {
"type": "image",
"path": "docs/hero.png"
},
"files": [
"page.json",
"README.md",
"gl850g-hhy22.kicad_sym",
"gl850g-hhy22.kicad_mod",
"gl850g-hhy22.glb",
"gl850g-hhy22.step",
"gl850g-hhy22-etched.step",
"gl850g-hhy22.lbr",
"docs/hero.png",
"docs/gl850g-hhy22-datasheet.pdf",
"viewers/symbol.html",
"viewers/footprint.html"
],
"visibility": {
"public": true
},
"variants": [
{
"mpn": "GL850G-HHY22HHYXX",
"kind": "packaging"
},
{
"mpn": "GL850G-HHY22MNYXX",
"kind": "packaging"
},
{
"mpn": "GL850G-HHY22OHYXX",
"kind": "packaging"
}
],
"updated_at": "2026-09-24T21:03:34.403Z"
}