GL7101SD

{
  "slug": "gl7101sd",
  "version": "0.1.0",
  "type": "component",
  "description": "HTC Korea TAEJIN Tech Supervisor And Reset ICs, SOP-8. Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.",
  "tags": [
    "component",
    "power management (pmic)",
    "gl7101sd",
    "factory-2.0.0",
    "extractor-text"
  ],
  "dependencies": {},
  "hero": {
    "type": "image",
    "path": "docs/hero.png"
  },
  "files": [
    "page.json",
    "README.md",
    "gl7101sd.kicad_sym",
    "gl7101sd.kicad_mod",
    "gl7101sd.glb",
    "gl7101sd.step",
    "gl7101sd.lbr",
    "docs/hero.png",
    "docs/gl7101sd-datasheet.pdf",
    "viewers/symbol.html",
    "viewers/footprint.html",
    "gl7101sd-hero.glb",
    "gl7101sd-hero.overlay.json",
    "gl7101sd-etched.glb"
  ],
  "component": {
    "mpn": "GL7101SD",
    "manufacturer": "HTC Korea TAEJIN Tech",
    "package": "SOP-8",
    "pin_count": 8,
    "category": "Power Management (PMIC)",
    "subcategory": "Supervisor And Reset ICs",
    "datasheet": "https://jlcpcb.com/api/file/downloadByFileSystemAccessId/8588918124352065536",
    "parts": {
      "symbol": "gl7101sd.kicad_sym",
      "footprint": "gl7101sd.kicad_mod",
      "model_3d": "gl7101sd-hero.glb",
      "model_3d_plain": "gl7101sd-etched.glb",
      "model_3d_step": "gl7101sd-etched.step",
      "model_3d_step_plain": "gl7101sd.step",
      "lbr": "gl7101sd.lbr"
    },
    "distributor_links": {
      "lcsc": "C919689",
      "digikey": "5536-GL7101SDTR-ND"
    },
    "distributor_check": {
      "checked_at": "2026-10-20T20:49:40Z",
      "source": "Component Ocean /api/assign-pns",
      "digikey": {
        "pn": "5536-GL7101SDTR-ND",
        "status": "found",
        "lifecycle": "Active"
      },
      "mouser": {
        "pn": null,
        "status": "no match"
      }
    },
    "pins": [
      {
        "number": "1",
        "name": "VR",
        "type": "power_out",
        "description": "Reference Voltage pin; the electrical tests use the differential input VR-VIN, and the datasheet gives no separate voltage limit for this pin."
      },
      {
        "number": "2",
        "name": "IN",
        "type": "input",
        "description": "Differential amplifier input, connected to the secondary node of the zero current transformer; input clamp voltage VIC is 4.3 V to 6.7 V at IIC=20 mA with VS=12 V."
      },
      {
        "number": "3",
        "name": "GND",
        "type": "power_in",
        "description": "Ground reference for the device; the VS-GND capacitor CVS must be at least 1 µF."
      },
      {
        "number": "4",
        "name": "OD",
        "type": "output",
        "description": "Differential amplifier output; output current ITD1 is -12 µA to -30 µA at VS=16 V and VOD=1.2 V, and ITD2 is 17 µA to 37 µA at VS=6 V."
      },
      {
        "number": "5",
        "name": "SC",
        "type": "input",
        "description": "Latch input; SC on voltage is 0.7 V to 1.4 V at VS=16 V, and SC input current is at most 5 µA at VS=12 V."
      },
      {
        "number": "6",
        "name": "NR",
        "type": "passive",
        "description": "Terminal for noise absorption; the datasheet gives no connection value or electrical limit for this pin."
      },
      {
        "number": "7",
        "name": "OS",
        "type": "output",
        "description": "Output of the level comparator and latch; output L current is at least 200 µA at VS=12 V and VOSL=0.2 V, and the OS-GND capacitor COS must be at most 1 µF."
      },
      {
        "number": "8",
        "name": "V+",
        "type": "power_in",
        "description": "Power supply pin (VS); recommended supply is at least 12 V, the absolute maximum is 20 V, and the VS-GND capacitor CVS must be at least 1 µF."
      }
    ],
    "provenance": {
      "extractor": "extract_pins 0.3",
      "factory_chain": {
        "factory": "2.0.0",
        "extractor": "extract_pins 0.3",
        "primary_model": "claude-haiku-5-5",
        "primary_mode": "text",
        "consensus_model": "claude-sonnet-5-5",
        "consensus": "agreed",
        "guards": "pin_guards 0.1: passed",
        "guard_notes": [
          "extractor flagged: The datasheet does not state electrical direction for VR, NR, or OS explicitly; types are inferred f; NR has no stated voltage, current, or connection value in the datasheet; the description is limited ; The pinout is identical for SOP-8 and DIP-8 in the datasheet, and GL7101SD (SOP-8, trip voltage 11.5"
        ],
        "pages_sent": 11,
        "cost_usd": 0.0292,
        "at": "2026-10-20T20:44:40"
      },
      "datasheet": {
        "url": "https://jlcpcb.com/api/file/downloadByFileSystemAccessId/8588918124352065536",
        "pages": 11,
        "sha256": "088a6bd98bf97de2",
        "source_tier": "lcsc"
      },
      "cad": "KiCad official (CC-BY-SA 4.0)",
      "pins": {
        "total": 8,
        "described": 8,
        "cites_pages": true,
        "refuses_to_fabricate": true
      }
    },
    "viewers": {
      "symbol": "viewers/symbol.html",
      "footprint": "viewers/footprint.html"
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        "units": "mm",
        "origin": "footprint origin = pad-pattern centre",
        "seat": "z = 0",
        "extents_mm": [
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        "zmin_mm": -0.0,
        "centre_offset_mm": 0.0,
        "footprint_binding": "identity",
        "sha256": "07f46cff378d30e6c27dfd5a03092c795323f86d91c71fc7e743f4f418dc553a",
        "checked": "2026-10-20",
        "checked_by": "factory/step_pose.py (Z-up, origin, seat, binding)"
      },
      {
        "file": "gl7101sd-etched.step",
        "role": "eda",
        "up": "Z",
        "units": "mm",
        "origin": "footprint origin = pad-pattern centre",
        "seat": "z = 0",
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        "sha256": "10ebd5b9943ee25ebe12a0cf1cf034748bfe5964af3cda7b6607ee05aab54daa",
        "checked": "2026-10-20",
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}