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GD32F450VKT6

GigaDevice Semicon Beijing · Microcontroller Units (MCUs/MPUs/SOCs) · LQFP-100(14x14)

GD32F450VKT6 from GigaDevice Semicon Beijing, in a LQFP-100(14x14). Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.

Pinout

Pin Name Type Function
1 PE2 bidirectional 5V-tolerant GPIO, default PE2; alternates TRACECLK, SPI3_SCK, ETH_MII_TXD3, EXMC_A23, EVENTOUT.
2 PE3 bidirectional 5V-tolerant GPIO, default PE3; alternates TRACED0, EXMC_A19, EVENTOUT.
3 PE4 bidirectional 5V-tolerant GPIO, default PE4; alternates TRACED1, SPI3_NSS, EXMC_A20, DCI_D4, TLI_B0, EVENTOUT.
4 PE5 bidirectional 5V-tolerant GPIO, default PE5; alternates TRACED2, TIMER8_CH0, SPI3_MISO, EXMC_A21, DCI_D6, TLI_G0, EVENTOUT.
5 PE6 bidirectional 5V-tolerant GPIO, default PE6; alternates TRACED3, TIMER8_CH1, SPI3_MOSI, EXMC_A22, DCI_D7, TLI_G1, EVENTOUT.
6 VBAT power_in Backup battery supply pin.
7 PC13-TAMPER-RTC bidirectional 5V-tolerant GPIO, default PC13; additional RTC_TAMP0, RTC_OUT, RTC_TS; alternate EVENTOUT.
8 PC14-OSC32_IN bidirectional 5V-tolerant GPIO, default PC14; additional OSC32IN (32.768 kHz oscillator input); alternate EVENTOUT.
9 PC15-OSC32_OUT bidirectional 5V-tolerant GPIO, default PC15; additional OSC32OUT (32.768 kHz oscillator output); alternate EVENTOUT.
10 VSS power_in Ground pin.
11 VDD power_in Digital supply pin.
12 PH0 bidirectional 5V-tolerant GPIO, default PH0 / OSCIN (main oscillator input); alternate EVENTOUT.
13 PH1 bidirectional 5V-tolerant GPIO, default PH1 / OSCOUT (main oscillator output); alternate EVENTOUT.
14 NRST input System reset pin, default function NRST.
15 PC0 bidirectional 5V-tolerant GPIO, default PC0; alternates USBHS_ULPI_STP, EXMC_SDNWE, EVENTOUT; additional ADC012_IN10.
16 PC1 bidirectional 5V-tolerant GPIO, default PC1; alternates SPI2_MOSI, I2S2_SD, SPI1_MOSI, I2S1_SD, ETH_MDC, EVENTOUT; additional ADC012_IN11.
17 PC2 bidirectional 5V-tolerant GPIO, default PC2; alternates SPI1_MISO, I2S1_ADD_SD, USBHS_ULPI_DIR, ETH_MII_TXD2, EXMC_SDNE0, EVENTOUT; additional ADC012_IN12.
18 PC3 bidirectional 5V-tolerant GPIO, default PC3; alternates SPI1_MOSI, I2S1_SD, USBHS_ULPI_NXT, ETH_MII_TX_CLK, EXMC_SDCKE0, EVENTOUT; additional ADC012_IN13.
19 VDD power_in Digital supply pin.
20 VSSA power_in Analog ground pin.
21 VREF+ power_in Positive analog reference voltage pin.
22 VDDA power_in Analog supply pin.
23 PA0-WKUP bidirectional 5V-tolerant GPIO, default PA0; alternates TIMER1_CH0, TIMER1_ETI, TIMER4_CH0, TIMER7_ETI, USART1_CTS, UART3_TX, ETH_MII_CRS, EVENTOUT; additional ADC012_IN0, WKUP.
24 PA1 bidirectional 5V-tolerant GPIO, default PA1; alternates TIMER1_CH1, TIMER4_CH1, SPI3_MOSI, USART1_RTS, UART3_RX, ETH_MII_RX_CLK, ETH_RMII_REF_CLK, EVENTOUT; additional ADC012_IN1.
25 PA2 bidirectional 5V-tolerant GPIO, default PA2; alternates TIMER1_CH2, TIMER4_CH2, TIMER8_CH0, I2S_CKIN, USART1_TX, ETH_MDIO, EVENTOUT; additional ADC012_IN2.
26 PA3 bidirectional 5V-tolerant GPIO, default PA3; alternates TIMER1_CH3, TIMER4_CH3, TIMER8_CH1, I2S1_MCK, USART1_RX, USBHS_ULPI_D0, ETH_MII_COL, TLI_B5, EVENTOUT; additional ADC012_IN3.
27 VSS power_in Ground pin.
28 VDD power_in Digital supply pin.
29 PA4 bidirectional TTa-level GPIO, default PA4; alternates SPI0_NSS, SPI2_NSS, I2S2_WS, USART1_CK, USBHS_SOF, DCI_HSYNC, TLI_VSYNC, EVENTOUT; additional ADC01_IN4, DAC_OUT0.
30 PA5 bidirectional TTa-level GPIO, default PA5; alternates TIMER1_CH0, TIMER1_ETI, TIMER7_CH0_ON, SPI0_SCK, USBHS_ULPI_CK, EVENTOUT; additional ADC01_IN5, DAC_OUT1.
31 PA6 bidirectional 5V-tolerant GPIO, default PA6; alternates TIMER0_BRKIN, TIMER2_CH0, TIMER7_BRKIN, SPI0_MISO, I2S1_MCK, TIMER12_CH0, SDIO_CMD, DCI_PIXCLK, TLI_G2, EVENTOUT; additional ADC01_IN6.
32 PA7 bidirectional 5V-tolerant GPIO, default PA7; alternates TIMER0_CH0_ON, TIMER2_CH1, TIMER7_CH0_ON, SPI0_MOSI, TIMER13_CH0, ETH_MII_RX_DV, ETH_RMII_CRS_DV, EXMC_SDNWE, EVENTOUT; additional ADC01_IN7.
33 PC4 bidirectional 5V-tolerant GPIO, default PC4; alternates ETH_MII_RXD0, ETH_RMII_RXD0, EXMC_SDNE0, EVENTOUT; additional ADC01_IN14.
34 PC5 bidirectional 5V-tolerant GPIO, default PC5; alternates USART2_RX, ETH_MII_RXD1, ETH_RMII_RXD1, EXMC_SDCKE0, EVENTOUT; additional ADC01_IN15.
35 PB0 bidirectional 5V-tolerant GPIO, default PB0; alternates TIMER0_CH1_ON, TIMER2_CH2, TIMER7_CH1_ON, SPI4_SCK, SPI2_MOSI, I2S2_SD, TLI_R3, USBHS_ULPI_D1, ETH_MII_RXD2, SDIO_D1, EVENTOUT; additional ADC01_IN8, IREF.
36 PB1 bidirectional 5V-tolerant GPIO, default PB1; alternates TIMER0_CH2_ON, TIMER2_CH3, TIMER7_CH2_ON, SPI4_NSS, TLI_R6, USBHS_ULPI_D2, ETH_MII_RXD3, SDIO_D2, EVENTOUT; additional ADC01_IN9.
37 PB2 bidirectional 5V-tolerant GPIO, default PB2 / BOOT1; alternates TIMER1_CH3, SPI2_MOSI, I2S2_SD, USBHS_ULPI_D4, SDIO_CK, EVENTOUT.
38 PE7 bidirectional 5V-tolerant GPIO, default PE7; alternates TIMER0_ETI, UART6_RX, EXMC_D4, EVENTOUT.
39 PE8 bidirectional 5V-tolerant GPIO, default PE8; alternates TIMER0_CH0_ON, UART6_TX, EXMC_D5, EVENTOUT.
40 PE9 bidirectional 5V-tolerant GPIO, default PE9; alternates TIMER0_CH0, EXMC_D6, EVENTOUT.
41 PE10 bidirectional 5V-tolerant GPIO, default PE10; alternates TIMER0_CH1_ON, EXMC_D7, EVENTOUT.
42 PE11 bidirectional 5V-tolerant GPIO, default PE11; alternates TIMER0_CH1, SPI3_NSS, SPI4_NSS, EXMC_D8, TLI_G3, EVENTOUT.
43 PE12 bidirectional 5V-tolerant GPIO, default PE12; alternates TIMER0_CH2_ON, SPI3_SCK, SPI4_SCK, EXMC_D9, TLI_B4, EVENTOUT.
44 PE13 bidirectional 5V-tolerant GPIO, default PE13; alternates TIMER0_CH2, SPI3_MISO, SPI4_MISO, EXMC_D10, TLI_DE, EVENTOUT.
45 PE14 bidirectional 5V-tolerant GPIO, default PE14; alternates TIMER0_CH3, SPI3_MOSI, SPI4_MOSI, EXMC_D11, TLI_PIXCLK, EVENTOUT.
46 PE15 bidirectional 5V-tolerant GPIO, default PE15; alternates TIMER0_BRKIN, EXMC_D12, TLI_R7, EVENTOUT.
47 PB10 bidirectional 5V-tolerant GPIO, default PB10; alternates TIMER1_CH2, I2C1_SCL, SPI1_SCK, I2S1_CK, I2S2_MCK, USART2_TX, USBHS_ULPI_D3, ETH_MII_RX_ER, SDIO_D7, TLI_G4, EVENTOUT.
48 PB11 bidirectional 5V-tolerant GPIO, default PB11; alternates TIMER1_CH3, I2C1_SDA, I2S_CKIN, USART2_RX, USBHS_ULPI_D4, ETH_MII_TX_EN, ETH_RMII_TX_EN, TLI_G5, EVENTOUT.
49 NC unconnected Listed as NC in the pin table (default function VCORE, type power); no connection stated in the LQFP100 figure.
50 VDD power_in Digital supply pin.
51 PB12 bidirectional 5V-tolerant GPIO, default PB12; alternates TIMER0_BRKIN, I2C1_SMBA, SPI1_NSS, I2S1_WS, SPI3_NSS, USART2_CK, CAN1_RX, USBHS_ULPI_D5, ETH_MII_TXD0, ETH_RMII_TXD0, USBHS_ID, EVENTOUT.
52 PB13 bidirectional 5V-tolerant GPIO, default PB13; alternates TIMER0_CH0_ON, SPI1_SCK, I2S1_CK, SPI3_SCK, USART2_CTS, CAN1_TX, USBHS_ULPI_D6, ETH_MII_TXD1, ETH_RMII_TXD1, EVENTOUT, I2C1_TXFRAME; additional USBHS_VBUS.
53 PB14 bidirectional 5V-tolerant GPIO, default PB14; alternates TIMER0_CH1_ON, TIMER7_CH1_ON, SPI1_MISO, I2S1_ADD_SD, USART2_RTS, TIMER11_CH0, USBHS_DM, EVENTOUT.
54 PB15 bidirectional 5V-tolerant GPIO, default PB15; alternates RTC_REFIN, TIMER0_CH2_ON, TIMER7_CH2_ON, SPI1_MOSI, I2S1_SD, TIMER11_CH1, USBHS_DP, EVENTOUT.
55 PD8 bidirectional 5V-tolerant GPIO, default PD8; alternates USART2_TX, EXMC_D13, EVENTOUT.
56 PD9 bidirectional 5V-tolerant GPIO, default PD9; alternates USART2_RX, EXMC_D14, EVENTOUT.
57 PD10 bidirectional 5V-tolerant GPIO, default PD10; alternates USART2_CK, EXMC_D15, TLI_B3, EVENTOUT.
58 PD11 bidirectional 5V-tolerant GPIO, default PD11; alternates USART2_CTS, EXMC_A16, EVENTOUT.
59 PD12 bidirectional 5V-tolerant GPIO, default PD12; alternates TIMER3_CH0, USART2_RTS, EXMC_A17, EVENTOUT.
60 PD13 bidirectional 5V-tolerant GPIO, default PD13; alternates TIMER3_CH1, EXMC_A18, EVENTOUT.
61 PD14 bidirectional 5V-tolerant GPIO, default PD14; alternates TIMER3_CH2, EXMC_D0, EVENTOUT.
62 PD15 bidirectional 5V-tolerant GPIO, default PD15; alternates TIMER3_CH3, EXMC_D1, EVENTOUT, CTC_SYNC.
63 PC6 bidirectional 5V-tolerant GPIO, default PC6; alternates TIMER2_CH0, TIMER7_CH0, I2S1_MCK, USART5_TX, SDIO_D6, DCI_D0, TLI_HSYNC, EVENTOUT.
64 PC7 bidirectional 5V-tolerant GPIO, default PC7; alternates TIMER2_CH1, TIMER7_CH1, SPI1_SCK, I2S1_CK, I2S2_MCK, USART5_RX, SDIO_D7, DCI_D1, TLI_G6, EVENTOUT.
65 PC8 bidirectional 5V-tolerant GPIO, default PC8; alternates TRACED0, TIMER2_CH2, TIMER7_CH2, USART5_CK, SDIO_D0, DCI_D2, EVENTOUT.
66 PC9 bidirectional 5V-tolerant GPIO, default PC9; alternates CK_OUT1, TIMER2_CH3, TIMER7_CH3, I2C2_SDA, I2S_CKIN, SDIO_D1, DCI_D3, EVENTOUT.
67 PA8 bidirectional 5V-tolerant GPIO, default PA8; alternates CK_OUT0, TIMER0_CH0, I2C2_SCL, USART0_CK, USBFS_SOF, SDIO_D1, TLI_R6, EVENTOUT, CTC_SYNC.
68 PA9 bidirectional 5V-tolerant GPIO, default PA9; alternates TIMER0_CH1, I2C2_SMBA, SPI1_SCK, I2S1_CK, USART0_TX, SDIO_D2, DCI_D0, EVENTOUT; additional USBFS_VBUS.
69 PA10 bidirectional 5V-tolerant GPIO, default PA10; alternates TIMER0_CH2, SPI4_MOSI, USART0_RX, USBFS_ID, DCI_D1, EVENTOUT, I2C2_TXFRAME.
70 PA11 bidirectional 5V-tolerant GPIO, default PA11; alternates TIMER0_CH3, SPI3_MISO, USART0_CTS, USART5_TX, CAN0_RX, USBFS_DM, TLI_R4, EVENTOUT.
71 PA12 bidirectional 5V-tolerant GPIO, default PA12; alternates TIMER0_ETI, SPI4_MISO, USART0_RTS, USART5_RX, CAN0_TX, USBFS_DP, TLI_R5, EVENTOUT.
72 PA13 bidirectional 5V-tolerant GPIO, default JTMS, SWDIO, PA13; alternate EVENTOUT.
73 NC unconnected No connection.
74 VSS power_in Ground pin.
75 VDD power_in Digital supply pin.
76 PA14 bidirectional 5V-tolerant GPIO, default JTCK, SWCLK, PA14; alternate EVENTOUT.
77 PA15 bidirectional 5V-tolerant GPIO, default JTDI, PA15; alternates TIMER1_CH0, TIMER1_ETI, SPI0_NSS, SPI2_NSS, I2S2_WS, USART0_TX, EVENTOUT.
78 PC10 bidirectional 5V-tolerant GPIO, default PC10; alternates SPI2_SCK, I2S2_CK, USART2_TX, UART3_TX, SDIO_D2, DCI_D8, TLI_R2, EVENTOUT.
79 PC11 bidirectional 5V-tolerant GPIO, default PC11; alternates I2S2_ADD_SD, SPI2_MISO, USART2_RX, UART3_RX, SDIO_D3, DCI_D4, EVENTOUT.
80 PC12 bidirectional 5V-tolerant GPIO, default PC12; alternates I2C1_SDA, SPI2_MOSI, I2S2_SD, USART2_CK, UART4_TX, SDIO_CK, DCI_D9, EVENTOUT.
81 PD0 bidirectional 5V-tolerant GPIO, default PD0; alternates SPI3_MISO, SPI2_MOSI, I2S2_SD, CAN0_RX, EXMC_D2, EVENTOUT.
82 PD1 bidirectional 5V-tolerant GPIO, default PD1; alternates SPI1_NSS, I2S1_WS, CAN0_TX, EXMC_D3, EVENTOUT.
83 PD2 bidirectional 5V-tolerant GPIO, default PD2; alternates TIMER2_ETI, UART4_RX, SDIO_CMD, DCI_D11, EVENTOUT.
84 PD3 bidirectional 5V-tolerant GPIO, default PD3; alternates TRACED1, SPI1_SCK, I2S1_CK, USART1_CTS, EXMC_CLK, DCI_D5, TLI_G7, EVENTOUT.
85 PD4 bidirectional 5V-tolerant GPIO, default PD4; alternates USART1_RTS, EXMC_NOE, EVENTOUT.
86 PD5 bidirectional 5V-tolerant GPIO, default PD5; alternates USART1_TX, EXMC_NWE, EVENTOUT.
87 PD6 bidirectional 5V-tolerant GPIO, default PD6; alternates SPI2_MOSI, I2S2_SD, USART1_RX, EXMC_NWAIT, DCI_D10, TLI_B2, EVENTOUT.
88 PD7 bidirectional 5V-tolerant GPIO, default PD7; alternates USART1_CK, EXMC_NE0, EXMC_NCE1, EVENTOUT.
89 PB3 bidirectional 5V-tolerant GPIO, default JTDO, PB3; alternates TRACESWO, TIMER1_CH1, SPI0_SCK, SPI2_SCK, I2S2_CK, USART0_RX, I2C1_SDA, EVENTOUT.
90 PB4 bidirectional 5V-tolerant GPIO, default JNTRST, PB4; alternates TIMER2_CH0, SPI0_MISO, SPI2_MISO, I2S2_ADD_SD, I2C2_SDA, SDIO_D0, EVENTOUT, I2C0_TXFRAME.
91 PB5 bidirectional 5V-tolerant GPIO, default PB5; alternates TIMER2_CH1, I2C0_SMBA, SPI0_MOSI, SPI2_MOSI, I2S2_SD, CAN1_RX, USBHS_ULPI_D7, ETH_PPS_OUT, EXMC_SDCKE1, DCI_D10, EVENTOUT.
92 PB6 bidirectional 5V-tolerant GPIO, default PB6; alternates TIMER3_CH0, I2C0_SCL, USART0_TX, CAN1_TX, EXMC_SDNE1, DCI_D5, EVENTOUT.
93 PB7 bidirectional 5V-tolerant GPIO, default PB7; alternates TIMER3_CH1, I2C0_SDA, USART0_RX, EXMC_NL, DCI_VSYNC, EVENTOUT.
94 BOOT0 input Boot mode selection pin, default function BOOT0 (5V tolerant).
95 PB8 bidirectional 5V-tolerant GPIO, default PB8; alternates TIMER1_CH0, TIMER1_ETI, TIMER3_CH2, TIMER9_CH0, I2C0_SCL, SPI4_MOSI, CAN0_RX, ETH_MII_TXD3, SDIO_D4, DCI_D6, TLI_B6, EVENTOUT.
96 PB9 bidirectional 5V-tolerant GPIO, default PB9; alternates TIMER1_CH1, TIMER3_CH3, TIMER10_CH0, I2C0_SDA, SPI1_NSS, I2S1_WS, CAN0_TX, SDIO_D5, DCI_D7, TLI_B7, EVENTOUT.
97 PE0 bidirectional 5V-tolerant GPIO, default PE0; alternates TIMER3_ETI, UART7_RX, EXMC_NBL0, DCI_D2, EVENTOUT.
98 PE1 bidirectional 5V-tolerant GPIO, default PE1; alternates TIMER0_CH1_ON, UART7_TX, EXMC_NBL1, DCI_D3, EVENTOUT.
99 VSS power_in Ground pin.
100 VDD power_in Digital supply pin.

Key specifications

Parameter Value
Manufacturer GigaDevice Semicon Beijing
Package LQFP-100(14x14)
Category Embedded Processors & Controllers
Pins 100

Electrical characteristics

Limits as printed in the datasheet (page.json metadata.characteristics carries them as data).

Parameter Symbol Min Typ Max Unit Conditions Page
External voltage range VDD 3.6 V VSS - 0.3 min; VSS + 3.6 max 49
External analog supply voltage VDDA 3.6 V VSSA - 0.3 min; VSSA + 3.6 max 49
External battery supply voltage VBAT 3.6 V VSS - 0.3 min; VSS + 3.6 max 49
Input voltage on other I/O VIN 4 V VSS - 0.3 min 49
Maximum current for GPIO pins IIO 25 mA 49
Operating temperature range TA -40 85 °C 49
Storage temperature range TSTG -55 150 °C 49
Maximum junction temperature TJ 125 °C 49
Supply voltage VDD 2.6 3.3 3.6 V 49
Analog supply voltage VDDA 2.6 3.3 3.6 V Same as VDD 49
Battery supply voltage VBAT 1.8 3.6 V 49
Power on reset threshold VPOR 2.3 2.4 2.48 V 52
Power down reset threshold VPDR 1.72 1.8 1.88 V 52
ESD voltage (HBM) VESD(HBM) 7000 V TA=25 °C; JESD22-A114 52
ESD voltage (CDM) VESD(CDM) 800 V TA=25 °C; JESD22-C101 52
Latch-up I-test LU -200 200 mA TA=25 °C; JESD78 52
Latch-up Vsupply over voltage LU 5.4 V TA=25 °C; JESD78 52
HXTAL frequency fHXTAL 4 8 32 MHz VDD=5.0V 53
HXTAL duty cycle DHXTAL 30 50 70 % 53
LXTAL duty cycle DLXTAL 30 50 70 % 53
IRC16M accuracy ACCIRC16M -4 5 % VDD=3.3V, TA=-40°C ~+105°C 54
IRC16M accuracy ACCIRC16M -2 2 % VDD=3.3V, TA=0°C ~ +85°C 54
IRC16M accuracy ACCIRC16M -1 1 % VDD=3.3V, TA=25°C 54
IRC16M duty cycle DIRC16M 45 50 55 % VDD=3.3V, fIRC16M=16MHz 54
IRC16M operating current IDDIRC16M 66 80 μA VDD=3.3V, fIRC16M=16MHz 54
IRC16M startup time tSUIRC16M 2.5 4 us VDD=3.3V, fIRC16M=16MHz 54
IRC48M accuracy ACCIRC48M -4 5 % VDD=3.3V, TA=-40°C ~+105°C 54
IRC48M accuracy ACCIRC48M -3 3 % VDD=3.3V, TA=0°C ~ +85°C 54
IRC48M accuracy ACCIRC48M -2 2 % VDD=3.3V, TA=25°C 54
IRC48M duty cycle DIRC48M 45 50 55 % VDD=3.3V, fIRC48M=16MHz 54
IRC48M operating current IDDIRC48M 240 300 μA VDD=3.3V, fIRC48M=16MHz 54
IRC48M startup time tSUIRC48M 2.5 4 us VDD=3.3V, fIRC48M=16MHz 54
IRC32K frequency fIRC32K 20 32 45 KHz VDD=VBAT=3.3V, TA=-40°C ~ +85°C 55
IRC32K operating current IDDIRC32K 0.4 0.6 μA VDD=VBAT=3.3V, TA=25°C 55
IRC32K startup time tSUIRC32K 110 130 μs VDD=VBAT=3.3V, TA=25°C 55
PLL input clock frequency fPLLIN 1 4 MHz 55
PLL output clock frequency fPLL 100 500 MHz 55
PLL lock time tLOCK 80 200 μs VCO freq=100MHz 55
PLL lock time tLOCK 100 300 μs VCO freq=500MHz 55
Number of program/erase cycles PECYC 100 kcycles TA=-40°C ~ +85°C 56
Data retention time tRET 20 years TA=125°C 56
Word programming time tPROG 200 400 us TA=-40°C ~ +85°C 56
Page erase time tERASE 60 100 450 ms TA=-40°C ~ +85°C 56
Mass erase time tMERASE 3.2 9.6 s TA=-40°C ~ +85°C 56
Standard IO low level input voltage VIL 1.58 V VDD=3.3V 57
Standard IO high level input voltage VIH 1.71 V VDD=3.3V 57
Low level output voltage VOL 0.16 V VDD=3.3V, IIO=8mA 57
Low level output voltage VOL 0.4 V VDD=3.3V, IIO=20mA 57
High level output voltage VOH 3.12 V VDD=3.3V, IIO=8mA 57
High level output voltage VOH 2.84 V VDD=3.3V, IIO=20mA 57
Internal pull-up resistor RPU 30 40 50 kΩ VIN=VSS 57
Internal pull-down resistor RPD 30 40 50 kΩ VIN=VDD 57
ADC operating voltage VDDA 2.6 3.3 3.6 V 58
ADC clock fADC 0.1 40 MHz 58
ADC sampling rate fS 0.007 2.6 MSPS 12-bit 58
External input impedance RAIN 52.1 kΩ See Equation 2 58
Input sampling switch resistance RADC 0.55 kΩ 58
Input sampling capacitance CADC 5.5 pF No pin/pad capacitance included 58
Sampling time ts 0.075 12 μs fADC=40MHz 58
ADC startup time tSU 1 μs 58
ADC offset error Offset 2 3 LSB fADC=15MHz, VDDA=VREFP=3.3V; printed ± 59
ADC DNL DNL 0.9 1.2 LSB fADC=15MHz, VDDA=VREFP=3.3V; printed ± 59
ADC INL INL 1.1 1.5 LSB fADC=15MHz, VDDA=VREFP=3.3V; printed ± 59
DAC operating voltage VDDA 2.6 3.3 3.6 V 60
DAC resistive load RLOAD 5 kΩ Resistive load with buffer ON 60
DAC quiescent current IDDA 500 μA Middle code on the input 60
DAC settling time TSETTLING 0.5 1 μs CLOAD≤50pF, RLOAD≥5kΩ 60
SPI SCK clock frequency fSCK 30 MHz 61
USART SCK clock frequency fSCK 36 MHz 61

CAD (KiCad official)

  • Symbol: GD32F450VKT6
  • Footprint: Package_QFP:LQFP-100_14x14mm_P0.5mm
  • 3D model: LQFP-100(14x14) (KiCad packages3D, STEP)
  • 3D model files: gd32f450vkt6-etched.step / gd32f450vkt6-etched.glb carry the MPN laser-etched on the die in a toggleable Adom.LaserEtch group (Fusion-ready); gd32f450vkt6.step / gd32f450vkt6.glb are the bare package body.

Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

  • Datasheet: GigaDevice Semicon Beijing datasheet (66 pp, sha256 915c24a1f84de32a, retrieved 2026-10-24, tier: lcsc)
  • Extractor: parts-factory 2.0.0 / extract_pins 0.3, primary claude-sonnet-5-5 (text), consensus claude-sonnet-5-5 (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
  • CAD: KiCad official libraries (CC-BY-SA 4.0).

Datasheet PDF