component
GD32F425RET6
Public Made by Adomby adom
GigaDevice Semicon Beijing Microcontrollers (MCU/MPU/SOC), LQFP-64(10x10). Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.
Generated by kicad-footprint-generator · KiCad file format 20260206
| Name | Last updated |
|---|---|
| docs | 7d ago |
| viewers | 7d ago |
| gd32f425ret6-etched.glb | 7d ago |
| gd32f425ret6-etched.step | 7d ago |
| gd32f425ret6-hero.glb | 7d ago |
| gd32f425ret6-hero.overlay.json | 7d ago |
| gd32f425ret6.glb | 7d ago |
| gd32f425ret6.kicad_mod | 7d ago |
| gd32f425ret6.kicad_sym | 7d ago |
| gd32f425ret6.lbr | 7d ago |
| gd32f425ret6.step | 7d ago |
| package.json | 7d ago |
| page.json | 7d ago |
| README.md | 7d ago |
GD32F425RET6
GigaDevice Semicon Beijing · Microcontrollers (MCU/MPU/SOC) · LQFP-64(10x10)
GD32F425RET6 from GigaDevice Semicon Beijing, in a LQFP-64(10x10). Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.
Pinout
| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | VBAT | power_in | Backup power supply pin (default function VBAT); the block diagram shows the backup domain powered by VBAT. |
| 2 | PC13-TAMPER-RTC | bidirectional | 5 V tolerant I/O with default function PC13, alternate function EVENTOUT, and additional functions RTC_TAMP0, RTC_OUT and RTC_TS. |
| 3 | PC14-OSC32IN | bidirectional | 5 V tolerant I/O with default function PC14, alternate function EVENTOUT, and additional function OSC32IN. |
| 4 | PC15-OSC32OUT | bidirectional | 5 V tolerant I/O with default function PC15, alternate function EVENTOUT, and additional function OSC32OUT. |
| 5 | PH0 | bidirectional | 5 V tolerant I/O with default function PH0/OSCIN, alternate function EVENTOUT, and additional function OSCIN. |
| 6 | PH1 | bidirectional | 5 V tolerant I/O with default function PH1/OSCOUT, alternate function EVENTOUT, and additional function OSCOUT. |
| 7 | NRST | input | Reset pin (default function NRST); its characteristics are given in section 4.11 and the recommended external circuit in Figure 4-4. |
| 8 | PC0 | bidirectional | 5 V tolerant I/O with default function PC0, alternate functions USBHS_ULPI_STP and EVENTOUT, and additional function ADC012_IN10. |
| 9 | PC1 | bidirectional | 5 V tolerant I/O with default function PC1, alternate functions SPI2_MOSI, I2S2_SD, SPI1_MOSI, I2S1_SD and EVENTOUT, and additional function ADC012_IN11. |
| 10 | PC2 | bidirectional | 5 V tolerant I/O with default function PC2, alternate functions SPI1_MISO, I2S1_ADD_SD, USBHS_ULPI_DIR and EVENTOUT, and additional function ADC012_IN12. |
| 11 | PC3 | bidirectional | 5 V tolerant I/O with default function PC3, alternate functions SPI1_MOSI, I2S1_SD, USBHS_ULPI_NXT and EVENTOUT, and additional function ADC012_IN13. |
| 12 | VSSA | power_in | Analog ground pin (default function VSSA). |
| 13 | VDDA | power_in | Analog supply pin (default function VDDA). |
| 14 | PA0-WKUP | bidirectional | 5 V tolerant I/O with default function PA0, alternate functions TIMER1_CH0, TIMER1_ETI, TIMER4_CH0, TIMER7_ETI, USART1_CTS, UART3_TX and EVENTOUT, and additional functions ADC012_IN0 and WKUP. |
| 15 | PA1 | bidirectional | 5 V tolerant I/O with default function PA1, alternate functions TIMER1_CH1, TIMER4_CH1, USART1_RTS, UART3_RX and EVENTOUT, and additional function ADC012_IN1. |
| 16 | PA2 | bidirectional | 5 V tolerant I/O with default function PA2, alternate functions TIMER1_CH2, TIMER4_CH2, TIMER8_CH0, I2S_CKIN, USART1_TX and EVENTOUT, and additional function ADC012_IN2. |
| 17 | PA3 | bidirectional | 5 V tolerant I/O with default function PA3, alternate functions TIMER1_CH3, TIMER4_CH3, TIMER8_CH1, I2S1_MCK, USART1_RX, USBHS_ULPI_D0 and EVENTOUT, and additional function ADC012_IN3. |
| 18 | VSS | power_in | Ground pin (default function VSS). |
| 19 | VDD | power_in | Digital supply pin (default function VDD). |
| 20 | PA4 | bidirectional | I/O with default function PA4 (no 5VT level is marked for this pin), alternate functions SPI0_NSS, SPI2_NSS/I2S2_WS, USART1_CK, USBHS_SOF, DCI_HSYNC and EVENTOUT, and additional functions ADC01_IN4 and DAC_OUT0. |
| 21 | PA5 | bidirectional | I/O with default function PA5 (no 5VT level is marked for this pin), alternate functions TIMER1_CH0, TIMER1_ETI, TIMER7_CH0_ON, SPI0_SCK, USBHS_ULPI_CK and EVENTOUT, and additional functions ADC01_IN5 and DAC_OUT1. |
| 22 | PA6 | bidirectional | 5 V tolerant I/O with default function PA6, alternate functions TIMER0_BRKIN, TIMER2_CH0, TIMER7_BRKIN, SPI0_MISO, I2S1_MCK, TIMER12_CH0, SDIO_CMD, DCI_PIXCLK and EVENTOUT, and additional function ADC01_IN6. |
| 23 | PA7 | bidirectional | 5 V tolerant I/O with default function PA7, alternate functions TIMER0_CH0_ON, TIMER2_CH1, TIMER7_CH0_ON, SPI0_MOSI, TIMER13_CH0 and EVENTOUT, and additional function ADC01_IN7. |
| 24 | PC4 | bidirectional | 5 V tolerant I/O with default function PC4, alternate function EVENTOUT, and additional function ADC01_IN14. |
| 25 | PC5 | bidirectional | 5 V tolerant I/O with default function PC5, alternate functions USART2_RX and EVENTOUT, and additional function ADC01_IN15. |
| 26 | PB0 | bidirectional | 5 V tolerant I/O with default function PB0, alternate functions TIMER0_CH1_ON, TIMER2_CH2, TIMER7_CH1_ON, SPI2_MOSI, I2S2_SD, USBHS_ULPI_D1, SDIO_D1 and EVENTOUT, and additional functions ADC01_IN8 and IREF. |
| 27 | PB1 | bidirectional | 5 V tolerant I/O with default function PB1, alternate functions TIMER0_CH2_ON, TIMER2_CH3, TIMER7_CH2_ON, USBHS_ULPI_D2, SDIO_D2 and EVENTOUT, and additional function ADC01_IN9. |
| 28 | PB2 | bidirectional | 5 V tolerant I/O with default functions PB2 and BOOT1, alternate functions TIMER1_CH3, SPI2_MOSI, I2S2_SD, USBHS_ULPI_D4, SDIO_CK and EVENTOUT. |
| 29 | PB10 | bidirectional | 5 V tolerant I/O with default function PB10, alternate functions TIMER1_CH2, I2C1_SCL, SPI1_SCK, I2S1_CK, I2S2_MCK, USART2_TX, USBHS_ULPI_D3, SDIO_D7 and EVENTOUT. |
| 30 | PB11 | bidirectional | 5 V tolerant I/O with default function PB11, alternate functions TIMER1_CH3, I2C1_SDA, I2S_CKIN, USART2_RX, USBHS_ULPI_D4 and EVENTOUT. |
| 31 | NC | unconnected | Not connected. |
| 32 | VDD | power_in | Digital supply pin (default function VDD). |
| 33 | PB12 | bidirectional | 5 V tolerant I/O with default function PB12, alternate functions TIMER0_BRKIN, I2C1_SMBA, SPI1_NSS, I2S1_WS, USART2_CK, CAN1_RX, USBHS_ULPI_D5, USBHS_ID and EVENTOUT. |
| 34 | PB13 | bidirectional | 5 V tolerant I/O with default function PB13, alternate functions TIMER0_CH0_ON, SPI1_SCK, I2S1_CK, USART2_CTS, CAN1_TX, USBHS_ULPI_D6, EVENTOUT and I2C1_TXFRAME, and additional function USBHS_VBUS. |
| 35 | PB14 | bidirectional | 5 V tolerant I/O with default function PB14, alternate functions TIMER0_CH1_ON, TIMER7_CH1_ON, SPI1_MISO, I2S1_ADD_SD, USART2_RTS, TIMER11_CH0, USBHS_DM and EVENTOUT. |
| 36 | PB15 | bidirectional | 5 V tolerant I/O with default function PB15, alternate functions RTC_REFIN, TIMER0_CH2_ON, TIMER7_CH2_ON, SPI1_MOSI, I2S1_SD, TIMER11_CH1, USBHS_DP and EVENTOUT. |
| 37 | PC6 | bidirectional | 5 V tolerant I/O with default function PC6, alternate functions TIMER2_CH0, TIMER7_CH0, I2S1_MCK, USART5_TX, SDIO_D6, DCI_D0 and EVENTOUT. |
| 38 | PC7 | bidirectional | 5 V tolerant I/O with default function PC7, alternate functions TIMER2_CH1, TIMER7_CH1, SPI1_SCK, I2S1_CK, I2S2_MCK, USART5_RX, SDIO_D7, DCI_D1 and EVENTOUT. |
| 39 | PC8 | bidirectional | 5 V tolerant I/O with default function PC8, alternate functions TRACED0, TIMER2_CH2, TIMER7_CH2, USART5_CK, SDIO_D0, DCI_D2 and EVENTOUT. |
| 40 | PC9 | bidirectional | 5 V tolerant I/O with default function PC9, alternate functions CK_OUT1, TIMER2_CH3, TIMER7_CH3, I2C2_SDA, I2S_CKIN, SDIO_D1, DCI_D3 and EVENTOUT. |
| 41 | PA8 | bidirectional | 5 V tolerant I/O with default function PA8, alternate functions CK_OUT0, TIMER0_CH0, I2C2_SCL, USART0_CK, USBFS_SOF, SDIO_D1, EVENTOUT and CTC_SYNC. |
| 42 | PA9 | bidirectional | 5 V tolerant I/O with default function PA9, alternate functions TIMER0_CH1, I2C2_SMBA, SPI1_SCK, I2S1_CK, USART0_TX, SDIO_D2, DCI_D0 and EVENTOUT, and additional function USBFS_VBUS. |
| 43 | PA10 | bidirectional | 5 V tolerant I/O with default function PA10, alternate functions TIMER0_CH2, I2C2_TXFRAME, USART0_RX, USBFS_ID, DCI_D1 and EVENTOUT. |
| 44 | PA11 | bidirectional | 5 V tolerant I/O with default function PA11, alternate functions TIMER0_CH3, USART0_CTS, USART5_TX, CAN0_RX, USBFS_DM and EVENTOUT. |
| 45 | PA12 | bidirectional | 5 V tolerant I/O with default function PA12, alternate functions TIMER0_ETI, USART0_RTS, USART5_RX, CAN0_TX, USBFS_DP and EVENTOUT. |
| 46 | PA13 | bidirectional | 5 V tolerant I/O with default functions JTMS, SWDIO and PA13, alternate function EVENTOUT. |
| 47 | NC | unconnected | Not connected. |
| 48 | VDD | power_in | Digital supply pin (default function VDD). |
| 49 | PA14 | bidirectional | 5 V tolerant I/O with default functions JTCK, SWCLK and PA14, alternate function EVENTOUT. |
| 50 | PA15 | bidirectional | 5 V tolerant I/O with default functions JTDI and PA15, alternate functions TIMER1_CH0, TIMER1_ETI, SPI0_NSS, SPI2_NSS/I2S2_WS, USART0_TX and EVENTOUT. |
| 51 | PC10 | bidirectional | 5 V tolerant I/O with default function PC10, alternate functions SPI2_SCK/I2S2_CK, USART2_TX, UART3_TX, SDIO_D2, DCI_D8 and EVENTOUT. |
| 52 | PC11 | bidirectional | 5 V tolerant I/O with default function PC11, alternate functions I2S2_ADD_SD, SPI2_MISO, USART2_RX, UART3_RX, SDIO_D3, DCI_D4 and EVENTOUT. |
| 53 | PC12 | bidirectional | 5 V tolerant I/O with default function PC12, alternate functions I2C1_SDA, SPI2_MOSI/I2S2_SD, USART2_CK, UART4_TX, SDIO_CK, DCI_D9 and EVENTOUT. |
| 54 | PD2 | bidirectional | 5 V tolerant I/O with default function PD2, alternate functions TIMER2_ETI, UART4_RX, SDIO_CMD, DCI_D11 and EVENTOUT. |
| 55 | PB3 | bidirectional | 5 V tolerant I/O with default functions JTDO and PB3, alternate functions TRACESWO, TIMER1_CH1, SPI0_SCK, SPI2_SCK/I2S2_CK, USART0_RX, I2C1_SDA and EVENTOUT. |
| 56 | PB4 | bidirectional | 5 V tolerant I/O with default functions NJTRST and PB4, alternate functions TIMER2_CH0, I2C0_TXFRAME, SPI0_MISO, SPI2_MISO, I2S2_ADD_SD, I2C2_SDA, SDIO_D0 and EVENTOUT. |
| 57 | PB5 | bidirectional | 5 V tolerant I/O with default function PB5, alternate functions TIMER2_CH1, I2C0_SMBA, SPI0_MOSI, SPI2_MOSI/I2S2_SD, CAN1_RX, USBHS_ULPI_D7, DCI_D10 and EVENTOUT. |
| 58 | PB6 | bidirectional | 5 V tolerant I/O with default function PB6, alternate functions TIMER3_CH0, I2C0_SCL, USART0_TX, CAN1_TX, DCI_D5 and EVENTOUT. |
| 59 | PB7 | bidirectional | 5 V tolerant I/O with default function PB7, alternate functions TIMER3_CH1, I2C0_SDA, USART0_RX, DCI_VSYNC and EVENTOUT. |
| 60 | BOOT0 | bidirectional | 5 V tolerant I/O with default function BOOT0. |
| 61 | PB8 | bidirectional | 5 V tolerant I/O with default function PB8, alternate functions TIMER1_CH0, TIMER1_ETI, TIMER3_CH2, TIMER9_CH0, I2C0_SCL, CAN0_RX, SDIO_D4, DCI_D6 and EVENTOUT. |
| 62 | PB9 | bidirectional | 5 V tolerant I/O with default function PB9, alternate functions TIMER1_CH1, TIMER3_CH3, TIMER10_CH0, I2C0_SDA, SPI1_NSS/I2S1_WS, CAN0_TX, SDIO_D5, DCI_D7 and EVENTOUT. |
| 63 | VSS | power_in | Ground pin (default function VSS). |
| 64 | VDD | power_in | Digital supply pin (default function VDD). |
Key specifications
| Parameter | Value |
|---|---|
| Manufacturer | GigaDevice Semicon Beijing |
| Package | LQFP-64(10x10) |
| Category | Embedded Processors & Controllers |
| Pins | 64 |
Electrical characteristics
Limits as printed in the datasheet (page.json metadata.characteristics carries them as data).
| Parameter | Symbol | Min | Typ | Max | Unit | Conditions | Page |
|---|---|---|---|---|---|---|---|
| External voltage range | VDD | 3.6 | V | 61 | |||
| External analog supply voltage | VDDA | 3.6 | V | 61 | |||
| External battery supply voltage | VBAT | 3.6 | V | 61 | |||
| Input voltage on other I/O | VIN | 3.6 | V | Input voltage on other I/O | 61 | ||
| Variations between different VDD power pins | /ΔVDDX/ | 50 | mV | 61 | |||
| Variations between different ground pins | /VSSX −VSS/ | 50 | mV | 61 | |||
| Maximum current for GPIO pins | IIO | 25 | mA | 61 | |||
| Operating temperature range | TA | -40 | 85 | °C | 61 | ||
| Power dissipation at TA = 85°C of LQFP64 | PD | 772 | mW | Power dissipation at TA = 85°C of LQFP64 | 61 | ||
| Storage temperature range | TSTG | -65 | 150 | °C | 61 | ||
| Maximum junction temperature | TJ | 125 | °C | 61 | |||
| Supply voltage | VDD | 2.6 | 3.3 | 3.6 | V | 61 | |
| Analog supply voltage | VDDA | 2.6 | 3.3 | 3.6 | V | Same as VDD | 61 |
| Battery supply voltage | VBAT | 1.8 | 3.6 | V | 61 | ||
| AHB clock frequency | fHCLK | 200 | MHz | 62 | |||
| APB1 clock frequency | fAPB1 | 50 | MHz | 62 | |||
| APB2 clock frequency | fAPB2 | 100 | MHz | 62 | |||
| Electrostatic discharge voltage (human body model) | VESD(HBM) | 2000 | V | TA=25 °C; JS-001-2017 | 71 | ||
| Electrostatic discharge voltage (charge device model) | VESD(CDM) | 500 | V | TA=25 °C; JS-002-2018 | 71 | ||
| Static latch-up I-test | LU | -200 | 200 | mA | TA=105 °C; JESD78 | 71 | |
| Vsupply over voltage | 5.4 | V | 71 | ||||
| Crystal or ceramic frequency | fHXTAL | 4 | 25 | 32 | MHz | 2.6 V ≤ VDD ≤ 3.6 V | 71 |
| Recommended matching capacitance on OSCIN and OSCOUT | CHXTAL | 20 | 30 | pF | 71 | ||
| Crystal or ceramic duty cycle | Ducy(HXTAL) | 30 | 50 | 70 | % | 71 | |
| External clock source or oscillator frequency | fHXTAL_ext | 1 | 50 | MHz | 2.6 V ≤ VDD ≤ 3.6 V | 72 | |
| OSCIN high or low time | tH/L(HXTAL) | 5 | ns | 72 | |||
| OSCIN rise or fall time | tR/F(HXTAL) | 10 | ns | 72 | |||
| Duty cycle | Ducy(HXTAL) | 40 | 60 | % | 72 | ||
| External clock source or oscillator frequency | fLXTAL_ext | 32.768 | 1000 | kHz | VDD = 3.3 V | 73 | |
| OSC32IN high or low time | tH/L(LXTAL) | 450 | ns | 73 | |||
| OSC32IN rise or fall time | tR/F(LXTAL) | 50 | ns | 73 | |||
| Duty cycle | Ducy(LXTAL) | 30 | 50 | 70 | % | 73 | |
| IRC16M oscillator Frequency accuracy, Factory-trimmed | ACCIRC16M | -1.73 | 1.1 | % | VDD = VDDA = 3.3 V, TA = -40 °C ~ +85 °C | 73 | |
| IRC16M oscillator Frequency accuracy, Factory-trimmed | ACCIRC16M | -1 | 1 | % | VDD = VDDA = 3.3 V, TA = 25 °C | 73 | |
| IRC48M oscillator Frequency accuracy, Factory-trimmed | ACCIRC48M | -1.31 | -0.39 | % | VDD = VDDA = 3.3 V, TA = -40 °C ~ +85 °C | 73 | |
| PLL input clock frequency | fPLLIN | 1 | 4 | MHz | 74 | ||
| PLL output clock frequency | fPLLOUT | 100 | 500 | MHz | 74 | ||
| PLL VCO output clock frequency | fVCO | 32 | 344 | MHz | 74 | ||
| PLL lock time | tLOCK | 400 | μs | 74 | |||
| Number of guaranteed program/erase cycles before failure (Endurance) | PECYC | 100 | kcycles | TA = -40 °C ~ +85 °C | 76 | ||
| Word programming time | tPROG | 37.5 | 180 | μs | TA = -40°C ~ +85 °C | 76 | |
| Mass erase time (512K) | tMERASE(512K) | 2.4 | 32 | s | TA = -40°C ~ +85 °C | 76 | |
| NRST Input low level voltage | VIL(NRST) | -0.3 | V | VDD = VDDA = 2.6 V | 76 | ||
| USBFS startup time | tSTARTUP | 1 | μs | 89 | |||
| USBFS operating voltage | VDD | 3 | 3.6 | V | 89 | ||
| Low level output voltage for an IO Pin (IO_Speed:level 3) | VOL | 0.1 | V | IIO = +8 mA; IO_Speed:level 3; VDD = 3.3 V | 77 | ||
| Low level output voltage for an IO Pin (IO_Speed:level 3) | VOL | 0.27 | V | IIO = +20 mA; IO_Speed:level 3; VDD = 3.3 V | 77 | ||
| High level output voltage for an IO Pin (IO_Speed:level 3) | VOH | 3.18 | V | IIO = +8 mA; IO_Speed:level 3; VDD = 3.3 V | 77 | ||
| High level output voltage for an IO Pin (IO_Speed:level 3) | VOH | 2.98 | V | IIO = +20 mA; IO_Speed:level 3; VDD = 3.3 V | 77 | ||
| Low level output voltage for an IO Pin (IO_Speed:level 0) | VOL | 0.15 | V | IIO = +1 mA; IO_Speed:level 0; VDD = 3.3 V | 78 | ||
| Low level output voltage for an IO Pin (IO_Speed:level 0) | VOL | 0.63 | V | IIO = +4 mA; IO_Speed:level 0; VDD = 3.3 V | 78 | ||
| High level output voltage for an IO Pin (IO_Speed:level 0) | VOH | 3.12 | V | IIO = +1 mA; IO_Speed:level 0; VDD = 3.3 V | 78 | ||
| High level output voltage for an IO Pin (IO_Speed:level 0) | VOH | 2.48 | V | IIO = +4 mA; IO_Speed:level 0; VDD = 3.3 V | 78 | ||
| Low level output voltage for an IO Pin (IO_Speed:level 1) | VOL | 0.28 | V | IIO = +8 mA; IO_Speed:level 1; VDD = 3.3 V | 78 | ||
| Low level output voltage for an IO Pin (IO_Speed:level 1) | VOL | 0.66 | V | IIO = +20 mA; IO_Speed:level 1; VDD = 3.3 V | 78 | ||
| High level output voltage for an IO Pin (IO_Speed:level 1) | VOH | 3 | V | IIO = +8 mA; IO_Speed:level 1; VDD = 3.3 V | 78 | ||
| High level output voltage for an IO Pin (IO_Speed:level 1) | VOH | 2.45 | V | IIO = +20 mA; IO_Speed:level 1; VDD = 3.3 V | 78 | ||
| Junction-to-ambient thermal resistance (LQFP64) | θJA | 51.81 | °C/W | Natural convection, 2S2P PCB | 100 | ||
| Junction-to-board thermal resistance (LQFP64) | θJB | 33.36 | °C/W | Cold plate, 2S2P PCB | 101 | ||
| Junction-to-case thermal resistance (LQFP64) | θJC | 11.25 | °C/W | Cold plate, 2S2P PCB | 101 |
CAD (KiCad official)
- Symbol:
GD32F425RET6 - Footprint:
Package_QFP:LQFP-64_10x10mm_P0.5mm - 3D model: LQFP-64(10x10) (KiCad packages3D, STEP)
- 3D model files:
gd32f425ret6-etched.step/gd32f425ret6-etched.glbcarry the MPN laser-etched on the die in a toggleableAdom.LaserEtchgroup (Fusion-ready);gd32f425ret6.step/gd32f425ret6.glbare the bare package body.
Provenance
Data extracted from the manufacturer datasheet, not a distributor listing:
- Datasheet: GigaDevice Semicon Beijing datasheet (104 pp, sha256
21eb95dfda9a015d, retrieved 2026-10-19, tier: lcsc) - Extractor: parts-factory
2.0.0/extract_pins 0.3, primaryclaude-haiku-5-5(text), consensusclaude-sonnet-5-5(agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish. - CAD: KiCad official libraries (CC-BY-SA 4.0).