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GD32F407RET6

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GigaDevice Semicon Beijing Microcontrollers (MCU/MPU/SOC), LQFP-64(10x10). Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.

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GD32F407RET6

GigaDevice Semicon Beijing · Microcontrollers (MCU/MPU/SOC) · LQFP-64(10x10)

GD32F407RET6 from GigaDevice Semicon Beijing, in a LQFP-64(10x10). Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.

Pinout

Pin Name Type Function
1 VBAT power_in Backup power supply pin (default function VBAT); the block diagram labels the backup domain as 'Powered By VBAT'.
2 PC13-TAMPER-RTC bidirectional 5 V tolerant GPIO (default PC13) with additional functions RTC_TAMP0, RTC_OUT and RTC_TS, and alternate function EVENTOUT.
3 PC14-OSC32IN bidirectional 5 V tolerant GPIO (default PC14) that also serves as the OSC32IN low-speed oscillator input, with alternate function EVENTOUT.
4 PC15-OSC32OUT bidirectional 5 V tolerant GPIO (default PC15) that also serves as the OSC32OUT low-speed oscillator output, with alternate function EVENTOUT.
5 PH0-OSC_IN bidirectional 5 V tolerant GPIO (default PH0) that also serves as the high-speed oscillator input OSCIN, with alternate function EVENTOUT.
6 PH1-OSC_OUT bidirectional 5 V tolerant GPIO (default PH1) that also serves as the high-speed oscillator output OSCOUT, with alternate function EVENTOUT.
7 NRST input Device reset pin (default function NRST); the pin table gives no further electrical limits for this pin.
8 PC0 bidirectional 5 V tolerant GPIO with ADC012_IN10 analog input; alternate functions are USBHS_ULPI_STP, EXMC_SDNWE and EVENTOUT.
9 PC1 bidirectional 5 V tolerant GPIO with ADC012_IN11 analog input; alternate functions include SPI2_MOSI/I2S2_SD, SPI1_MOSI/I2S1_SD, ETH_MDC and EVENTOUT.
10 PC2 bidirectional 5 V tolerant GPIO with ADC012_IN12 analog input; alternate functions include SPI1_MISO, I2S1_ADD_SD, USBHS_ULPI_DIR, ETH_MII_TXD2 and EXMC_SDNE0.
11 PC3 bidirectional 5 V tolerant GPIO with ADC012_IN13 analog input; alternate functions include SPI1_MOSI/I2S1_SD, USBHS_ULPI_NXT, ETH_MII_TX_CLK and EXMC_SDCKE0.
12 VSSA power_in Analog ground pin (default function VSSA).
13 VDDA power_in Analog supply pin (default function VDDA); the block diagram shows the SAR ADC and DAC powered by VDDA.
14 PA0-WKUP bidirectional 5 V tolerant GPIO with ADC012_IN0 analog input and a WKUP function; alternate functions include TIMER1_CH0, TIMER4_CH0, USART1_CTS, UART3_TX and ETH_MII_CRS.
15 PA1 bidirectional 5 V tolerant GPIO with ADC012_IN1 analog input; alternate functions include TIMER1_CH1, TIMER4_CH1, USART1_RTS, UART3_RX and ETH_RMII_REF_CLK.
16 PA2 bidirectional 5 V tolerant GPIO with ADC012_IN2 analog input; alternate functions include TIMER1_CH2, TIMER4_CH2, TIMER8_CH0, I2S_CKIN, USART1_TX and ETH_MDIO.
17 PA3 bidirectional 5 V tolerant GPIO with ADC012_IN3 analog input; alternate functions include TIMER1_CH3, TIMER4_CH3, TIMER8_CH1, I2S1_MCK, USART1_RX and USBHS_ULPI_D0.
18 VSS power_in Ground pin (default function VSS).
19 VDD power_in Digital supply pin (default function VDD); the pin table gives no numeric voltage limits for this pin.
20 PA4 bidirectional I/O with TTa level (as printed in Table 2) and ADC01_IN4 and DAC_OUT0 functions; alternate functions include SPI0_NSS, SPI2_NSS/I2S2_WS, USART1_CK, USBHS_SOF and DCI_HSYNC.
21 PA5 bidirectional I/O with TTa level (as printed in Table 2) and ADC01_IN5 and DAC_OUT1 functions; alternate functions include TIMER1_CH0/TIMER1_ETI, TIMER7_CH0_ON, SPI0_SCK and USBHS_ULPI_CK.
22 PA6 bidirectional 5 V tolerant GPIO with ADC01_IN6 analog input; alternate functions include TIMER0_BRKIN, TIMER2_CH0, SPI0_MISO, I2S1_MCK, SDIO_CMD and DCI_PIXCLK.
23 PA7 bidirectional 5 V tolerant GPIO with ADC01_IN7 analog input; alternate functions include TIMER0_CH0_ON, TIMER2_CH1, SPI0_MOSI, ETH_MII_RX_DV, ETH_RMII_CRS_DV and EXMC_SDNWE.
24 PC4 bidirectional 5 V tolerant GPIO with ADC01_IN14 analog input; alternate functions include ETH_MII_RXD0, ETH_RMII_RXD0 and EXMC_SDNE0.
25 PC5 bidirectional 5 V tolerant GPIO with ADC01_IN15 analog input; alternate functions include USART2_RX, ETH_MII_RXD1, ETH_RMII_RXD1 and EXMC_SDCKE0.
26 PB0 bidirectional 5 V tolerant GPIO with ADC01_IN8 and IREF functions; alternate functions include TIMER0_CH1_ON, TIMER2_CH2, SPI2_MOSI/I2S2_SD, USBHS_ULPI_D1, ETH_MII_RXD2 and SDIO_D1.
27 PB1 bidirectional 5 V tolerant GPIO with ADC01_IN9 analog input; alternate functions include TIMER0_CH2_ON, TIMER2_CH3, TIMER7_CH2_ON, USBHS_ULPI_D2, ETH_MII_RXD3 and SDIO_D2.
28 PB2 bidirectional 5 V tolerant GPIO whose default functions are PB2 and BOOT1; alternate functions include TIMER1_CH3, SPI2_MOSI/I2S2_SD, USBHS_ULPI_D4 and SDIO_CK.
29 PB10 bidirectional 5 V tolerant GPIO; alternate functions include TIMER1_CH2, I2C1_SCL, SPI1_SCK/I2S1_CK, I2S2_MCK, USART2_TX, USBHS_ULPI_D3, ETH_MII_RX_ER and SDIO_D7.
30 PB11 bidirectional 5 V tolerant GPIO; alternate functions include TIMER1_CH3, I2C1_SDA, I2S_CKIN, USART2_RX, USBHS_ULPI_D4 and ETH_MII_TX_EN/ETH_RMII_TX_EN.
31 NC unconnected Pin is labelled NC in the pin name column but its default function is VCORE (Table 2 type P); the datasheet gives no further limits for it.
32 VDD power_in Digital supply pin (default function VDD); the pin table gives no numeric voltage limits for this pin.
33 PB12 bidirectional 5 V tolerant GPIO; alternate functions include TIMER0_BRKIN, I2C1_SMBA, SPI1_NSS/I2S1_WS, USART2_CK, CAN1_RX, USBHS_ULPI_D5, ETH_MII_TXD0/ETH_RMII_TXD0 and USBHS_ID.
34 PB13 bidirectional 5 V tolerant GPIO with additional function USBHS_VBUS; alternate functions include TIMER0_CH0_ON, SPI1_SCK/I2S1_CK, USART2_CTS, CAN1_TX, USBHS_ULPI_D6 and ETH_MII_TXD1/ETH_RMII_TXD1.
35 PB14 bidirectional 5 V tolerant GPIO; alternate functions include TIMER0_CH1_ON, TIMER7_CH1_ON, SPI1_MISO, I2S1_ADD_SD, USART2_RTS, TIMER11_CH0 and USBHS_DM.
36 PB15 bidirectional 5 V tolerant GPIO; alternate functions include RTC_REFIN, TIMER0_CH2_ON, TIMER7_CH2_ON, SPI1_MOSI/I2S1_SD, TIMER11_CH1 and USBHS_DP.
37 PC6 bidirectional 5 V tolerant GPIO; alternate functions include TIMER2_CH0, TIMER7_CH0, I2S1_MCK, USART5_TX, SDIO_D6 and DCI_D0.
38 PC7 bidirectional 5 V tolerant GPIO; alternate functions include TIMER2_CH1, TIMER7_CH1, SPI1_SCK/I2S1_CK, I2S2_MCK, USART5_RX, SDIO_D7 and DCI_D1.
39 PC8 bidirectional 5 V tolerant GPIO; alternate functions include TRACED0, TIMER2_CH2, TIMER7_CH2, USART5_CK, SDIO_D0 and DCI_D2.
40 PC9 bidirectional 5 V tolerant GPIO; alternate functions include CK_OUT1, TIMER2_CH3, TIMER7_CH3, I2C2_SDA, I2S_CKIN, SDIO_D1 and DCI_D3.
41 PA8 bidirectional 5 V tolerant GPIO; alternate functions include CK_OUT0, TIMER0_CH0, I2C2_SCL, USART0_CK, USBFS_SOF, SDIO_D1 and CTC_SYNC.
42 PA9 bidirectional 5 V tolerant GPIO with additional function USBFS_VBUS; alternate functions include TIMER0_CH1, I2C2_SMBA, SPI1_SCK/I2S1_CK, USART0_TX, SDIO_D2 and DCI_D0.
43 PA10 bidirectional 5 V tolerant GPIO; alternate functions include TIMER0_CH2, USART0_RX, USBFS_ID, DCI_D1 and I2C2_TXFRAME.
44 PA11 bidirectional 5 V tolerant GPIO; alternate functions include TIMER0_CH3, USART0_CTS, USART5_TX, CAN0_RX and USBFS_DM.
45 PA12 bidirectional 5 V tolerant GPIO; alternate functions include TIMER0_ETI, USART0_RTS, USART5_RX, CAN0_TX and USBFS_DP.
46 PA13 bidirectional 5 V tolerant GPIO whose default functions are JTMS and SWDIO (PA13); the only listed alternate function is EVENTOUT.
47 NC unconnected Not connected on the LQFP64 package (NC in the pin table).
48 VDD power_in Digital supply pin (default function VDD); the pin table gives no numeric voltage limits for this pin.
49 PA14 bidirectional 5 V tolerant GPIO whose default functions are JTCK and SWCLK (PA14); the only listed alternate function is EVENTOUT.
50 PA15 bidirectional 5 V tolerant GPIO whose default functions are JTDI and PA15; alternate functions include TIMER1_CH0, SPI0_NSS, SPI2_NSS/I2S2_WS and USART0_TX.
51 PC10 bidirectional 5 V tolerant GPIO; alternate functions include SPI2_SCK/I2S2_CK, USART2_TX, UART3_TX, SDIO_D2 and DCI_D8.
52 PC11 bidirectional 5 V tolerant GPIO; alternate functions include I2S2_ADD_SD, SPI2_MISO, USART2_RX, UART3_RX, SDIO_D3 and DCI_D4.
53 PC12 bidirectional 5 V tolerant GPIO; alternate functions include I2C1_SDA, SPI2_MOSI/I2S2_SD, USART2_CK, UART4_TX, SDIO_CK and DCI_D9.
54 PD2 bidirectional 5 V tolerant GPIO; alternate functions include TIMER2_ETI, UART4_RX, SDIO_CMD and DCI_D11.
55 PB3 bidirectional 5 V tolerant GPIO whose default functions are JTDO and PB3; alternate functions include TRACESWO, TIMER1_CH1, SPI0_SCK, SPI2_SCK/I2S2_CK, USART0_RX and I2C1_SDA.
56 PB4 bidirectional 5 V tolerant GPIO whose default functions are NJTRST and PB4; alternate functions include TIMER2_CH0, SPI0_MISO, SPI2_MISO, I2C2_SDA and SDIO_D0.
57 PB5 bidirectional 5 V tolerant GPIO; alternate functions include TIMER2_CH1, I2C0_SMBA, SPI0_MOSI, SPI2_MOSI/I2S2_SD, CAN1_RX, USBHS_ULPI_D7, ETH_PPS_OUT and DCI_D10.
58 PB6 bidirectional 5 V tolerant GPIO; alternate functions include TIMER3_CH0, I2C0_SCL, USART0_TX, CAN1_TX, EXMC_SDNE1 and DCI_D5.
59 PB7 bidirectional 5 V tolerant GPIO; alternate functions include TIMER3_CH1, I2C0_SDA, USART0_RX, EXMC_NL and DCI_VSYNC.
60 BOOT0 input Boot pin with default function BOOT0; Table 2 lists it as a 5 V tolerant I/O and it has no alternate functions, and it selects the boot mode described in section 3.4.
61 PB8 bidirectional 5 V tolerant GPIO; alternate functions include TIMER1_CH0/TIMER1_ETI, TIMER3_CH2, TIMER9_CH0, I2C0_SCL, CAN0_RX, ETH_MII_TXD3, SDIO_D4 and DCI_D6.
62 PB9 bidirectional 5 V tolerant GPIO; alternate functions include TIMER1_CH1, TIMER3_CH3, TIMER10_CH0, I2C0_SDA, SPI1_NSS/I2S1_WS, CAN0_TX and SDIO_D5.
63 VSS power_in Ground pin (default function VSS).
64 VDD power_in Digital supply pin (default function VDD); the pin table gives no numeric voltage limits for this pin.

Key specifications

Parameter Value
Manufacturer GigaDevice Semicon Beijing
Package LQFP-64(10x10)
Category Embedded Processors & Controllers
Pins 64

Electrical characteristics

Limits as printed in the datasheet (page.json metadata.characteristics carries them as data).

Parameter Symbol Min Typ Max Unit Conditions Page
External voltage range (VDD) VDD -0.3 3.6 V 52
External analog supply voltage (VDDA) VDDA -0.3 3.6 V 52
External battery supply voltage (VBAT) VBAT -0.3 3.6 V 52
Input voltage on 5V tolerant pin VIN -0.3 4 V 52
Input voltage on other I/O VIN -0.3 4 V 52
Maximum current for GPIO pins IIO 25 mA 52
Operating temperature range TA -40 85 °C 52
Storage temperature range TSTG -55 150 °C 52
Maximum junction temperature TJ 125 °C 52
Supply voltage VDD 2.6 3.3 3.6 V 52
Analog supply voltage VDDA 2.6 3.3 3.6 V Same as VDD 52
Battery supply voltage VBAT 1.8 3.6 V 52
Power on reset threshold VPOR 2.3 2.4 2.48 V 55
Power down reset threshold VPDR 1.72 1.8 1.88 V 55
Electrostatic discharge voltage (human body model) VESD(HBM) 7000 V TA=25 °C; JESD22-A114 55
Static latch-up I-test LU I-test -200 200 mA TA=25 °C; JESD78 55
High Speed External oscillator (HXTAL) frequency fHXTAL 4 8 32 MHz VDD=5.0V 56
Recommended load capacitance on OSC_IN and OSC_OUT CHXTAL 20 30 pF 56
HXTAL oscillator duty cycle DHXTAL 30 50 70 % 56
Recommended load capacitance on OSC32_IN and OSC32_OUT CLXTAL 15 pF 56
LXTAL oscillator duty cycle DLXTAL 30 50 70 % 56
IRC16M oscillator Frequency accuracy, Factory-trimmed ACCIRC16M -4 5 % VDD=3.3V, TA=-40°C ~+105°C 57
IRC16M oscillator Frequency accuracy, Factory-trimmed ACCIRC16M -2 2 % VDD=3.3V, TA=0°C ~ +85°C 57
IRC16M oscillator Frequency accuracy, Factory-trimmed ACCIRC16M -1 1 % VDD=3.3V, TA=25°C 57
IRC16M oscillator duty cycle DIRC16M 45 50 55 % VDD=3.3V, fIRC16M=16MHz 57
IRC48M oscillator Frequency accuracy, Factory-trimmed ACCIRC48M -4 5 % VDD=3.3V, TA=-40°C ~+105°C 57
IRC48M oscillator Frequency accuracy, Factory-trimmed ACCIRC48M -3 3 % VDD=3.3V, TA=0°C ~ +85°C 57
IRC48M oscillator Frequency accuracy, Factory-trimmed ACCIRC48M -2 2 % VDD=3.3V, TA=25°C 57
IRC48M oscillator duty cycle DIRC48M 45 50 55 % VDD=3.3V, fIRC48M=16MHz 57
Low Speed Internal oscillator (IRC32K) frequency fIRC32K 20 32 45 KHz VDD=VBAT=3.3V, TA=-40°C ~ +85°C 58
PLL input clock frequency fPLLIN 1 4 MHz 58
PLL output clock frequency fPLL 100 500 MHz 58
Modulation frequency FMOD 10 KHz 58
Peak modulation amplitude Mdamp 2 % 58
Number of guaranteed program /erase cycles before failure (Endurance) PECYC 100 kcycles TA=-40°C ~ +85°C 59
Data retention time tRET 20 years TA=125°C 59
Word programming time tPROG 200 400 us TA=-40°C ~ +85°C 59
Page erase time tERASE 60 100 450 ms TA=-40°C ~ +85°C 59
High Voltage tolerant IO Low level input voltage VIL 1.27 V VDD=2.6V 60
High Voltage tolerant IO Low level input voltage VIL 1.58 V VDD=3.3V 60
High Voltage tolerant IO Low level input voltage VIL 1.71 V VDD=3.6V 60
High Voltage tolerant IO High level input voltage VIH 1.4 V VDD=2.6V 60
High Voltage tolerant IO High level input voltage VIH 1.71 V VDD=3.3V 60
High Voltage tolerant IO High level input voltage VIH 1.84 V VDD=3.6V 60
Low level output voltage VOL 0.17 V VDD=2.6V, IIO=8mA 60
Low level output voltage VOL 0.16 V VDD=3.3V, IIO=8mA 60
Low level output voltage VOL 0.46 V VDD=2.6V, IIO=20mA 60
Low level output voltage VOL 0.4 V VDD=3.3V, IIO=20mA 60
High level output voltage VOH 2.39 V VDD=2.6V, IIO=8mA 60
High level output voltage VOH 3.12 V VDD=3.3V, IIO=8mA 60
High level output voltage VOH 3.41 V VDD=3.6V, IIO=8mA 60
High level output voltage VOH 2.05 V VDD=2.6V, IIO=20mA 60
High level output voltage VOH 2.84 V VDD=3.3V, IIO=20mA 60
Internal pull-up resistor RPU 30 40 50 kΩ VIN=VSS 60
Internal pull-down resistor RPD 30 40 50 kΩ VIN=VDD 60
Electrostatic discharge voltage (charge device model) VESD(CDM) 800 V TA=25 °C; JESD22-C101 55
Vsupply over voltage 5.4 V 55

CAD (KiCad official)

  • Symbol: GD32F407RET6
  • Footprint: Package_QFP:LQFP-64_10x10mm_P0.5mm
  • 3D model: LQFP-64(10x10) (KiCad packages3D, STEP)
  • 3D model files: gd32f407ret6-etched.step / gd32f407ret6-etched.glb carry the MPN laser-etched on the die in a toggleable Adom.LaserEtch group (Fusion-ready); gd32f407ret6.step / gd32f407ret6.glb are the bare package body.

Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

  • Datasheet: GigaDevice Semicon Beijing datasheet (69 pp, sha256 d97becb856f2c5c3, retrieved 2026-10-20, tier: lcsc)
  • Extractor: parts-factory 2.0.0 / extract_pins 0.3, primary claude-haiku-5-5 (text), consensus claude-sonnet-5-5 (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
  • CAD: KiCad official libraries (CC-BY-SA 4.0).

Datasheet PDF