component

GD32F405RET6

Public Made by Adom

by adom

GigaDevice Semicon Beijing Microcontrollers (MCU/MPU/SOC), LQFP-64(10x10). Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.

componentembedded processors & controllersgd32f405ret6factory-2.0.0extractor-text
Overview Files Discover Packages Releases Dependencies Issues Breadcrumbs Pull Requests Activity
main
Download ZIP Propose a change
Generated by kicad-footprint-generator · KiCad file format 20260206
Name Last commit message Last updated
docs Publish 0.1.0 · Ray 7d ago
viewers gd32f405ret6: viewers · Ray 7d ago
gd32f405ret6-etched.glb Publish 0.1.0 · Ray 7d ago
gd32f405ret6-etched.step gd32f405ret6: factory component page (tier=lcsc) · Ray 7d ago
gd32f405ret6-hero.glb gd32f405ret6: hero GLB from the etched model (keeps the MPN mark) · Ray 7d ago
gd32f405ret6-hero.overlay.json Publish 0.1.0 · Ray 7d ago
gd32f405ret6.glb Publish 0.1.0 · Ray 7d ago
gd32f405ret6.kicad_mod Publish 0.1.0 · Ray 7d ago
gd32f405ret6.kicad_sym Publish 0.1.0 · Ray 7d ago
gd32f405ret6.lbr Publish 0.1.0 · Ray 7d ago
gd32f405ret6.step Publish 0.1.0 · Ray 7d ago
package.json Publish 0.1.0 · Ray 7d ago
page.json Set visibility: public · Ray 7d ago
README.md Publish 0.1.0 · Ray 7d ago

GD32F405RET6

GigaDevice Semicon Beijing · Microcontrollers (MCU/MPU/SOC) · LQFP-64(10x10)

GD32F405RET6 from GigaDevice Semicon Beijing, in a LQFP-64(10x10). Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.

Pinout

Pin Name Type Function
1 VBAT power_in Backup power supply pin (Default: VBAT); the block diagram shows the backup domain powered by VBAT.
2 PC13-TAMPER-RTC bidirectional 5 V tolerant I/O (Default: PC13) with additional RTC_TAMP0, RTC_OUT and RTC_TS functions and alternate function EVENTOUT.
3 PC14-OSC32IN bidirectional 5 V tolerant I/O (Default: PC14) that also serves as the OSC32IN low-speed oscillator input.
4 PC15-OSC32OUT bidirectional 5 V tolerant I/O (Default: PC15) that also serves as the OSC32OUT low-speed oscillator output.
5 PH0 bidirectional 5 V tolerant I/O (Default: PH0) that also serves as OSCIN, the high-speed crystal input (HXTAL 4-32 MHz).
6 PH1 bidirectional 5 V tolerant I/O (Default: PH1) that also serves as OSCOUT, the high-speed crystal output (HXTAL 4-32 MHz).
7 NRST input Reset pin (Default: NRST); the datasheet does not state its electrical level or I/O direction beyond this.
8 PC0 bidirectional 5 V tolerant I/O (Default: PC0) with alternate USBHS_ULPI_STP and EVENTOUT, and additional ADC012_IN10 analog input.
9 PC1 bidirectional 5 V tolerant I/O (Default: PC1) with alternate SPI2_MOSI, I2S2_SD, SPI1_MOSI, I2S1_SD and EVENTOUT, and additional ADC012_IN11 analog input.
10 PC2 bidirectional 5 V tolerant I/O (Default: PC2) with alternate SPI1_MISO, I2S1_ADD_SD, USBHS_ULPI_DIR and EVENTOUT, and additional ADC012_IN12 analog input.
11 PC3 bidirectional 5 V tolerant I/O (Default: PC3) with alternate SPI1_MOSI, I2S1_SD, USBHS_ULPI_NXT and EVENTOUT, and additional ADC012_IN13 analog input.
12 VSSA power_in Analog ground pin (Default: VSSA).
13 VDDA power_in Analog supply pin (Default: VDDA); the block diagram shows the SAR ADC and DAC powered by VDDA.
14 PA0-WKUP bidirectional 5 V tolerant I/O (Default: PA0) with additional ADC012_IN0 analog input and WKUP function, alternates including TIMER1_CH0, TIMER4_CH0, USART1_CTS and UART3_TX.
15 PA1 bidirectional 5 V tolerant I/O (Default: PA1) with alternate TIMER1_CH1, TIMER4_CH1, USART1_RTS, UART3_RX and EVENTOUT, and additional ADC012_IN1 analog input.
16 PA2 bidirectional 5 V tolerant I/O (Default: PA2) with alternate TIMER1_CH2, TIMER4_CH2, TIMER8_CH0, I2S_CKIN and USART1_TX, and additional ADC012_IN2 analog input.
17 PA3 bidirectional 5 V tolerant I/O (Default: PA3) with alternate TIMER1_CH3, TIMER4_CH3, TIMER8_CH1, I2S1_MCK, USART1_RX and USBHS_ULPI_D0, and additional ADC012_IN3 analog input.
18 VSS power_in Ground pin (Default: VSS).
19 VDD power_in Digital supply pin (Default: VDD); the device operates from a 2.6 to 3.6 V power supply.
20 PA4 bidirectional I/O with level listed as TTa rather than 5VT (Default: PA4) with alternate SPI0_NSS, SPI2_NSS, I2S2_WS, USART1_CK, USBHS_SOF and DCI_HSYNC, and additional ADC01_IN4 and DAC_OUT0.
21 PA5 bidirectional I/O with level listed as TTa rather than 5VT (Default: PA5) with alternate TIMER1_CH0, TIMER7_CH0_ON, SPI0_SCK and USBHS_ULPI_CK, and additional ADC01_IN5 and DAC_OUT1.
22 PA6 bidirectional 5 V tolerant I/O (Default: PA6) with alternate TIMER0_BRKIN, TIMER2_CH0, SPI0_MISO, I2S1_MCK, SDIO_CMD and DCI_PIXCLK, and additional ADC01_IN6 analog input.
23 PA7 bidirectional 5 V tolerant I/O (Default: PA7) with alternate TIMER0_CH0_ON, TIMER2_CH1, TIMER7_CH0_ON, SPI0_MOSI and TIMER13_CH0, and additional ADC01_IN7 analog input.
24 PC4 bidirectional 5 V tolerant I/O (Default: PC4) with alternate EVENTOUT and additional ADC01_IN14 analog input.
25 PC5 bidirectional 5 V tolerant I/O (Default: PC5) with alternate USART2_RX and EVENTOUT, and additional ADC01_IN15 analog input.
26 PB0 bidirectional 5 V tolerant I/O (Default: PB0) with alternate TIMER0_CH1_ON, TIMER2_CH2, SPI2_MOSI, I2S2_SD, USBHS_ULPI_D1 and SDIO_D1, and additional ADC01_IN8 and IREF.
27 PB1 bidirectional 5 V tolerant I/O (Default: PB1) with alternate TIMER0_CH2_ON, TIMER2_CH3, TIMER7_CH2_ON, USBHS_ULPI_D2 and SDIO_D2, and additional ADC01_IN9 analog input.
28 PB2 bidirectional 5 V tolerant I/O (Default: PB2, BOOT1) with alternate TIMER1_CH3, SPI2_MOSI, I2S2_SD, USBHS_ULPI_D4 and SDIO_CK.
29 PB10 bidirectional 5 V tolerant I/O (Default: PB10) with alternate TIMER1_CH2, I2C1_SCL, SPI1_SCK, I2S1_CK, I2S2_MCK, USART2_TX, USBHS_ULPI_D3 and SDIO_D7.
30 PB11 bidirectional 5 V tolerant I/O (Default: PB11) with alternate TIMER1_CH3, I2C1_SDA, I2S_CKIN, USART2_RX and USBHS_ULPI_D4.
31 NC unconnected Pin printed as NC in the pin definition table with default function VCORE and type P; the datasheet gives no voltage or limit for it.
32 VDD power_in Digital supply pin (Default: VDD); the device operates from a 2.6 to 3.6 V power supply.
33 PB12 bidirectional 5 V tolerant I/O (Default: PB12) with alternate TIMER0_BRKIN, I2C1_SMBA, SPI1_NSS, I2S1_WS, USART2_CK, CAN1_RX, USBHS_ULPI_D5, USBHS_ID and EVENTOUT.
34 PB13 bidirectional 5 V tolerant I/O (Default: PB13) with alternate TIMER0_CH0_ON, SPI1_SCK, I2S1_CK, USART2_CTS, CAN1_TX and USBHS_ULPI_D6, and additional USBHS_VBUS function.
35 PB14 bidirectional 5 V tolerant I/O (Default: PB14) with alternate TIMER0_CH1_ON, TIMER7_CH1_ON, SPI1_MISO, I2S1_ADD_SD, USART2_RTS, TIMER11_CH0 and USBHS_DM.
36 PB15 bidirectional 5 V tolerant I/O (Default: PB15) with alternate RTC_REFIN, TIMER0_CH2_ON, TIMER7_CH2_ON, SPI1_MOSI, I2S1_SD, TIMER11_CH1 and USBHS_DP.
37 PC6 bidirectional 5 V tolerant I/O (Default: PC6) with alternate TIMER2_CH0, TIMER7_CH0, I2S1_MCK, USART5_TX, SDIO_D6 and DCI_D0.
38 PC7 bidirectional 5 V tolerant I/O (Default: PC7) with alternate TIMER2_CH1, TIMER7_CH1, SPI1_SCK, I2S1_CK, I2S2_MCK, USART5_RX, SDIO_D7 and DCI_D1.
39 PC8 bidirectional 5 V tolerant I/O (Default: PC8) with alternate TRACED0, TIMER2_CH2, TIMER7_CH2, USART5_CK, SDIO_D0 and DCI_D2.
40 PC9 bidirectional 5 V tolerant I/O (Default: PC9) with alternate CK_OUT1, TIMER2_CH3, TIMER7_CH3, I2C2_SDA, I2S_CKIN, SDIO_D1 and DCI_D3.
41 PA8 bidirectional 5 V tolerant I/O (Default: PA8) with alternate CK_OUT0, TIMER0_CH0, I2C2_SCL, USART0_CK, CTC_SYNC, USBFS_SOF and SDIO_D1.
42 PA9 bidirectional 5 V tolerant I/O (Default: PA9) with alternate TIMER0_CH1, I2C2_SMBA, SPI1_SCK, I2S1_CK, USART0_TX, SDIO_D2 and DCI_D0, and additional USBFS_VBUS function.
43 PA10 bidirectional 5 V tolerant I/O (Default: PA10) with alternate TIMER0_CH2, I2C2_TXFRAME, USART0_RX, USBFS_ID and DCI_D1.
44 PA11 bidirectional 5 V tolerant I/O (Default: PA11) with alternate TIMER0_CH3, USART0_CTS, USART5_TX, CAN0_RX and USBFS_DM.
45 PA12 bidirectional 5 V tolerant I/O (Default: PA12) with alternate TIMER0_ETI, USART0_RTS, USART5_RX, CAN0_TX and USBFS_DP.
46 PA13 bidirectional 5 V tolerant I/O with default function JTMS/SWDIO (Default: JTMS, SWDIO, PA13) and alternate EVENTOUT.
47 NC unconnected Not connected (NC) on the LQFP64 package; the table gives no function for this pin.
48 VDD power_in Digital supply pin (Default: VDD); the device operates from a 2.6 to 3.6 V power supply.
49 PA14 bidirectional 5 V tolerant I/O with default function JTCK/SWCLK (Default: JTCK, SWCLK, PA14) and alternate EVENTOUT.
50 PA15 bidirectional 5 V tolerant I/O with default function JTDI (Default: JTDI, PA15) and alternates TIMER1_CH0, TIMER1_ETI, SPI0_NSS, SPI2_NSS, I2S2_WS and USART0_TX.
51 PC10 bidirectional 5 V tolerant I/O (Default: PC10) with alternate SPI2_SCK, I2S2_CK, USART2_TX, UART3_TX, SDIO_D2 and DCI_D8.
52 PC11 bidirectional 5 V tolerant I/O (Default: PC11) with alternate I2S2_ADD_SD, SPI2_MISO, USART2_RX, UART3_RX, SDIO_D3 and DCI_D4.
53 PC12 bidirectional 5 V tolerant I/O (Default: PC12) with alternate I2C1_SDA, SPI2_MOSI, I2S2_SD, USART2_CK, UART4_TX, SDIO_CK and DCI_D9.
54 PD2 bidirectional 5 V tolerant I/O (Default: PD2) with alternate TIMER2_ETI, UART4_RX, SDIO_CMD and DCI_D11.
55 PB3 bidirectional 5 V tolerant I/O with default function JTDO (Default: JTDO, PB3) with alternate TRACESWO, TIMER1_CH1, SPI0_SCK, SPI2_SCK, I2S2_CK, USART0_RX and I2C1_SDA.
56 PB4 bidirectional 5 V tolerant I/O with default function NJTRST (Default: NJTRST, PB4) with alternate TIMER2_CH0, SPI0_MISO, SPI2_MISO, I2S2_ADD_SD, I2C2_SDA and SDIO_D0.
57 PB5 bidirectional 5 V tolerant I/O (Default: PB5) with alternate TIMER2_CH1, I2C0_SMBA, SPI0_MOSI, SPI2_MOSI, I2S2_SD, CAN1_RX, USBHS_ULPI_D7, ETH_PPS_OUT and DCI_D10.
58 PB6 bidirectional 5 V tolerant I/O (Default: PB6) with alternate TIMER3_CH0, I2C0_SCL, USART0_TX, CAN1_TX and DCI_D5.
59 PB7 bidirectional 5 V tolerant I/O (Default: PB7) with alternate TIMER3_CH1, I2C0_SDA, USART0_RX and DCI_VSYNC.
60 BOOT0 bidirectional 5 V tolerant I/O (Default: BOOT0) with no alternate function listed in the pin table.
61 PB8 bidirectional 5 V tolerant I/O (Default: PB8) with alternate TIMER1_CH0, TIMER1_ETI, TIMER3_CH2, TIMER9_CH0, I2C0_SCL, CAN0_RX, SDIO_D4 and DCI_D6.
62 PB9 bidirectional 5 V tolerant I/O (Default: PB9) with alternate TIMER1_CH1, TIMER3_CH3, TIMER10_CH0, I2C0_SDA, SPI1_NSS, I2S1_WS, CAN0_TX, SDIO_D5 and DCI_D7.
63 VSS power_in Ground pin (Default: VSS).
64 VDD power_in Digital supply pin (Default: VDD); the device operates from a 2.6 to 3.6 V power supply.

Key specifications

Parameter Value
Manufacturer GigaDevice Semicon Beijing
Package LQFP-64(10x10)
Category Embedded Processors & Controllers
Pins 64

Electrical characteristics

Limits as printed in the datasheet (page.json metadata.characteristics carries them as data).

Parameter Symbol Min Typ Max Unit Conditions Page
Maximum current for GPIO pins IIO 25 mA 43
Input voltage on other I/O VIN 4 V 43
Operating temperature range TA -40 85 °C 43
Storage temperature range TSTG -55 150 °C 43
Maximum junction temperature TJ 125 °C 43
Supply voltage VDD 2.6 3.3 3.6 V 43
Analog supply voltage VDDA 2.6 3.3 3.6 V Same as VDD 43
Battery supply voltage VBAT 1.8 3.6 V 43
Power on reset threshold VPOR 2.3 2.4 2.48 V 46
Power down reset threshold VPDR 1.72 1.8 1.88 V 46
Electrostatic discharge voltage (human body model) VESD(HBM) 7000 V TA=25 °C; JESD22-A114 46
Electrostatic discharge voltage (charge device model) VESD(CDM) 800 V TA=25 °C; JESD22-C101 46
Static latch-up I-test LU I-test -200 200 mA TA=25 °C; JESD78 46
Vsupply over voltage 5.4 V 46
High Speed External oscillator (HXTAL) frequency fHXTAL 4 8 32 MHz VDD=5.0V 47
Recommended load capacitance on OSC_IN and OSC_OUT CHXTAL 20 30 pF 47
HXTAL oscillator duty cycle DHXTAL 30 50 70 % 47
Recommended load capacitance on OSC32_IN and OSC32_OUT CLXTAL 15 pF 47
LXTAL oscillator duty cycle DLXTAL 30 50 70 % 47
IRC16M oscillator frequency accuracy, factory-trimmed ACCIRC16M -4 5 % VDD=3.3V, TA=-40°C ~+105°C 48
IRC16M oscillator frequency accuracy, factory-trimmed ACCIRC16M -2 2 % VDD=3.3V, TA=0°C ~ +85°C 48
IRC16M oscillator frequency accuracy, factory-trimmed ACCIRC16M -1 1 % VDD=3.3V, TA=25°C 48
IRC16M oscillator operating current IDDIRC16M 66 80 μA VDD=3.3V, fIRC16M=16MHz 48
IRC16M oscillator startup time tSUIRC16M 2.5 4 us VDD=3.3V, fIRC16M=16MHz 48
IRC48M oscillator frequency accuracy, factory-trimmed ACCIRC48M -4 5 % VDD=3.3V, TA=-40°C ~+105°C 48
IRC48M oscillator frequency accuracy, factory-trimmed ACCIRC48M -3 3 % VDD=3.3V, TA=0°C ~ +85°C 48
IRC48M oscillator frequency accuracy, factory-trimmed ACCIRC48M -2 2 % VDD=3.3V, TA=25°C 48
IRC48M oscillator operating current IDDIRC48M 240 300 μA VDD=3.3V, fIRC48M=16MHz 48
IRC48M oscillator startup time tSUIRC48M 2.5 4 us VDD=3.3V, fIRC48M=16MHz 48
Low Speed Internal oscillator (IRC32K) frequency fIRC32K 20 32 45 KHz VDD=VBAT=3.3V, TA=-40°C ~ +85°C 49
IRC32K oscillator operating current IDDIRC32K 0.4 0.6 μA VDD=VBAT=3.3V, TA=25°C 49
IRC32K oscillator startup time tSUIRC32K 110 130 μs VDD=VBAT=3.3V, TA=25°C 49
PLL input clock frequency fPLLIN 1 4 MHz 49
PLL output clock frequency fPLL 100 500 MHz 49
PLL lock time tLOCK 80 168 μs VCO freq=100MHz 49
PLL lock time tLOCK 100 300 μs VCO freq=500MHz 49
Modulation frequency (SSCG) FMOD 10 KHz 49
Peak modulation amplitude (SSCG) Mdamp 2 % 49
Number of guaranteed program/erase cycles before failure (endurance) PECYC 100 kcycles TA=-40°C ~ +85°C 50
Data retention time tRET 20 years TA=125°C 50
Word programming time tPROG 200 400 us TA=-40°C ~ +85°C 50
Page erase time tERASE 60 100 450 ms TA=-40°C ~ +85°C 50
Mass erase time tMERASE 3.2 9.6 s TA=-40°C ~ +85°C 50
Standard IO low level input voltage VIL 1.27 V VDD=2.6V 51
Standard IO low level input voltage VIL 1.58 V VDD=3.3V 51
Standard IO low level input voltage VIL 1.71 V VDD=3.6V 51
Standard IO high level input voltage VIH 1.4 V VDD=2.6V 51
Standard IO high level input voltage VIH 1.71 V VDD=3.3V 51
Standard IO high level input voltage VIH 1.84 V VDD=3.6V 51
Low level output voltage VOL 0.16 V VDD=3.3V, IIO=8mA 51
Low level output voltage VOL 0.4 V VDD=3.3V, IIO=20mA 51
High level output voltage VOH 3.12 V VDD=3.3V, IIO=8mA 51
High level output voltage VOH 2.84 V VDD=3.3V, IIO=20mA 51
Internal pull-up resistor RPU 30 40 50 kΩ VIN=VSS 51
Internal pull-down resistor RPD 30 40 50 kΩ VIN=VDD 51
ADC ADC clock fADC 0.1 40 MHz 52
SCK clock frequency (SPI) fSCK 30 MHz 55
SCK clock frequency (USART) fSCK 36 MHz 55
SCL clock frequency fSCL 0 100 KHz Standard mode 55
SCL clock frequency fSCL 0 400 KHz Fast mode 55

CAD (KiCad official)

  • Symbol: GD32F405RET6
  • Footprint: Package_QFP:LQFP-64_10x10mm_P0.5mm
  • 3D model: LQFP-64(10x10) (KiCad packages3D, STEP)
  • 3D model files: gd32f405ret6-etched.step / gd32f405ret6-etched.glb carry the MPN laser-etched on the die in a toggleable Adom.LaserEtch group (Fusion-ready); gd32f405ret6.step / gd32f405ret6.glb are the bare package body.

Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

  • Datasheet: GigaDevice Semicon Beijing datasheet (60 pp, sha256 b2de30485fb26059, retrieved 2026-10-18, tier: lcsc)
  • Extractor: parts-factory 2.0.0 / extract_pins 0.3, primary claude-haiku-5-5 (text), consensus claude-sonnet-5-5 (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
  • CAD: KiCad official libraries (CC-BY-SA 4.0).

Datasheet PDF