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GD32F330R8T6

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GigaDevice Semicon Beijing Microcontrollers (MCU/MPU/SOC), LQFP-64(10x10). Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.

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Contents

README

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GD32F330R8T6

GigaDevice Semicon Beijing · Microcontrollers (MCU/MPU/SOC) · LQFP-64(10x10)

GD32F330R8T6 from GigaDevice Semicon Beijing, in a LQFP-64(10x10). Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.

Pinout

Pin Name Type Function
1 VBAT power_in Power supply pin, default function VBAT.
2 PC13-TAMPER-RTC bidirectional I/O with default function PC13 and additional functions RTC_TAMP0, RTC_TS, RTC_OUT and WKUP1.
3 PC14-OSC32IN bidirectional I/O with default function PC14 and additional function OSC32IN.
4 PC15-OSC32OUT bidirectional I/O with default function PC15 and additional function OSC32OUT.
5 PF0-OSCIN bidirectional 5 V tolerant I/O with default function PF0, alternate function CTC_SYNC and additional function OSCIN.
6 PF1-OSCOUT bidirectional 5 V tolerant I/O with default function PF1 and additional function OSCOUT.
7 NRST bidirectional Reset pin, default function NRST, listed as I/O in the datasheet.
8 PC0 bidirectional I/O with default function PC0, alternate function EVENTOUT and additional function ADC_IN10.
9 PC1 bidirectional I/O with default function PC1, alternate function EVENTOUT and additional function ADC_IN11.
10 PC2 bidirectional I/O with default function PC2, alternate function EVENTOUT and additional function ADC_IN12.
11 PC3 bidirectional I/O with default function PC3, alternate function EVENTOUT and additional function ADC_IN13.
12 VSSA power_in Analog ground pin, default function VSSA.
13 VDDA power_in Analog power pin, default function VDDA.
14 PA0-WKUP bidirectional I/O with default function PA0, alternate functions USART1_CTS, TIMER1_CH0, TIMER1_ETI and I2C1_SCL, and additional functions ADC_IN0, RTC_TAMP1 and WKUP0.
15 PA1 bidirectional I/O with default function PA1, alternate functions USART1_RTS, TIMER1_CH1, I2C1_SDA and EVENTOUT, and additional function ADC_IN1.
16 PA2 bidirectional I/O with default function PA2, alternate functions USART1_TX, TIMER1_CH2 and TIMER14_CH0, and additional function ADC_IN2.
17 PA3 bidirectional I/O with default function PA3, alternate functions USART1_RX, TIMER1_CH3 and TIMER14_CH1, and additional function ADC_IN3.
18 PF4 bidirectional 5 V tolerant I/O with default function PF4 and alternate function EVENTOUT.
19 PF5 bidirectional 5 V tolerant I/O with default function PF5 and alternate function EVENTOUT.
20 PA4 bidirectional I/O with default function PA4, alternate functions SPI0_NSS, USART1_CK, TIMER13_CH0 and SPI1_NSS, and additional function ADC_IN4.
21 PA5 bidirectional I/O with default function PA5, alternate functions SPI0_SCK, TIMER1_CH0 and TIMER1_ETI, and additional function ADC_IN5.
22 PA6 bidirectional I/O with default function PA6, alternate functions SPI0_MISO, TIMER2_CH0, TIMER0_BKIN, TIMER15_CH0 and EVENTOUT, and additional function ADC_IN6.
23 PA7 bidirectional I/O with default function PA7, alternate functions SPI0_MOSI, TIMER2_CH1, TIMER13_CH0, TIMER0_CH0_ON, TIMER16_CH0 and EVENTOUT, and additional function ADC_IN7.
24 PC4 bidirectional I/O with default function PC4, alternate function EVENTOUT and additional function ADC_IN14.
25 PC5 bidirectional I/O with default function PC5 and additional functions ADC_IN15 and WKUP4.
26 PB0 bidirectional I/O with default function PB0, alternate functions TIMER2_CH2, TIMER0_CH1_ON, USART1_RX and EVENTOUT, and additional function ADC_IN8.
27 PB1 bidirectional I/O with default function PB1, alternate functions TIMER2_CH3, TIMER13_CH0, TIMER0_CH2_ON and SPI1_SCK, and additional function ADC_IN9.
28 PB2 bidirectional 5 V tolerant I/O with default function PB2 and no alternate function listed.
29 PB10 bidirectional 5 V tolerant I/O with default function PB10 and alternate functions I2C1_SCL, TIMER1_CH2 and SPI1_IO2.
30 PB11 bidirectional 5 V tolerant I/O with default function PB11 and alternate functions I2C1_SDA, TIMER1_CH3, EVENTOUT and SPI1_IO3.
31 VSS power_in Ground pin, default function VSS.
32 VDD power_in Power pin, default function VDD.
33 PB12 bidirectional 5 V tolerant I/O with default function PB12 and alternate functions SPI1_NSS, TIMER0_BKIN, I2C1_SMBA and EVENTOUT.
34 PB13 bidirectional 5 V tolerant I/O with default function PB13 and alternate functions SPI1_SCK and TIMER0_CH0_ON.
35 PB14 bidirectional 5 V tolerant I/O with default function PB14 and alternate functions SPI1_MISO, TIMER0_CH1_ON and TIMER14_CH0.
36 PB15 bidirectional 5 V tolerant I/O with default function PB15, alternate functions SPI1_MOSI, TIMER0_CH2_ON, TIMER14_CH0_ON and TIMER14_CH1, and additional functions RTC_REFIN and WKUP6.
37 PC6 bidirectional 5 V tolerant I/O with default function PC6 and alternate function TIMER2_CH0.
38 PC7 bidirectional 5 V tolerant I/O with default function PC7 and alternate function TIMER2_CH1.
39 PC8 bidirectional 5 V tolerant I/O with default function PC8 and alternate function TIMER2_CH2.
40 PC9 bidirectional 5 V tolerant I/O with default function PC9 and alternate function TIMER2_CH3.
41 PA8 bidirectional 5 V tolerant I/O with default function PA8 and alternate functions USART0_CK, TIMER0_CH0, CK_OUT, USART1_TX, EVENTOUT and CTC_SYNC.
42 PA9 bidirectional 5 V tolerant I/O with default function PA9 and alternate functions USART0_TX, TIMER0_CH1, TIMER14_BKIN and I2C0_SCL.
43 PA10 bidirectional 5 V tolerant I/O with default function PA10 and alternate functions USART0_RX, TIMER0_CH2, TIMER16_BKIN and I2C0_SDA.
44 PA11 bidirectional 5 V tolerant I/O with default function PA11 and alternate functions USART0_CTS, TIMER0_CH3, EVENTOUT and SPI1_IO2.
45 PA12 bidirectional 5 V tolerant I/O with default function PA12 and alternate functions USART0_RTS, TIMER0_ETI, EVENTOUT and SPI1_IO3.
46 PA13 bidirectional 5 V tolerant I/O with default function PA13 and alternate functions IFRP_OUT, SWDIO and SPI1_MISO.
47 PF6 bidirectional 5 V tolerant I/O with default function PF6 and alternate function I2C1_SCL.
48 PF7 bidirectional 5 V tolerant I/O with default function PF7 and alternate function I2C1_SDA.
49 PA14 bidirectional 5 V tolerant I/O with default function PA14 and alternate functions USART1_TX, SWCLK and SPI1_MOSI.
50 PA15 bidirectional 5 V tolerant I/O with default function PA15 and alternate functions SPI0_NSS, USART1_RX, TIMER1_CH0, TIMER1_ETI, SPI1_NSS and EVENTOUT.
51 PC10 bidirectional 5 V tolerant I/O with default function PC10 and no alternate function listed.
52 PC11 bidirectional 5 V tolerant I/O with default function PC11 and no alternate function listed.
53 PC12 bidirectional 5 V tolerant I/O with default function PC12 and no alternate function listed.
54 PD2 bidirectional 5 V tolerant I/O with default function PD2 and alternate function TIMER2_ETI.
55 PB3 bidirectional 5 V tolerant I/O with default function PB3 and alternate functions SPI0_SCK, TIMER1_CH1 and EVENTOUT.
56 PB4 bidirectional 5 V tolerant I/O with default function PB4 and alternate functions SPI0_MISO, TIMER2_CH0 and EVENTOUT.
57 PB5 bidirectional 5 V tolerant I/O with default function PB5, alternate functions SPI0_MOSI, I2C0_SMBA, TIMER15_BKIN and TIMER2_CH1, and additional function WKUP5.
58 PB6 bidirectional 5 V tolerant I/O with default function PB6 and alternate functions I2C0_SCL, USART0_TX and TIMER15_CH0_ON.
59 PB7 bidirectional 5 V tolerant I/O with default function PB7 and alternate functions I2C0_SDA, USART0_RX and TIMER16_CH0_ON.
60 BOOT0 input Boot mode selection input, default function BOOT0.
61 PB8 bidirectional 5 V tolerant I/O with default function PB8 and alternate functions I2C0_SCL and TIMER15_CH0.
62 PB9 bidirectional 5 V tolerant I/O with default function PB9 and alternate functions I2C0_SDA, IFRP_OUT, TIMER16_CH0 and EVENTOUT.
63 VSS power_in Ground pin, default function VSS.
64 VDD power_in Power pin, default function VDD.

Key specifications

Parameter Value
Manufacturer GigaDevice Semicon Beijing
Package LQFP-64(10x10)
Category Embedded Processors & Controllers
Pins 64

Electrical characteristics

Limits as printed in the datasheet (page.json metadata.characteristics carries them as data).

Parameter Symbol Min Typ Max Unit Conditions Page
External voltage range (VDD, referenced to VSS) VDD 3.6 V Referenced to VSS; printed min is VSS - 0.3 V (not numeric) 40
External analog supply voltage (VDDA, referenced to VSSA) VDDA 3.6 V Referenced to VSSA; printed min is VSSA - 0.3 V (not numeric) 40
External battery supply voltage (VBAT, referenced to VSS) VBAT 3.6 V Referenced to VSS; printed min is VSS - 0.3 V (not numeric) 40
Input voltage on 5V tolerant pin (referenced to VDD) VIN 3.6 V 5V tolerant pin, referenced to VDD; VIN maximum value cannot exceed 6.5 V (note 3) 40
Input voltage on other I/O (referenced to VSS) VIN 3.6 V Other I/O; printed min is VSS - 0.3 V (not numeric) 40
Variations between different VDD power pins /ΔVDDx/ 50 mV 40
Variations between different ground pins /VSSX − VSS/ 50 mV 40
Maximum current for GPIO pin IIO -25 25 mA 40
Operating temperature range TA -40 85 °C 40
Storage temperature range TSTG -55 150 °C 40
Maximum junction temperature TJ 125 °C 40
Supply voltage VDD 2.6 3.3 3.6 V 40
Analog supply voltage VDDA 2.6 3.3 3.6 V Same as VDD 40
Battery supply voltage VBAT 1.8 3.6 V 40
AHB1 clock frequency fHCLK1 0 84 MHz 41
AHB2 clock frequency fHCLK2 0 84 MHz 41
APB1 clock frequency fAPB1 0 42 MHz 41
APB2 clock frequency fAPB2 0 42 MHz 41
VDD rise time rate tVDD 0 μs/V Printed max is ∞ (not numeric) 41
VDD fall time rate tVDD 20 μs/V Printed max is ∞ (not numeric) 41
Low Voltage Detector threshold (LVDT=000, rising edge) VLVD 2.08 2.14 2.19 V LVDT[2:0] = 000, rising edge 49
Low Voltage Detector threshold (LVDT=000, falling edge) VLVD 1.99 2.03 2.08 V LVDT[2:0] = 000, falling edge 49
Low Voltage Detector threshold (LVDT=001, rising edge) VLVD 2.22 2.28 2.33 V LVDT[2:0] = 001, rising edge 49
Low Voltage Detector threshold (LVDT=001, falling edge) VLVD 2.13 2.17 2.22 V LVDT[2:0] = 001, falling edge 49
Low Voltage Detector threshold (LVDT=010, rising edge) VLVD 2.36 2.42 2.47 V LVDT[2:0] = 010, rising edge 49
Low Voltage Detector threshold (LVDT=010, falling edge) VLVD 2.26 2.32 2.37 V LVDT[2:0] = 010, falling edge 49
Low Voltage Detector threshold (LVDT=011, rising edge) VLVD 2.49 2.55 2.62 V LVDT[2:0] = 011, rising edge 49
Low Voltage Detector threshold (LVDT=011, falling edge) VLVD 2.39 2.45 2.52 V LVDT[2:0] = 011, falling edge 49
Low Voltage Detector threshold (LVDT=100, rising edge) VLVD 2.63 2.69 2.76 V LVDT[2:0] = 100, rising edge 49
Low Voltage Detector threshold (LVDT=100, falling edge) VLVD 2.53 2.59 2.66 V LVDT[2:0] = 100, falling edge 49
Low Voltage Detector threshold (LVDT=101, rising edge) VLVD 2.76 2.83 2.9 V LVDT[2:0] = 101, rising edge 49
Low Voltage Detector threshold (LVDT=101, falling edge) VLVD 2.66 2.73 2.79 V LVDT[2:0] = 101, falling edge 49
Low Voltage Detector threshold (LVDT=110, rising edge) VLVD 2.9 2.97 3.04 V LVDT[2:0] = 110, rising edge 49
Low Voltage Detector threshold (LVDT=110, falling edge) VLVD 2.8 2.87 2.93 V LVDT[2:0] = 110, falling edge 49
Low Voltage Detector threshold (LVDT=111, rising edge) VLVD 3.03 3.11 3.19 V LVDT[2:0] = 111, rising edge 49
Low Voltage Detector threshold (LVDT=111, falling edge) VLVD 2.94 3.01 3.07 V LVDT[2:0] = 111, falling edge 49
Low level output voltage for 8 IO pins VOL 0.21 V Each IIO = +8 mA, VDD = 2.6 V 55
Low level output voltage for 8 IO pins VOL 0.19 V Each IIO = +8 mA, VDD = 3.3 V 55
Low level output voltage for 8 IO pins VOL 0.18 V Each IIO = +8 mA, VDD = 3.6 V 55
Low level output voltage for 8 IO pins VOL 0.54 V Each IIO = +20 mA, VDD = 2.6 V 55
Low level output voltage for 8 IO pins VOL 0.47 V Each IIO = +20 mA, VDD = 3.3 V 55
Low level output voltage for 8 IO pins VOL 0.45 V Each IIO = +20 mA, VDD = 3.6 V 55
High level output voltage for 8 IO pins VOH 2.4 V Each IIO = +8 mA, VDD = 2.6 V 55
High level output voltage for 8 IO pins VOH 3.1 V Each IIO = +8 mA, VDD = 3.3 V 55
High level output voltage for 8 IO pins VOH 3.4 V Each IIO = +8 mA, VDD = 3.6 V 55
High level output voltage for 8 IO pins VOH 1.95 V Each IIO = +20 mA, VDD = 2.6 V 55
High level output voltage for 8 IO pins VOH 2.73 V Each IIO = +20 mA, VDD = 3.3 V 55
High level output voltage for 8 IO pins VOH 3.07 V Each IIO = +20 mA, VDD = 3.6 V 55
Internal pull-up resistor (all pins) RPU 30 40 50 kΩ All pins, VIN = VSS 56
Internal pull-down resistor (all pins) RPD 30 40 50 kΩ All pins, VIN = VDD 56
Internal pull-up resistor (PA10) RPU 7.5 10 13.5 kΩ PA10 56
Internal pull-down resistor (PA10) RPD 7.5 10 13.5 kΩ PA10 56
NRST input low level voltage VIL(NRST) -0.5 V 2.6 V ≤ VDD = VDDA ≤ 3.6 V; printed max is 0.3 VDD (not numeric) 54
ADC operating voltage VDDA 2.6 3.3 3.6 V 56
ADC clock frequency fADC 0.1 40 MHz 57
Crystal or ceramic frequency (HXTAL) fHXTAL 4 8 32 MHz 2.6 V ≤ VDD ≤ 3.6 V 50
PLL input clock frequency fPLLIN 1 25 MHz 53
PLL output clock frequency fPLLOUT 16 84 MHz 53
PLL VCO output clock frequency fVCO 84 MHz 53

CAD (KiCad official)

  • Symbol: GD32F330R8T6
  • Footprint: Package_QFP:LQFP-64_10x10mm_P0.5mm
  • 3D model: LQFP-64(10x10) (KiCad packages3D, STEP)
  • 3D model files: gd32f330r8t6-etched.step / gd32f330r8t6-etched.glb carry the MPN laser-etched on the die in a toggleable Adom.LaserEtch group (Fusion-ready); gd32f330r8t6.step / gd32f330r8t6.glb are the bare package body.

Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

  • Datasheet: GigaDevice Semicon Beijing datasheet (70 pp, sha256 fadbe247a0494e9d, retrieved 2026-10-19, tier: lcsc)
  • Extractor: parts-factory 2.0.0 / extract_pins 0.3, primary claude-haiku-5-5 (text), consensus claude-sonnet-5-5 (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
  • CAD: KiCad official libraries (CC-BY-SA 4.0).

Datasheet PDF