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GD32F330F8P6TR

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GigaDevice Semicon Beijing Microcontroller Units (MCUs/MPUs/SOCs), TSSOP-20. Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.

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3D Model

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Symbol & Footprint

Schematic Symbol

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Datasheet

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Contents

README

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GD32F330F8P6TR

GigaDevice Semicon Beijing · Microcontroller Units (MCUs/MPUs/SOCs) · TSSOP-20

GD32F330F8P6TR from GigaDevice Semicon Beijing, in a TSSOP-20. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.

Pinout

Pin Name Type Function
1 BOOT0 input Boot mode selection input (default function BOOT0).
2 PF0-OSCIN bidirectional 5 V tolerant I/O, default PF0, alternate CTC_SYNC, additional function OSCIN (HXTAL crystal input).
3 PF1-OSCOUT bidirectional 5 V tolerant I/O, default PF1, additional function OSCOUT (HXTAL crystal output).
4 NRST bidirectional External reset pin, default function NRST.
5 VDDA power_in Analog power supply, default function VDDA.
6 PA0-WKUP bidirectional I/O, default PA0; alternate USART0_CTS/USART1_CTS, TIMER1_CH0, TIMER1_ETI, I2C1_SCL; additional ADC_IN0, RTC_TAMP1, WKUP0.
7 PA1 bidirectional I/O, default PA1; alternate USART0_RTS/USART1_RTS, TIMER1_CH1, I2C1_SDA, EVENTOUT; additional ADC_IN1.
8 PA2 bidirectional I/O, default PA2; alternate USART0_TX/USART1_TX, TIMER1_CH2, TIMER14_CH0; additional ADC_IN2.
9 PA3 bidirectional I/O, default PA3; alternate USART0_RX/USART1_RX, TIMER1_CH3, TIMER14_CH1; additional ADC_IN3.
10 PA4 bidirectional I/O, default PA4; alternate SPI0_NSS, USART0_CK/USART1_CK, TIMER13_CH0, SPI1_NSS; additional ADC_IN4.
11 PA5 bidirectional I/O, default PA5; alternate SPI0_SCK, TIMER1_CH0, TIMER1_ETI; additional ADC_IN5.
12 PA6 bidirectional I/O, default PA6; alternate SPI0_MISO, TIMER2_CH0, TIMER0_BKIN, TIMER15_CH0, EVENTOUT; additional ADC_IN6.
13 PA7 bidirectional I/O, default PA7; alternate SPI0_MOSI, TIMER2_CH1, TIMER13_CH0, TIMER0_CH0_ON, TIMER16_CH0, EVENTOUT; additional ADC_IN7.
14 PB1 bidirectional I/O, default PB1; alternate TIMER2_CH3, TIMER13_CH0, TIMER0_CH2_ON, SPI1_SCK; additional ADC_IN9.
15 VSS power_in Ground, default function VSS.
16 VDD power_in Digital power supply, default function VDD.
17 PA9 bidirectional 5 V tolerant I/O, default PA9; alternate USART0_TX, TIMER0_CH1, TIMER14_BKIN, I2C0_SCL.
18 PA10 bidirectional 5 V tolerant I/O, default PA10; alternate USART0_RX, TIMER0_CH2, TIMER16_BKIN, I2C0_SDA.
19 PA13 bidirectional 5 V tolerant I/O, default PA13; alternate IFRP_OUT, SWDIO, SPI1_MISO.
20 PA14 bidirectional 5 V tolerant I/O, default PA14; alternate USART0_TX/USART1_TX, SWCLK, SPI1_MOSI.

Key specifications

Parameter Value
Manufacturer GigaDevice Semicon Beijing
Package TSSOP-20
Category Embedded Processors & Controllers
Pins 20

Electrical characteristics

Limits as printed in the datasheet (page.json metadata.characteristics carries them as data).

Parameter Symbol Min Typ Max Unit Conditions Page
External voltage range VDD -0.3 3.6 V Printed VSS - 0.3 to VSS + 3.6 31
External analog supply voltage VDDA -0.3 3.6 V Printed VSSA - 0.3 to VSSA + 3.6 31
External battery supply voltage VBAT -0.3 3.6 V Printed VSS - 0.3 to VSS + 3.6 31
Input voltage on 5V tolerant pin VIN -0.3 4 V Printed VSS - 0.3 to VDD + 4.0 31
Input voltage on other I/O VIN -0.3 4 V Printed VSS - 0.3 to 4.0 31
Variations between different VDD power pins /ΔVDDx/ 50 mV 31
Variations between different ground pins /VSSX −VSS/ 50 mV 31
Maximum current for GPIO pins IIO 25 mA 31
Operating temperature range TA -40 85 °C 31
Storage temperature range TSTG -55 150 °C 31
Maximum junction temperature TJ 125 °C 31
Supply voltage VDD 2.6 3.3 3.6 V 31
Analog supply voltage VDDA 2.6 3.3 3.6 V Same as VDD 31
Battery supply voltage VBAT 1.8 3.6 V 31
Power on reset threshold VPOR 2.3 2.4 2.48 V 33
Power down reset threshold VPDR 1.72 1.8 1.88 V 33
PDR hysteresis VHYST 0.6 V 33
Reset temporization TRSTTEMP 2 ms 33
Electrostatic discharge voltage (human body model) VESD(HBM) 7000 V TA=25 °C; JESD22-A114 34
Electrostatic discharge voltage (charge device model) VESD(CDM) 2000 V TA=25 °C; JESD22-C101 34
Static latch-up I-test LU -200 200 mA TA=25 °C; JESD78 34
Static latch-up Vsupply over voltage LU 5.4 V TA=25 °C; JESD78 34
HXTAL frequency fHXTAL 4 8 32 MHz VDD=3.3V 35
HXTAL recommended load capacitance CHXTAL 20 30 pF 35
HXTAL oscillator duty cycle DHXTAL 30 50 70 % 35
LXTAL recommended load capacitance CLXTAL 15 pF 35
LXTAL oscillator duty cycle DLXTAL 30 50 70 % 35
IRC8M accuracy, factory-trimmed ACCIRC8M -4 5 % VDD=3.3V, TA=-40°C ~+105°C 35
IRC8M accuracy, factory-trimmed ACCIRC8M -2 2 % VDD=3.3V, TA=0°C ~ +85°C 35
IRC8M accuracy, factory-trimmed ACCIRC8M -1 1 % VDD=3.3V, TA=25°C 35
IRC8M oscillator duty cycle DIRC8M 45 50 55 % VDD=3.3V, fIRC8M=8MHz 35
IRC8M oscillator operating current IDDIRC8M 66 80 μA VDD=3.3V, fIRC8M=8MHz 35
IRC8M oscillator startup time tSUIRC8M 1.8 2.5 us VDD=3.3V, fIRC8M=8MHz 36
IRC48M accuracy, factory-trimmed ACCIRC48M -4 5 % VDD=3.3V, TA=-40°C ~+105°C 36
IRC48M accuracy, factory-trimmed ACCIRC48M -3 3 % VDD=3.3V, TA=0°C ~ +85°C 36
IRC48M accuracy, factory-trimmed ACCIRC48M -2 2 % VDD=3.3V, TA=25°C 36
IRC40K frequency fIRC40K 20 40 45 KHz VDD=VBAT=3.3V, TA=-40°C ~ +85°C 36
PLL input clock frequency fPLLIN 1 25 MHz 37
PLL output clock frequency fPLLOUT 16 84 MHz 37
PLL lock time tLOCK 300 μs 37
Flash program/erase endurance PECYC 100 kcycles TA=-40°C ~ +85°C 37
Data retention time tRET 20 years TA=125°C 37
Word programming time tPROG 200 400 us TA=-40°C ~ +85°C 37
Page erase time tERASE 60 100 450 ms TA=-40°C ~ +85°C 37
Mass erase time tMERASE 3.2 9.6 s TA=-40°C ~ +85°C 37
Standard IO low level input voltage VIL 1.31 V VDD=3.3V 38
Standard IO high level input voltage VIH 1.99 V VDD=3.3V 38
Low level output voltage VOL 0.19 V VDD=3.3V, IIO=8mA 38
High level output voltage VOH 3.1 V VDD=3.3V, IIO=8mA 38
Internal pull-up resistor RPU 30 40 50 kΩ All pins VIN=VSS 38
Internal pull-down resistor RPD 30 40 50 kΩ All pins VIN=VDD 38
ADC operating voltage VDDA 2.6 3.3 3.6 V 39
ADC clock fADC 0.1 40 MHz 39
ADC external input impedance RAIN 32.9 kΩ See Equation 2 39
ADC integral linearity error INL 1.1 1.5 LSB fADC=14MHz, VDDA=VREFP=3.3V 40
SPI SCK clock frequency fSCK 30 MHz 41
USART SCK clock frequency fSCK 84 MHz 41
I2C SCL clock frequency (fast mode) fSCL 0 1000 KHz Fast mode 41

CAD (KiCad official)

  • Symbol: GD32F330F8P6TR
  • Footprint: Package_SO:TSSOP-20_4.4x6.5mm_P0.65mm
  • 3D model: TSSOP-20 (KiCad packages3D, STEP)
  • 3D model files: gd32f330f8p6tr-etched.step / gd32f330f8p6tr-etched.glb carry the MPN laser-etched on the die in a toggleable Adom.LaserEtch group (Fusion-ready); gd32f330f8p6tr.step / gd32f330f8p6tr.glb are the bare package body.

Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

  • Datasheet: GigaDevice Semicon Beijing datasheet (48 pp, sha256 461bf875e081b33e, retrieved 2026-10-22, tier: lcsc)
  • Extractor: parts-factory 2.0.0 / extract_pins 0.3, primary claude-sonnet-5-5 (text), consensus claude-sonnet-5-5 (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
  • CAD: KiCad official libraries (CC-BY-SA 4.0).

Datasheet PDF