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GD32F310F8P6TR

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GigaDevice Semicon Beijing Microcontrollers (MCU/MPU/SOC), TSSOP-20. Pinout extracted from the datasheet, KiCad symbol/footprint/3D.

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Datasheet

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Contents

README

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GD32F310F8P6TR

GigaDevice Semicon Beijing · Microcontrollers (MCU/MPU/SOC) · TSSOP-20

GD32F310F8P6TR from GigaDevice Semicon Beijing, in a TSSOP-20. Pinout and pin descriptions extracted from the manufacturer datasheet by ds2sf; symbol, footprint, and 3D from KiCad-official CAD.

Pinout

Pin Name Type Function
1 BOOT0 input Boot-mode selection input. Sampled with BOOT1 (in option bytes) at the rising edge of NRST to select main flash, system memory (bootloader), or SRAM as the boot source.
2 PF0-OSCIN bidirectional Port F bit 0 GPIO, 5 V tolerant. Alternate function CTC_SYNC (clock trim controller sync input); can also serve as HXTAL crystal input (OSCIN) when the external oscillator is enabled.
3 PF1-OSCOUT bidirectional Port F bit 1 GPIO, 5 V tolerant. Additional function OSCOUT (HXTAL crystal output) when the external oscillator is enabled.
4 NRST bidirectional Active-low device reset. Bidirectional pin: internal reset sources drive it low, and an external pull-down asserts a system reset. Internal weak pull-up is present; external RC to VDD recommended.
5 VDDA power_in Analog power supply for the ADC, reset block, PLL, and internal oscillators. Must be tied to VDD (2.6-3.6 V) with proper decoupling; VSSA is shared with VSS in this package.
6 PA0-WKUP bidirectional Port A bit 0 GPIO. Muxed alternates: USART1_CTS, I2C1_SCL. Additional analog/system functions: ADC_IN0, RTC_TAMP1, WKUP0 (deep-sleep wake-up).
7 PA1 bidirectional Port A bit 1 GPIO. Muxed alternates: USART1_RTS, I2C1_SDA, EVENTOUT. Additional analog: ADC_IN1.
8 PA2 bidirectional Port A bit 2 GPIO. Muxed alternates: USART1_TX, TIMER14_CH0. Additional analog: ADC_IN2.
9 PA3 bidirectional Port A bit 3 GPIO. Muxed alternates: USART1_RX, TIMER14_CH1. Additional analog: ADC_IN3.
10 PA4 bidirectional Port A bit 4 GPIO. Muxed alternates: SPI0_NSS, I2S0_WS, USART1_CK, TIMER13_CH0, SPI1_NSS. Additional analog: ADC_IN4.
11 PA5 bidirectional Port A bit 5 GPIO. Muxed alternates: SPI0_SCK, I2S0_CK. Additional analog: ADC_IN5.
12 PA6 bidirectional Port A bit 6 GPIO. Muxed alternates: SPI0_MISO, I2S0_MCK, TIMER2_CH0, TIMER0_BKIN, TIMER15_CH0, EVENTOUT. Additional analog: ADC_IN6.
13 PA7 bidirectional Port A bit 7 GPIO. Muxed alternates: SPI0_MOSI, I2S0_SD, TIMER2_CH1, TIMER13_CH0, TIMER0_CH0_ON, TIMER16_CH0, EVENTOUT. Additional analog: ADC_IN7.
14 PB1 bidirectional Port B bit 1 GPIO. Muxed alternates: TIMER2_CH3, TIMER13_CH0, TIMER0_CH2_ON, SPI1_SCK. Additional analog: ADC_IN9.
15 VSS power_in Device ground reference, 0 V. Also serves as VSSA analog ground on this TSSOP-20 package.
16 VDD power_in Main digital supply, 2.6-3.6 V. Feeds internal 1.2 V LDO for the core. Decouple with 100 nF close to the pin plus a bulk 4.7 uF on the VDD/VDDA rail.
17 PA9 bidirectional Port A bit 9 GPIO, 5 V tolerant. Muxed alternates: USART0_TX, TIMER0_CH1, TIMER14_BKIN, I2C0_SCL.
18 PA10 bidirectional Port A bit 10 GPIO, 5 V tolerant. Muxed alternates: USART0_RX, TIMER0_CH2, TIMER16_BKIN, I2C0_SDA.
19 PA13 bidirectional Port A bit 13 GPIO, 5 V tolerant. Serial Wire Debug data line (SWDIO) after reset. Muxed alternates: IFRP_OUT (IR modulation output), SPI1_MISO.
20 PA14 bidirectional Port A bit 14 GPIO, 5 V tolerant. Serial Wire Debug clock (SWCLK) after reset. Muxed alternates: USART1_TX, SPI1_MOSI.

Key specifications

Parameter Value
Manufacturer GigaDevice Semicon Beijing
Package TSSOP-20
Category MCU
Pins 20

Ordering variants

Same part, different packaging or reel option.

  • GD32F310F8P6TRF4P6
  • GD32F310F8P6TRF6P6
  • GD32F310F8P6TR
  • GD32F310F8P6TRG8U6
  • GD32F310F8P6TRK6T6
  • GD32F310F8P6TRK8T6
  • GD32F310F8P6TRK8U6
  • GD32F310F8P6TRC8T6

CAD (KiCad official)

  • Symbol: GD32F310F8P6TR
  • Footprint: Package_SO:TSSOP-20_4.4x6.5mm_P0.65mm
  • 3D model: TSSOP-20 (KiCad packages3D, STEP)
  • 3D model files: gd32f310f8p6tr-etched.step / gd32f310f8p6tr-etched.glb carry the MPN laser-etched on the die in a toggleable Adom.LaserEtch group (Fusion-ready); gd32f310f8p6tr.step / gd32f310f8p6tr.glb are the bare package body.

Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

  • Datasheet: GigaDevice Semicon Beijing datasheet (78 pp, sha256 bd7f1b34d0ebdf35, retrieved 2026-08-17, tier: lcsc)
  • Extractor: ds2sf (Claude). Every pin and dimension is cited to a datasheet page; it refuses to fabricate.
  • CAD: KiCad official libraries (CC-BY-SA 4.0).

Datasheet PDF