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GD32F307VET6

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GigaDevice Semicon Beijing Microcontroller Units (MCUs/MPUs/SOCs), LQFP-100(14x14). Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.

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Contents

README

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GD32F307VET6

GigaDevice Semicon Beijing · Microcontroller Units (MCUs/MPUs/SOCs) · LQFP-100(14x14)

GD32F307VET6 from GigaDevice Semicon Beijing, in a LQFP-100(14x14). Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.

Pinout

Pin Name Type Function
1 PE2 bidirectional 5 V tolerant I/O, default PE2; alternates TRACECK and EXMC_A23.
2 PE3 bidirectional 5 V tolerant I/O, default PE3; alternates TRACED0 and EXMC_A19.
3 PE4 bidirectional 5 V tolerant I/O, default PE4; alternates TRACED1 and EXMC_A20.
4 PE5 bidirectional 5 V tolerant I/O, default PE5; alternates TRACED2 and EXMC_A21, remap TIMER8_CH0.
5 PE6 bidirectional 5 V tolerant I/O, default PE6; alternates TRACED3 and EXMC_A22, remap TIMER8_CH1.
6 VBAT power_in Backup power supply pin for the RTC and backup domain.
7 PC13-TAMPER-RTC bidirectional I/O, default PC13; alternate TAMPER-RTC function.
8 PC14-OSC32IN bidirectional I/O, default PC14; alternate OSC32IN low-speed crystal input.
9 PC15-OSC32OUT bidirectional I/O, default PC15; alternate OSC32OUT low-speed crystal output.
10 VSS_5 power_in Digital ground pin VSS_5.
11 VDD_5 power_in Digital supply pin VDD_5.
12 OSCIN input High-speed crystal oscillator input; remappable to PD0.
13 OSCOUT output High-speed crystal oscillator output; remappable to PD1.
14 NRST bidirectional Active-low reset pin, default NRST.
15 PC0 bidirectional I/O, default PC0; alternate ADC01_IN10 analog input.
16 PC1 bidirectional I/O, default PC1; alternates ADC01_IN11 and ENET_MDC.
17 PC2 bidirectional I/O, default PC2; alternates ADC01_IN12 and ENET_MII_TXD2.
18 PC3 bidirectional I/O, default PC3; alternates ADC01_IN13 and ENET_MII_TX_CLK.
19 VSSA power_in Analog ground pin for the ADC and analog circuitry.
20 VREF- power_in ADC reference voltage negative pin.
21 VREF+ power_in ADC reference voltage positive pin.
22 VDDA power_in Analog supply pin for the ADC, DAC and analog circuitry.
23 PA0-WKUP bidirectional I/O, default PA0; alternates WKUP wakeup input, USART1_CTS, ADC01_IN0 and timer functions.
24 PA1 bidirectional I/O, default PA1; alternates USART1_RTS, ADC01_IN1 and TIMER1/TIMER4 channels.
25 PA2 bidirectional I/O, default PA2; alternates USART1_TX, ADC01_IN2 and ENET_MDIO.
26 PA3 bidirectional I/O, default PA3; alternates USART1_RX, ADC01_IN3 and SPI0_IO3.
27 VSS_4 power_in Digital ground pin VSS_4.
28 VDD_4 power_in Digital supply pin VDD_4.
29 PA4 bidirectional I/O, default PA4; alternates SPI0_NSS, USART1_CK, ADC01_IN4 and DAC_OUT0.
30 PA5 bidirectional I/O, default PA5; alternates SPI0_SCK, ADC01_IN5 and DAC_OUT1.
31 PA6 bidirectional I/O, default PA6; alternates SPI0_MISO, ADC01_IN6 and TIMER2_CH0.
32 PA7 bidirectional I/O, default PA7; alternates SPI0_MOSI, ADC01_IN7 and ENET_MII_RX_DV.
33 PC4 bidirectional I/O, default PC4; alternates ADC01_IN14 and ENET_MII_RXD0.
34 PC5 bidirectional I/O, default PC5; alternates ADC01_IN15 and ENET_MII_RXD1.
35 PB0 bidirectional I/O, default PB0; alternates ADC01_IN8, TIMER2_CH2 and ENET_MII_RXD2.
36 PB1 bidirectional I/O, default PB1; alternates ADC01_IN9, TIMER2_CH3 and ENET_MII_RXD3.
37 PB2 bidirectional 5 V tolerant I/O, default PB2 and BOOT1.
38 PE7 bidirectional 5 V tolerant I/O, default PE7; alternate EXMC_D4, remap TIMER0_ETI.
39 PE8 bidirectional 5 V tolerant I/O, default PE8; alternate EXMC_D5, remap TIMER0_CH0_ON.
40 PE9 bidirectional 5 V tolerant I/O, default PE9; alternate EXMC_D6, remap TIMER0_CH0.
41 PE10 bidirectional 5 V tolerant I/O, default PE10; alternate EXMC_D7, remap TIMER0_CH1_ON.
42 PE11 bidirectional 5 V tolerant I/O, default PE11; alternate EXMC_D8, remap TIMER0_CH1.
43 PE12 bidirectional 5 V tolerant I/O, default PE12; alternate EXMC_D9, remap TIMER0_CH2_ON.
44 PE13 bidirectional 5 V tolerant I/O, default PE13; alternate EXMC_D10, remap TIMER0_CH2.
45 PE14 bidirectional 5 V tolerant I/O, default PE14; alternate EXMC_D11, remap TIMER0_CH3.
46 PE15 bidirectional 5 V tolerant I/O, default PE15; alternate EXMC_D12, remap TIMER0_BRKIN.
47 PB10 bidirectional 5 V tolerant I/O, default PB10; alternates I2C1_SCL, USART2_TX and ENET_MII_RX_ER.
48 PB11 bidirectional 5 V tolerant I/O, default PB11; alternates I2C1_SDA, USART2_RX and ENET_MII_TX_EN.
49 VSS_1 power_in Digital ground pin VSS_1.
50 VDD_1 power_in Digital supply pin VDD_1.
51 PB12 bidirectional 5 V tolerant I/O, default PB12; alternates SPI1_NSS, I2C1_SMBA, USART2_CK and CAN1_RX.
52 PB13 bidirectional 5 V tolerant I/O, default PB13; alternates SPI1_SCK, USART2_CTS and CAN1_TX.
53 PB14 bidirectional 5 V tolerant I/O, default PB14; alternates SPI1_MISO, USART2_RTS and TIMER11_CH0.
54 PB15 bidirectional 5 V tolerant I/O, default PB15; alternates SPI1_MOSI, I2S1_SD and TIMER11_CH1.
55 PD8 bidirectional 5 V tolerant I/O, default PD8; alternate EXMC_D13, remap USART2_TX.
56 PD9 bidirectional 5 V tolerant I/O, default PD9; alternate EXMC_D14, remap USART2_RX.
57 PD10 bidirectional 5 V tolerant I/O, default PD10; alternate EXMC_D15, remap USART2_CK.
58 PD11 bidirectional 5 V tolerant I/O, default PD11; alternate EXMC_A16, remap USART2_CTS.
59 PD12 bidirectional 5 V tolerant I/O, default PD12; alternate EXMC_A17, remap TIMER3_CH0 and USART2_RTS.
60 PD13 bidirectional 5 V tolerant I/O, default PD13; alternate EXMC_A18, remap TIMER3_CH1.
61 PD14 bidirectional 5 V tolerant I/O, default PD14; alternate EXMC_D0, remap TIMER3_CH2.
62 PD15 bidirectional 5 V tolerant I/O, default PD15; alternate EXMC_D1, remap TIMER3_CH3 and CTC_SYNC.
63 PC6 bidirectional 5 V tolerant I/O, default PC6; alternates I2S1_MCK and TIMER7_CH0, remap TIMER2_CH0.
64 PC7 bidirectional 5 V tolerant I/O, default PC7; alternates I2S2_MCK and TIMER7_CH1, remap TIMER2_CH1.
65 PC8 bidirectional 5 V tolerant I/O, default PC8; alternate TIMER7_CH2, remap TIMER2_CH2.
66 PC9 bidirectional 5 V tolerant I/O, default PC9; alternate TIMER7_CH3, remap TIMER2_CH3.
67 PA8 bidirectional 5 V tolerant I/O, default PA8; alternates USART0_CK, TIMER0_CH0, CK_OUT0, USBFS_SOF and CTC_SYNC.
68 PA9 bidirectional 5 V tolerant I/O, default PA9; alternates USART0_TX, TIMER0_CH1 and USBFS_VBUS.
69 PA10 bidirectional 5 V tolerant I/O, default PA10; alternates USART0_RX, TIMER0_CH2 and USBFS_ID.
70 PA11 bidirectional 5 V tolerant I/O, default PA11; alternates USART0_CTS, CAN0_RX, USBFS_DM and TIMER0_CH3.
71 PA12 bidirectional 5 V tolerant I/O, default PA12; alternates USART0_RTS, USBFS_DP, CAN0_TX and TIMER0_ETI.
72 PA13 bidirectional 5 V tolerant I/O, default JTMS/SWDIO; remappable to PA13.
73 NC unconnected Not connected pin.
74 VSS_2 power_in Digital ground pin VSS_2.
75 VDD_2 power_in Digital supply pin VDD_2.
76 PA14 bidirectional 5 V tolerant I/O, default JTCK/SWCLK; remappable to PA14.
77 PA15 bidirectional 5 V tolerant I/O, default JTDI; alternates SPI2_NSS and I2S2_WS, remap TIMER1_CH0.
78 PC10 bidirectional 5 V tolerant I/O, default PC10; alternate UART3_TX, remap USART2_TX and SPI2_SCK.
79 PC11 bidirectional 5 V tolerant I/O, default PC11; alternate UART3_RX, remap USART2_RX and SPI2_MISO.
80 PC12 bidirectional 5 V tolerant I/O, default PC12; alternate UART4_TX, remap USART2_CK and SPI2_MOSI.
81 PD0 bidirectional 5 V tolerant I/O, default PD0; alternate EXMC_D2, remap CAN0_RX and OSCIN.
82 PD1 bidirectional 5 V tolerant I/O, default PD1; alternate EXMC_D3, remap CAN0_TX and OSCOUT.
83 PD2 bidirectional 5 V tolerant I/O, default PD2; alternates TIMER2_ETI and UART4_RX.
84 PD3 bidirectional 5 V tolerant I/O, default PD3; alternate EXMC_CLK, remap USART1_CTS.
85 PD4 bidirectional 5 V tolerant I/O, default PD4; alternate EXMC_NOE, remap USART1_RTS.
86 PD5 bidirectional 5 V tolerant I/O, default PD5; alternate EXMC_NWE, remap USART1_TX.
87 PD6 bidirectional 5 V tolerant I/O, default PD6; alternate EXMC_NWAIT, remap USART1_RX.
88 PD7 bidirectional 5 V tolerant I/O, default PD7; alternates EXMC_NE0 and EXMC_NCE1, remap USART1_CK.
89 PB3 bidirectional 5 V tolerant I/O, default JTDO; alternates SPI2_SCK and I2S2_CK, remap TRACESWO.
90 PB4 bidirectional 5 V tolerant I/O, default NJTRST; alternate SPI2_MISO, remap TIMER2_CH0.
91 PB5 bidirectional I/O, default PB5; alternates I2C0_SMBA, SPI2_MOSI and I2S2_SD, remap CAN1_RX.
92 PB6 bidirectional 5 V tolerant I/O, default PB6; alternates I2C0_SCL and TIMER3_CH0, remap USART0_TX and CAN1_TX.
93 PB7 bidirectional 5 V tolerant I/O, default PB7; alternates I2C0_SDA, TIMER3_CH1 and EXMC_NADV, remap USART0_RX.
94 BOOT0 input Boot mode selection input, default BOOT0.
95 PB8 bidirectional 5 V tolerant I/O, default PB8; alternates TIMER3_CH2 and ENET_MII_TXD3, remap I2C0_SCL and CAN0_RX.
96 PB9 bidirectional 5 V tolerant I/O, default PB9; alternate TIMER3_CH3, remap I2C0_SDA and CAN0_TX.
97 PE0 bidirectional 5 V tolerant I/O, default PE0; alternates TIMER3_ETI and EXMC_NBL0.
98 PE1 bidirectional 5 V tolerant I/O, default PE1; alternate EXMC_NBL1.
99 VSS_3 power_in Digital ground pin VSS_3.
100 VDD_3 power_in Digital supply pin VDD_3.

Key specifications

Parameter Value
Manufacturer GigaDevice Semicon Beijing
Package LQFP-100(14x14)
Category Embedded Processors & Controllers
Pins 100

Electrical characteristics

Limits as printed in the datasheet (page.json metadata.characteristics carries them as data).

Parameter Symbol Min Typ Max Unit Conditions Page
External voltage range VDD 3.6 V Min printed as VSS - 0.3; max printed as VSS + 3.6 48
External analog supply voltage VDDA 3.6 V Min printed as VSSA - 0.3; max printed as VSSA + 3.6 48
External battery supply voltage VBAT 3.6 V Min printed as VSS - 0.3; max printed as VSS + 3.6 48
Input voltage on 5V tolerant pin VIN 6.5 V Note 3: VIN maximum value cannot exceed 6.5 V; table gives VDD + 3.6 48
Input voltage on other I/O VIN 3.6 V Min printed as VSS - 0.3 48
Variations between different VDD power pins /ΔVDDx/ 50 mV 48
Variations between different ground pins /VSSX −VSS/ 50 mV 48
Maximum current for GPIO pins IIO -25 25 mA 48
Operating temperature range TA -40 85 °C 48
Storage temperature range TSTG -55 150 °C 48
Maximum junction temperature TJ 125 °C 48
Supply voltage VDD 2.6 3.3 3.6 V 48
Analog supply voltage VDDA 2.6 3.3 3.6 V Same as VDD 48
Battery supply voltage VBAT 1.8 3.6 V 48
AHB clock frequency fHCLK 120 MHz 49
APB1 clock frequency fAPB1 60 MHz 49
APB2 clock frequency fAPB2 120 MHz 49
Pull-up equivalent resistor Rpu 40 kΩ NRST pin; guaranteed by design 65
Low level output voltage for an IO Pin VOL 0.17 V IIO = +8 mA, VDD = 2.6V 66
Low level output voltage for an IO Pin VOL 0.16 V IIO = +8 mA, VDD = 3.3 V 66
Low level output voltage for an IO Pin VOL 0.15 V IIO = +8 mA, VDD = 3.6V 66
Low level output voltage for an IO Pin VOL 0.49 V IIO = +20 mA, VDD = 2.6V 66
Low level output voltage for an IO Pin VOL 0.4 V IIO = +20 mA, VDD = 3.3 V 66
Low level output voltage for an IO Pin VOL 0.34 V IIO = +20 mA, VDD = 3.6V 66
High level output voltage for an IO Pin VOH 2.4 V IIO = +8 mA, VDD = 2.6V 66
High level output voltage for an IO Pin VOH 3.15 V IIO = +8 mA, VDD = 3.3 V 66
High level output voltage for an IO Pin VOH 3.44 V IIO = +8 mA, VDD = 3.6V 66
High level output voltage for an IO Pin VOH 2.02 V IIO = +20 mA, VDD = 2.6V 66
High level output voltage for an IO Pin VOH 2.8 V IIO = +20 mA, VDD = 3.3 V 66
Internal pull-up resistor RPU 30 40 50 kΩ All pins VIN = VSS 66
Internal pull-down resistor RPD 30 40 50 kΩ All pins VIN = VDD 66
Internal pull-up resistor PA10 RPU 7.5 10 13.5 kΩ PA10 66
Internal pull-down resistor PA10 RPD 7.5 10 13.5 kΩ PA10 66
Crystal or ceramic frequency fHXTAL 4 8 32 MHz 2.6 V ≤ VDD ≤ 3.6 V 60
Recommended load capacitance on OSCIN and OSCOUT CHXTAL 20 30 pF 60
External clock source or oscillator frequency fHXTAL_ext 1 50 MHz 2.6 V ≤ VDD ≤ 3.6 V 60
OSCIN high or low time tH/L(HXTAL) 5 ns 60
OSCIN rise or fall time tR/F(HXTAL) 10 ns 60
Duty cycle Ducy(HXTAL) 40 60 % HXTAL in bypass mode 60
External clock source or oscillator frequency fLXTAL_ext 32.768 1000 kHz VDD = 3.3 V 61
IRC8M oscillator Frequency accuracy, Factory-trimmed ACCIRC8M -2.5 2.5 % VDD = VDDA = 3.3 V, TA = -40 °C ~ +85 °C 62
IRC8M oscillator Frequency accuracy, Factory-trimmed ACCIRC8M -1.8 1.8 % VDD = VDDA = 3.3 V, TA = 0 °C ~ +85 °C 62
IRC8M oscillator Frequency accuracy, Factory-trimmed ACCIRC8M -1 1 % VDD = VDDA = 3.3 V, TA = 25 °C 62
Low Speed Internal oscillator (IRC40K) frequency fIRC40K 20 40 45 kHz VDD = VDDA = 3.3 V, TA = -40 °C ~ +85 °C 62
IRC48M oscillator Frequency accuracy, Factory-trimmed ACCIRC48M -4 5 % VDD = VDDA = 3.3 V, TA = -40 °C ~ +85 °C 63
IRC48M oscillator Frequency accuracy, Factory-trimmed ACCIRC48M -3 3 % VDD = VDDA = 3.3 V, TA = 0 °C ~ +85 °C 63
IRC48M oscillator Frequency accuracy, Factory-trimmed ACCIRC48M -2 2 % VDD = VDDA = 3.3 V, TA = 25 °C 63
PLL input clock frequency fPLLIN 1 25 MHz 63
PLL output clock frequency fPLLOUT 16 120 MHz 63
PLL VCO output clock frequency fVCO 32 240 MHz 63
PLL lock time tLOCK 300 μs 63
Operating voltage VDDA 2.6 3.3 3.6 V ADC 67
ADC clock fADC 0.1 40 MHz 68
External input impedance RAIN 32.9 kΩ See Equation 1 68
Sampling time ts 0.0375 5.99 μs fADC = 40 MHz 68
Startup time tSU 1 μs 68
Number of guaranteed program/erase cycles before failure (Endurance) PECYC 100 kcycles TA = -40 °C ~ +85 °C 64
Word programming time tPROG 37.5 86 μs TA = -40 °C ~ +85 °C 64

CAD (KiCad official)

  • Symbol: GD32F307VET6
  • Footprint: Package_QFP:LQFP-100_14x14mm_P0.5mm
  • 3D model: LQFP-100(14x14) (KiCad packages3D, STEP)
  • 3D model files: gd32f307vet6-etched.step / gd32f307vet6-etched.glb carry the MPN laser-etched on the die in a toggleable Adom.LaserEtch group (Fusion-ready); gd32f307vet6.step / gd32f307vet6.glb are the bare package body.

Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

  • Datasheet: GigaDevice Semicon Beijing datasheet (86 pp, sha256 ee85addf5a0e7248, retrieved 2026-10-27, tier: lcsc)
  • Extractor: parts-factory 2.0.0 / extract_pins 0.3, primary claude-haiku-5-5 (text), consensus claude-sonnet-5-5 (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
  • CAD: KiCad official libraries (CC-BY-SA 4.0).

Datasheet PDF