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GD32F305VCT6

GigaDevice Semicon Beijing · Microcontrollers (MCU/MPU/SOC) · LQFP-100(14x14)

GD32F305VCT6 from GigaDevice Semicon Beijing, in a LQFP-100(14x14). Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.

Pinout

Pin Name Type Function
1 PE2 bidirectional 5 V tolerant I/O; default GPIO PE2, alternate functions TRACECK and EXMC_A23.
2 PE3 bidirectional 5 V tolerant I/O; default GPIO PE3, alternate functions TRACED0 and EXMC_A19.
3 PE4 bidirectional 5 V tolerant I/O; default GPIO PE4, alternate functions TRACED1 and EXMC_A20.
4 PE5 bidirectional 5 V tolerant I/O; default GPIO PE5, alternate functions TRACED2 and EXMC_A21, remap TIMER8_CH0 (VG devices only).
5 PE6 bidirectional 5 V tolerant I/O; default GPIO PE6, alternate functions TRACED3 and EXMC_A22, remap TIMER8_CH1 (VG devices only).
6 VBAT power_in Power pin with default function VBAT; the pin table gives no further limits.
7 PC13-TAMPER-RTC bidirectional I/O with default function PC13 and alternate function TAMPER-RTC.
8 PC14-OSC32IN bidirectional I/O with default function PC14 and alternate function OSC32IN.
9 PC15-OSC32OUT bidirectional I/O with default function PC15 and alternate function OSC32OUT.
10 VSS_5 power_in Ground pin VSS_5.
11 VDD_5 power_in Digital supply pin VDD_5.
12 OSCIN input External oscillator input with default function OSCIN, remappable to PD0.
13 OSCOUT output External oscillator output with default function OSCOUT, remappable to PD1.
14 NRST bidirectional Reset pin with default function NRST.
15 PC0 bidirectional I/O with default function PC0 and alternate function ADC01_IN10.
16 PC1 bidirectional I/O with default function PC1 and alternate function ADC01_IN11.
17 PC2 bidirectional I/O with default function PC2 and alternate function ADC01_IN12.
18 PC3 bidirectional I/O with default function PC3 and alternate function ADC01_IN13.
19 VSSA power_in Analog ground pin VSSA.
20 VREF- power_in Analog reference pin with default function VREF-.
21 VREF+ power_in Analog reference pin with default function VREF+.
22 VDDA power_in Analog supply pin VDDA.
23 PA0-WKUP bidirectional I/O with default function PA0 and alternate functions WKUP, USART1_CTS, ADC01_IN0, TIMER1_CH0, TIMER1_ETI, TIMER4_CH0 and TIMER7_ETI (VE/G devices only).
24 PA1 bidirectional I/O with default function PA1 and alternate functions USART1_RTS, ADC01_IN1, TIMER1_CH1 and TIMER4_CH1.
25 PA2 bidirectional I/O with default function PA2 and alternate functions USART1_TX, ADC01_IN2, TIMER1_CH2, TIMER4_CH2, SPI0_IO2, with TIMER8_CH0 (VG devices only).
26 PA3 bidirectional I/O with default function PA3 and alternate functions USART1_RX, ADC01_IN3, TIMER1_CH3, TIMER4_CH3, SPI0_IO3, with TIMER8_CH1 (VG devices only).
27 VSS_4 power_in Ground pin VSS_4.
28 VDD_4 power_in Digital supply pin VDD_4.
29 PA4 bidirectional I/O with default function PA4 and alternate functions SPI0_NSS, USART1_CK, ADC01_IN4 and DAC_OUT0, remappable to SPI2_NSS and I2S2_WS.
30 PA5 bidirectional I/O with default function PA5 and alternate functions SPI0_SCK, ADC01_IN5 and DAC_OUT1.
31 PA6 bidirectional I/O with default function PA6 and alternate functions SPI0_MISO, ADC01_IN6, TIMER2_CH0, TIMER7_BRKIN (VE/G only) and TIMER12_CH0 (VG only), remappable to TIMER0_BRKIN.
32 PA7 bidirectional I/O with default function PA7 and alternate functions SPI0_MOSI, ADC01_IN7, TIMER2_CH1, TIMER7_CH0_ON (VE/G only) and TIMER13_CH0 (VG only), remappable to TIMER0_CH0_ON.
33 PC4 bidirectional I/O with default function PC4 and alternate function ADC01_IN14.
34 PC5 bidirectional I/O with default function PC5 and alternate function ADC01_IN15.
35 PB0 bidirectional I/O with default function PB0 and alternate functions ADC01_IN8, TIMER2_CH2 and TIMER7_CH1_ON (VE/G only), remappable to TIMER0_CH1_ON.
36 PB1 bidirectional I/O with default function PB1 and alternate functions ADC01_IN9, TIMER2_CH3 and TIMER7_CH2_ON (VE/G only), remappable to TIMER0_CH2_ON.
37 PB2 bidirectional 5 V tolerant I/O with default function PB2 and BOOT1 function.
38 PE7 bidirectional 5 V tolerant I/O; default GPIO PE7, alternate function EXMC_D4, remappable to TIMER0_ETI.
39 PE8 bidirectional 5 V tolerant I/O; default GPIO PE8, alternate function EXMC_D5, remappable to TIMER0_CH0_ON.
40 PE9 bidirectional 5 V tolerant I/O; default GPIO PE9, alternate function EXMC_D6, remappable to TIMER0_CH0.
41 PE10 bidirectional 5 V tolerant I/O; default GPIO PE10, alternate function EXMC_D7, remappable to TIMER0_CH1_ON.
42 PE11 bidirectional 5 V tolerant I/O; default GPIO PE11, alternate function EXMC_D8, remappable to TIMER0_CH1.
43 PE12 bidirectional 5 V tolerant I/O; default GPIO PE12, alternate function EXMC_D9, remappable to TIMER0_CH2_ON.
44 PE13 bidirectional 5 V tolerant I/O; default GPIO PE13, alternate function EXMC_D10, remappable to TIMER0_CH2.
45 PE14 bidirectional 5 V tolerant I/O; default GPIO PE14, alternate function EXMC_D11, remappable to TIMER0_CH3.
46 PE15 bidirectional 5 V tolerant I/O; default GPIO PE15, alternate function EXMC_D12, remappable to TIMER0_BRKIN.
47 PB10 bidirectional 5 V tolerant I/O; default GPIO PB10, alternate functions I2C1_SCL and USART2_TX, remappable to TIMER1_CH2.
48 PB11 bidirectional 5 V tolerant I/O; default GPIO PB11, alternate functions I2C1_SDA and USART2_RX, remappable to TIMER1_CH3.
49 VSS_1 power_in Ground pin VSS_1.
50 VDD_1 power_in Digital supply pin VDD_1.
51 PB12 bidirectional 5 V tolerant I/O; default GPIO PB12, alternate functions SPI1_NSS, I2C1_SMBA, USART2_CK, TIMER0_BRKIN, I2S1_WS and CAN1_RX.
52 PB13 bidirectional 5 V tolerant I/O; default GPIO PB13, alternate functions SPI1_SCK, USART2_CTS, TIMER0_CH0_ON, I2S1_CK and CAN1_TX.
53 PB14 bidirectional 5 V tolerant I/O; default GPIO PB14, alternate functions SPI1_MISO, USART2_RTS, TIMER0_CH1_ON and TIMER11_CH0 (VG devices only).
54 PB15 bidirectional 5 V tolerant I/O; default GPIO PB15, alternate functions SPI1_MOSI, TIMER0_CH2_ON, I2S1_SD and TIMER11_CH1 (VG devices only).
55 PD8 bidirectional 5 V tolerant I/O; default GPIO PD8, alternate function EXMC_D13, remappable to USART2_TX.
56 PD9 bidirectional 5 V tolerant I/O; default GPIO PD9, alternate function EXMC_D14, remappable to USART2_RX.
57 PD10 bidirectional 5 V tolerant I/O; default GPIO PD10, alternate function EXMC_D15, remappable to USART2_CK.
58 PD11 bidirectional 5 V tolerant I/O; default GPIO PD11, alternate function EXMC_A16, remappable to USART2_CTS.
59 PD12 bidirectional 5 V tolerant I/O; default GPIO PD12, alternate function EXMC_A17, remappable to TIMER3_CH0 and USART2_RTS.
60 PD13 bidirectional 5 V tolerant I/O; default GPIO PD13, alternate function EXMC_A18, remappable to TIMER3_CH1.
61 PD14 bidirectional 5 V tolerant I/O; default GPIO PD14, alternate function EXMC_D0, remappable to TIMER3_CH2.
62 PD15 bidirectional 5 V tolerant I/O; default GPIO PD15, alternate function EXMC_D1, remappable to TIMER3_CH3 and CTC_SYNC.
63 PC6 bidirectional 5 V tolerant I/O; default GPIO PC6, alternate functions I2S1_MCK and TIMER7_CH0 (VE/G only), remappable to TIMER2_CH0.
64 PC7 bidirectional 5 V tolerant I/O; default GPIO PC7, alternate functions I2S2_MCK and TIMER7_CH1 (VE/G only), remappable to TIMER2_CH1.
65 PC8 bidirectional 5 V tolerant I/O; default GPIO PC8, alternate function TIMER7_CH2 (VE/G only), remappable to TIMER2_CH2.
66 PC9 bidirectional 5 V tolerant I/O; default GPIO PC9, alternate function TIMER7_CH3 (VE/G only), remappable to TIMER2_CH3.
67 PA8 bidirectional 5 V tolerant I/O; default GPIO PA8, alternate functions USART0_CK, TIMER0_CH0, CK_OUT0, USBFS_SOF and CTC_SYNC.
68 PA9 bidirectional 5 V tolerant I/O; default GPIO PA9, alternate functions USART0_TX, TIMER0_CH1 and USBFS_VBUS.
69 PA10 bidirectional 5 V tolerant I/O; default GPIO PA10, alternate functions USART0_RX, TIMER0_CH2 and USBFS_ID.
70 PA11 bidirectional 5 V tolerant I/O; default GPIO PA11, alternate functions USART0_CTS, CAN0_RX, USBFS_DM and TIMER0_CH3.
71 PA12 bidirectional 5 V tolerant I/O; default GPIO PA12, alternate functions USART0_RTS, USBFS_DP, CAN0_TX and TIMER0_ETI.
72 PA13 bidirectional 5 V tolerant I/O; default function JTMS/SWDIO, remappable to GPIO PA13.
73 NC unconnected Not connected; the pin table lists no function for this pin.
74 VSS_2 power_in Ground pin VSS_2.
75 VDD_2 power_in Digital supply pin VDD_2.
76 PA14 bidirectional 5 V tolerant I/O; default function JTCK/SWCLK, remappable to GPIO PA14.
77 PA15 bidirectional 5 V tolerant I/O; default function JTDI, alternate functions SPI2_NSS and I2S2_WS, remappable to TIMER1_CH0, TIMER1_ETI, PA15 and SPI0_NSS.
78 PC10 bidirectional 5 V tolerant I/O; default GPIO PC10, alternate function UART3_TX, remappable to USART2_TX, SPI2_SCK and I2S2_CK.
79 PC11 bidirectional 5 V tolerant I/O; default GPIO PC11, alternate function UART3_RX, remappable to USART2_RX and SPI2_MISO.
80 PC12 bidirectional 5 V tolerant I/O; default GPIO PC12, alternate function UART4_TX, remappable to USART2_CK, SPI2_MOSI and I2S2_SD.
81 PD0 bidirectional 5 V tolerant I/O; default GPIO PD0, alternate function EXMC_D2, remappable to CAN0_RX and OSCIN.
82 PD1 bidirectional 5 V tolerant I/O; default GPIO PD1, alternate function EXMC_D3, remappable to CAN0_TX and OSCOUT.
83 PD2 bidirectional 5 V tolerant I/O; default GPIO PD2, alternate functions TIMER2_ETI and UART4_RX.
84 PD3 bidirectional 5 V tolerant I/O; default GPIO PD3, alternate function EXMC_CLK, remappable to USART1_CTS.
85 PD4 bidirectional 5 V tolerant I/O; default GPIO PD4, alternate function EXMC_NOE, remappable to USART1_RTS.
86 PD5 bidirectional 5 V tolerant I/O; default GPIO PD5, alternate function EXMC_NWE, remappable to USART1_TX.
87 PD6 bidirectional 5 V tolerant I/O; default GPIO PD6, alternate function EXMC_NWAIT, remappable to USART1_RX.
88 PD7 bidirectional 5 V tolerant I/O; default GPIO PD7, alternate functions EXMC_NE0 and EXMC_NCE1, remappable to USART1_CK.
89 PB3 bidirectional 5 V tolerant I/O; default function JTDO, alternate functions SPI2_SCK and I2S2_CK, remappable to PB3, TRACESWO, TIMER1_CH1 and SPI0_SCK.
90 PB4 bidirectional 5 V tolerant I/O; default function NJTRST, alternate function SPI2_MISO, remappable to TIMER2_CH0, PB4 and SPI0_MISO.
91 PB5 bidirectional I/O with default function PB5, alternate functions I2C0_SMBA, SPI2_MOSI and I2S2_SD, remappable to TIMER2_CH1, SPI0_MOSI and CAN1_RX.
92 PB6 bidirectional 5 V tolerant I/O; default GPIO PB6, alternate functions I2C0_SCL and TIMER3_CH0, remappable to USART0_TX, CAN1_TX and SPI0_IO2.
93 PB7 bidirectional 5 V tolerant I/O; default GPIO PB7, alternate functions I2C0_SDA, TIMER3_CH1 and EXMC_NADV, remappable to USART0_RX and SPI0_IO3.
94 BOOT0 input Input pin with default function BOOT0.
95 PB8 bidirectional 5 V tolerant I/O; default GPIO PB8, alternate functions TIMER3_CH2 and TIMER9_CH0 (VG devices only), remappable to I2C0_SCL and CAN0_RX.
96 PB9 bidirectional 5 V tolerant I/O; default GPIO PB9, alternate functions TIMER3_CH3 and TIMER10_CH0 (VG devices only), remappable to I2C0_SDA and CAN0_TX.
97 PE0 bidirectional 5 V tolerant I/O; default GPIO PE0, alternate functions TIMER3_ETI and EXMC_NBL0.
98 PE1 bidirectional 5 V tolerant I/O; default GPIO PE1, alternate function EXMC_NBL1.
99 VSS_3 power_in Ground pin VSS_3.
100 VDD_3 power_in Digital supply pin VDD_3.

Key specifications

Parameter Value
Manufacturer GigaDevice Semicon Beijing
Package LQFP-100(14x14)
Category Embedded Processors & Controllers
Pins 100

Electrical characteristics

Limits as printed in the datasheet (page.json metadata.characteristics carries them as data).

Parameter Symbol Min Typ Max Unit Conditions Page
Variations between different VDD power pins /ΔVDDX/ 50 mV 48
Variations between different ground pins /VSSX −VSS/ 50 mV 48
Maximum current for GPIO pins IIO -25 25 mA 48
Operating temperature range TA -40 85 °C 48
Storage temperature range TSTG -55 150 °C 48
Maximum junction temperature TJ 125 °C 48
Input voltage on other I/O VIN 3.6 V 48
Input voltage on 5V tolerant pin VIN 6.5 V VIN maximum value cannot exceed 6.5 V (note 3) 48
Supply voltage VDD 2.6 3.3 3.6 V 48
Analog supply voltage VDDA 2.6 3.3 3.6 V Same as VDD 48
Battery supply voltage VBAT 1.8 3.6 V 48
AHB clock frequency fHCLK 120 MHz 49
APB1 clock frequency fAPB1 60 MHz 49
APB2 clock frequency fAPB2 120 MHz 49
VDD rise time rate tVDD 0 μs/V 49
VDD fall time rate 20 μs/V 49
Electrostatic discharge voltage (human body model) VESD(HBM) 4000 V TA = 25 °C; JESD22-A114 58
Electrostatic discharge voltage (charge device model) VESD(CDM) 800 V TA = 25 °C; JESD22-C101 58
Static latch-up I-test LU -200 200 mA TA = 25 °C; JESD78 59
Static latch-up supply over voltage 5.4 V 59
Crystal or ceramic frequency fHXTAL 4 8 32 MHz 2.6 V ≤ VDD ≤ 3.6 V 59
Crystal or ceramic duty cycle Ducy(HXTAL) 30 50 70 % 59
External clock source or oscillator frequency (HXTAL bypass) fHXTAL_ext 1 50 MHz 2.6 V ≤ VDD ≤ 3.6 V 59
OSCIN high or low time tH/L(HXTAL) 5 ns 59
OSCIN rise or fall time tR/F(HXTAL) 10 ns 59
Duty cycle (HXTAL bypass) Ducy(HXTAL) 40 60 % 59
Crystal or ceramic duty cycle (LXTAL) Ducy(LXTAL) 30 70 % 60
External clock source or oscillator frequency (LXTAL bypass) fLXTAL_ext 32.768 1000 kHz VDD = 3.3 V 60
OSC32IN high or low time tH/L(LXTAL) 450 ns 60
OSC32IN rise or fall time tR/F(LXTAL) 50 ns 60
Duty cycle (LXTAL bypass) Ducy(LXTAL) 30 50 70 % 60
IRC8M oscillator frequency accuracy, factory-trimmed ACCIRC8M -2.5 2.5 % VDD = VDDA = 3.3 V, TA = -40 °C ~ +85 °C 61
IRC8M oscillator frequency accuracy, factory-trimmed ACCIRC8M -1.8 1.8 % VDD = VDDA = 3.3 V, TA = 0 °C ~ +85 °C 61
IRC8M oscillator frequency accuracy, factory-trimmed ACCIRC8M -1 1 % VDD = VDDA = 3.3 V, TA = 25 °C 61
IRC8M oscillator duty cycle DucyIRC8M 45 50 55 % VDD = VDDA = 3.3 V 61
Low speed internal oscillator (IRC40K) frequency fIRC40K 20 40 45 kHz VDD = VDDA = 3.3 V, TA = -40°C ~ +85 °C 61
IRC48M oscillator frequency accuracy, factory-trimmed ACCIRC48M -4 5 % VDD = VDDA = 3.3 V, TA = -40°C ~+85 °C 62
IRC48M oscillator frequency accuracy, factory-trimmed ACCIRC48M -3 3 % VDD = VDDA = 3.3 V, TA = 0 °C ~ +85 °C 62
IRC48M oscillator frequency accuracy, factory-trimmed ACCIRC48M -2 2 % VDD = VDDA = 3.3 V, TA = 25 °C 62
IRC48M oscillator duty cycle DIRC48M 45 50 55 % VDD = VDDA = 3.3 V 62
PLL input clock frequency fPLLIN 1 25 MHz 62
PLL output clock frequency fPLLOUT 16 120 MHz 62
PLL VCO output clock frequency fVCO 32 240 MHz 62
PLL lock time tLOCK 300 μs 62
Number of guaranteed program/erase cycles before failure (endurance) PECYC 100 kcycles TA = -40 °C ~ +85 °C 64
Word programming time tPROG 37.5 86 μs TA = -40°C ~ +85 °C 64
Page erase time tERASE 45 200 ms TA = -40°C ~ +85 °C; 200 ms for <50K cycles, 300 ms for >50K & <100K cycles 64
Mass erase time (256K) tMERASE(256K) 1 4.8 s TA = -40°C ~ +85 °C; 4.8 s for <50K cycles, 8.0 s for >50K & <100K cycles 64
Low level output voltage for an IO pin VOL 0.17 V IIO = +8mA; VDD = 2.6 V 65
Low level output voltage for an IO pin VOL 0.16 V IIO = +8mA; VDD = 3.3 V 65
Low level output voltage for an IO pin VOL 0.15 V IIO = +8mA; VDD = 3.6 V 65
High level output voltage for an IO pin VOH 2.4 V IIO = +8mA; VDD = 2.6 V 65
High level output voltage for an IO pin VOH 3.15 V IIO = +8mA; VDD = 3.3 V 65
High level output voltage for an IO pin VOH 3.44 V IIO = +8mA; VDD = 3.6 V 65
Internal pull-up resistor RPU 30 40 50 kΩ All pins VIN = VSS 65
Internal pull-down resistor RPD 30 40 50 kΩ All pins VIN = VDD 65
ADC clock fADC 0.1 40 MHz 67
SCK clock frequency (standard SPI) fSCK 30 MHz 70
SCK clock frequency (USART) fSCK 60 MHz fPCLKx = 120 MHz 71
Load resistance RLOAD 5 kΩ Resistive load with buffer ON 68

CAD (KiCad official)

  • Symbol: GD32F305VCT6
  • Footprint: Package_QFP:LQFP-100_14x14mm_P0.5mm
  • 3D model: LQFP-100(14x14) (KiCad packages3D, STEP)
  • 3D model files: gd32f305vct6-etched.step / gd32f305vct6-etched.glb carry the MPN laser-etched on the die in a toggleable Adom.LaserEtch group (Fusion-ready); gd32f305vct6.step / gd32f305vct6.glb are the bare package body.

Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

  • Datasheet: GigaDevice Semicon Beijing datasheet (83 pp, sha256 b600f18e174fa334, retrieved 2026-10-19, tier: lcsc)
  • Extractor: parts-factory 2.0.0 / extract_pins 0.3, primary claude-haiku-5-5 (text), consensus claude-sonnet-5-5 (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
  • CAD: KiCad official libraries (CC-BY-SA 4.0).

Datasheet PDF