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GD32F305RBT6

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GigaDevice Semicon Beijing Microcontrollers (MCU/MPU/SOC), LQFP-64(10x10). Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.

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GD32F305RBT6

GigaDevice Semicon Beijing · Microcontrollers (MCU/MPU/SOC) · LQFP-64(10x10)

GD32F305RBT6 from GigaDevice Semicon Beijing, in a LQFP-64(10x10). Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.

Pinout

Pin Name Type Function
1 VBAT power_in Backup-domain supply pin VBAT; the pin table gives no further electrical limits for it.
2 PC13-TAMPER-RTC bidirectional GPIO PC13 by default, with the TAMPER-RTC alternate function.
3 PC14-OSC32IN bidirectional GPIO PC14 by default, with the OSC32IN alternate function.
4 PC15-OSC32OUT bidirectional GPIO PC15 by default, with the OSC32OUT alternate function.
5 OSCIN input High-speed external oscillator input OSCIN, which can be remapped to PD0; PD0/PD1 cannot be used for EXTI in this package.
6 OSCOUT output High-speed external oscillator output OSCOUT, which can be remapped to PD1; PD0/PD1 cannot be used for EXTI in this package.
7 NRST bidirectional Reset pin NRST (default function); electrical limits are given in section 4.11 NRST pin characteristics.
8 PC0 bidirectional GPIO PC0 with the ADC01_IN10 analog input alternate function.
9 PC1 bidirectional GPIO PC1 with the ADC01_IN11 analog input alternate function.
10 PC2 bidirectional GPIO PC2 with the ADC01_IN12 analog input alternate function.
11 PC3 bidirectional GPIO PC3 with the ADC01_IN13 analog input alternate function.
12 VSSA power_in Analog ground pin VSSA.
13 VDDA power_in Analog supply pin VDDA.
14 PA0-WKUP bidirectional GPIO PA0 with alternate functions WKUP, USART1_CTS, ADC01_IN0, TIMER1_CH0, TIMER1_ETI and TIMER4_CH0.
15 PA1 bidirectional GPIO PA1 with alternate functions USART1_RTS, ADC01_IN1, TIMER1_CH1 and TIMER4_CH1.
16 PA2 bidirectional GPIO PA2 with alternate functions USART1_TX, ADC01_IN2, TIMER1_CH2, TIMER4_CH2 and SPI0_IO2.
17 PA3 bidirectional GPIO PA3 with alternate functions USART1_RX, ADC01_IN3, TIMER1_CH3, TIMER4_CH3 and SPI0_IO3.
18 VSS_4 power_in Ground pin VSS_4.
19 VDD_4 power_in Supply pin VDD_4.
20 PA4 bidirectional GPIO PA4 with alternate functions SPI0_NSS, USART1_CK, ADC01_IN4 and DAC_OUT0; remap SPI2_NSS and I2S2_WS.
21 PA5 bidirectional GPIO PA5 with alternate functions SPI0_SCK, ADC01_IN5 and DAC_OUT1.
22 PA6 bidirectional GPIO PA6 with alternate functions SPI0_MISO, ADC01_IN6 and TIMER2_CH0; remap TIMER0_BRKIN.
23 PA7 bidirectional GPIO PA7 with alternate functions SPI0_MOSI, ADC01_IN7 and TIMER2_CH1; remap TIMER0_CH0_ON.
24 PC4 bidirectional GPIO PC4 with the ADC01_IN14 analog input alternate function.
25 PC5 bidirectional GPIO PC5 with the ADC01_IN15 analog input alternate function.
26 PB0 bidirectional GPIO PB0 with alternate functions ADC01_IN8 and TIMER2_CH2; remap TIMER0_CH1_ON.
27 PB1 bidirectional GPIO PB1 with alternate functions ADC01_IN9 and TIMER2_CH3; remap TIMER0_CH2_ON.
28 PB2 bidirectional 5 V tolerant GPIO PB2 (default BOOT1 function).
29 PB10 bidirectional 5 V tolerant GPIO PB10 with alternate functions I2C1_SCL and USART2_TX; remap TIMER1_CH2.
30 PB11 bidirectional 5 V tolerant GPIO PB11 with alternate functions I2C1_SDA and USART2_RX; remap TIMER1_CH3.
31 VSS_1 power_in Ground pin VSS_1.
32 VDD_1 power_in Supply pin VDD_1.
33 PB12 bidirectional 5 V tolerant GPIO PB12 with alternate functions SPI1_NSS, I2C1_SMBA, USART2_CK, TIMER0_BRKIN, I2S1_WS and CAN1_RX.
34 PB13 bidirectional 5 V tolerant GPIO PB13 with alternate functions SPI1_SCK, USART2_CTS, TIMER0_CH0_ON, I2S1_CK and CAN1_TX.
35 PB14 bidirectional 5 V tolerant GPIO PB14 with alternate functions SPI1_MISO, USART2_RTS and TIMER0_CH1_ON.
36 PB15 bidirectional 5 V tolerant GPIO PB15 with alternate functions SPI1_MOSI, TIMER0_CH2_ON and I2S1_SD.
37 PC6 bidirectional 5 V tolerant GPIO PC6 with alternate function I2S1_MCK; remap TIMER2_CH0.
38 PC7 bidirectional 5 V tolerant GPIO PC7 with alternate function I2S2_MCK; remap TIMER2_CH1.
39 PC8 bidirectional 5 V tolerant GPIO PC8; remap TIMER2_CH2.
40 PC9 bidirectional 5 V tolerant GPIO PC9; remap TIMER2_CH3.
41 PA8 bidirectional 5 V tolerant GPIO PA8 with alternate functions USART0_CK, TIMER0_CH0, CK_OUT0, USBFS_SOF and CTC_SYNC.
42 PA9 bidirectional 5 V tolerant GPIO PA9 with alternate functions USART0_TX, TIMER0_CH1 and USBFS_VBUS.
43 PA10 bidirectional 5 V tolerant GPIO PA10 with alternate functions USART0_RX, TIMER0_CH2 and USBFS_ID.
44 PA11 bidirectional 5 V tolerant GPIO PA11 with alternate functions USART0_CTS, CAN0_RX, USBFS_DM and TIMER0_CH3.
45 PA12 bidirectional 5 V tolerant GPIO PA12 with alternate functions USART0_RTS, USBFS_DP, CAN0_TX and TIMER0_ETI.
46 PA13 bidirectional 5 V tolerant pin PA13, default function JTMS/SWDIO; remap PA13.
47 VSS_2 power_in Ground pin VSS_2.
48 VDD_2 power_in Supply pin VDD_2.
49 PA14 bidirectional 5 V tolerant pin PA14, default function JTCK/SWCLK; remap PA14.
50 PA15 bidirectional 5 V tolerant pin PA15, default function JTDI, with alternate functions SPI2_NSS and I2S2_WS; remap TIMER1_CH0, TIMER1_ETI, PA15 and SPI0_NSS.
51 PC10 bidirectional 5 V tolerant GPIO PC10 with alternate function UART3_TX; remap USART2_TX, SPI2_SCK and I2S2_CK.
52 PC11 bidirectional 5 V tolerant GPIO PC11 with alternate function UART3_RX; remap USART2_RX and SPI2_MISO.
53 PC12 bidirectional 5 V tolerant GPIO PC12 with alternate function UART4_TX; remap USART2_CK, SPI2_MOSI and I2S2_SD.
54 PD2 bidirectional 5 V tolerant GPIO PD2 with alternate functions TIMER2_ETI and UART4_RX.
55 PB3 bidirectional 5 V tolerant pin PB3, default function JTDO, with alternate functions SPI2_SCK and I2S2_CK; remap PB3, TRACESWO, TIMER1_CH1 and SPI0_SCK.
56 PB4 bidirectional 5 V tolerant pin PB4, default function NJTRST, with alternate function SPI2_MISO; remap TIMER2_CH0, PB4 and SPI0_MISO.
57 PB5 bidirectional GPIO PB5 with alternate functions I2C0_SMBA, SPI2_MOSI and I2S2_SD; remap TIMER2_CH1, SPI0_MOSI and CAN1_RX.
58 PB6 bidirectional 5 V tolerant GPIO PB6 with alternate functions I2C0_SCL and TIMER3_CH0; remap USART0_TX, CAN1_TX and SPI0_IO2.
59 PB7 bidirectional 5 V tolerant GPIO PB7 with alternate functions I2C0_SDA and TIMER3_CH1; remap USART0_RX and SPI0_IO3.
60 BOOT0 input Boot pin BOOT0 (default function).
61 PB8 bidirectional 5 V tolerant GPIO PB8 with alternate function TIMER3_CH2; remap I2C0_SCL and CAN0_RX.
62 PB9 bidirectional 5 V tolerant GPIO PB9 with alternate function TIMER3_CH3; remap I2C0_SDA and CAN0_TX.
63 VSS_3 power_in Ground pin VSS_3.
64 VDD_3 power_in Supply pin VDD_3.

Key specifications

Parameter Value
Manufacturer GigaDevice Semicon Beijing
Package LQFP-64(10x10)
Category Embedded Processors & Controllers
Pins 64

Electrical characteristics

Limits as printed in the datasheet (page.json metadata.characteristics carries them as data).

Parameter Symbol Min Typ Max Unit Conditions Page
External voltage range VDD -0.3 3.6 V Referenced to VSS 48
External analog supply voltage VDDA -0.3 3.6 V Referenced to VSSA 48
External battery supply voltage VBAT -0.3 3.6 V Referenced to VSS 48
Input voltage on 5V tolerant pin VIN -0.3 V Referenced to VSS; maximum printed as VDD + 3.6 V 48
Input voltage on 5V tolerant pin, footnote (3) limit VIN 6.5 V Footnote (3): VIN maximum value cannot exceed 6.5 V 48
Input voltage on other I/O VIN -0.3 3.6 V Referenced to VSS 48
Variations between different VDD power pins /ΔVDDX/ 50 mV 48
Variations between different ground pins /VSSX −VSS/ 50 mV 48
Maximum current for GPIO pins IIO -25 25 mA 48
Operating temperature range TA -40 85 °C 48
Storage temperature range TSTG -55 150 °C 48
Maximum junction temperature TJ 125 °C 48
Electrostatic discharge voltage (human body model) VESD(HBM) 4000 V TA = 25 °C; JESD22-A114 58
Electrostatic discharge voltage (charge device model) VESD(CDM) 800 V TA = 25 °C; JESD22-C101 58
Static latch-up I-test LU I-test -200 200 mA TA = 25 °C; JESD78 59
Supply over voltage (latch-up test) Vsupply 5.4 V 59
Supply voltage VDD 2.6 3.3 3.6 V 48
Analog supply voltage VDDA 2.6 3.3 3.6 V Same as VDD 48
Battery supply voltage VBAT 1.8 3.6 V 48
AHB clock frequency fHCLK 120 MHz 49
APB1 clock frequency fAPB1 60 MHz 49
APB2 clock frequency fAPB2 120 MHz 49
VDD rise time rate tVDD 0 μs/ V 49
VDD fall time rate 20 μs/ V 49
Crystal or ceramic frequency (HXTAL) fHXTAL 4 8 32 MHz 2.6 V ≤ VDD ≤ 3.6 V 59
Recommended matching capacitance on OSCIN and OSCOUT CHXTAL 20 30 pF 59
Crystal or ceramic duty cycle Ducy(HXTAL) 30 50 70 % 59
External clock source or oscillator frequency (HXTAL bypass) fHXTAL_ext 1 50 MHz 2.6 V ≤ VDD ≤ 3.6 V 59
OSCIN high or low time tH/L(HXTAL) 5 ns 59
OSCIN rise or fall time tR/F(HXTAL) 10 ns 59
Duty cycle (HXTAL bypass mode) Ducy(HXTAL) 40 60 % 59
External clock source or oscillator frequency (LXTAL bypass) fLXTAL_ext 32.768 1000 kHz VDD = 3.3 V 60
OSC32IN high or low time tH/L(LXTAL) 450 ns 60
OSC32IN rise or fall time tR/F(LXTAL) 50 ns 60
Duty cycle (LXTAL bypass mode) Ducy(LXTAL) 30 50 70 % 60
IRC8M oscillator frequency accuracy, factory-trimmed ACCIRC8M -2.5 2.5 % VDD = VDDA = 3.3 V, TA = -40 °C ~ +85 °C 61
IRC8M oscillator frequency accuracy, factory-trimmed ACCIRC8M -1.8 1.8 % VDD = VDDA = 3.3 V, TA = 0 °C ~ +85 °C 61
IRC8M oscillator frequency accuracy, factory-trimmed ACCIRC8M -1 1 % VDD = VDDA = 3.3 V, TA = 25 °C 61
IRC8M oscillator duty cycle DucyIRC8M 45 50 55 % VDD = VDDA = 3.3 V 61
Low speed internal oscillator (IRC40K) frequency fIRC40K 20 40 45 kHz VDD = VDDA = 3.3 V, TA = -40°C ~ +85 °C 61
IRC48M oscillator frequency accuracy, factory-trimmed ACCIRC48M -4 5 % VDD = VDDA = 3.3 V, TA = -40°C ~+85 °C 62
IRC48M oscillator frequency accuracy, factory-trimmed ACCIRC48M -3 3 % VDD = VDDA = 3.3 V, TA = 0 °C ~ +85 °C 62
IRC48M oscillator frequency accuracy, factory-trimmed ACCIRC48M -2 2 % VDD = VDDA = 3.3 V, TA = 25 °C 62
PLL input clock frequency fPLLIN 1 25 MHz 62
PLL output clock frequency fPLLOUT 16 120 MHz 62
PLL VCO output clock frequency fVCO 32 240 MHz 62
PLL lock time tLOCK 300 μs 62
Word programming time tPROG 37.5 86 μs TA = -40°C ~ +85 °C 64
Number of guaranteed program/erase cycles (endurance) PECYC 100 kcycles TA = -40 °C ~ +85 °C 64
ADC clock fADC 0.1 40 MHz 67
Sampling rate (12-bit) fS 0.007 2.86 MSPS 67
External input impedance RAIN 32.9 kΩ See Equation 1 67
Sampling time ts 0.0375 5.99 μs fADC = 40 MHz 67
Offset error Offset -1 1 LSB fADC = 14 MHz, VDDA = VREF+ = 3.3 V 68
Integral linearity error INL -1 1 LSB fADC = 14 MHz, VDDA = VREF+ = 3.3 V 68
VSENSE linearity with temperature TL -1.5 1.5 ℃ 68
Low level output voltage for an IO pin VOL 0.16 V IIO = +8mA, VDD = 3.3 V 65
Low level output voltage for an IO pin VOL 0.4 V IIO = +20mA, VDD = 3.3 V 65
High level output voltage for an IO pin VOH 3.15 V IIO = +8mA, VDD = 3.3 V 65
High level output voltage for an IO pin VOH 2.8 V IIO = +20mA, VDD = 3.3 V 65

CAD (KiCad official)

  • Symbol: GD32F305RBT6
  • Footprint: Package_QFP:LQFP-64_10x10mm_P0.5mm
  • 3D model: LQFP-64(10x10) (KiCad packages3D, STEP)
  • 3D model files: gd32f305rbt6-etched.step / gd32f305rbt6-etched.glb carry the MPN laser-etched on the die in a toggleable Adom.LaserEtch group (Fusion-ready); gd32f305rbt6.step / gd32f305rbt6.glb are the bare package body.

Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

  • Datasheet: GigaDevice Semicon Beijing datasheet (83 pp, sha256 b600f18e174fa334, retrieved 2026-10-18, tier: lcsc)
  • Extractor: parts-factory 2.0.0 / extract_pins 0.3, primary claude-haiku-5-5 (text), consensus claude-sonnet-5-5 (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
  • CAD: KiCad official libraries (CC-BY-SA 4.0).

Datasheet PDF