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GD32F303RCT6A

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GigaDevice Semicon Beijing Microcontrollers (MCU/MPU/SOC), LQFP-64(10x10). Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.

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GD32F303RCT6A

GigaDevice Semicon Beijing · Microcontrollers (MCU/MPU/SOC) · LQFP-64(10x10)

GD32F303RCT6A from GigaDevice Semicon Beijing, in a LQFP-64(10x10). Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.

Pinout

Pin Name Type Function
1 VBAT power_in Power supply pin for the VBAT function (default VBAT).
2 PC13-TAMPER-RTC bidirectional General-purpose I/O PC13 by default, with alternate function TAMPER-RTC; I/O level not marked 5 V tolerant.
3 PC14-OSC32IN bidirectional General-purpose I/O PC14 by default, with alternate function OSC32IN; I/O level not marked 5 V tolerant.
4 PC15-OSC32OUT bidirectional General-purpose I/O PC15 by default, with alternate function OSC32OUT; I/O level not marked 5 V tolerant.
5 OSCIN input High-speed external oscillator input by default (OSCIN); can be remapped to PD0, which cannot be used for EXTI in this package.
6 OSCOUT output High-speed external oscillator output by default (OSCOUT); can be remapped to PD1, which cannot be used for EXTI in this package.
7 NRST bidirectional Active-low reset pin (default NRST).
8 PC0 bidirectional General-purpose I/O PC0 with alternate function ADC012_IN10; I/O level not marked 5 V tolerant.
9 PC1 bidirectional General-purpose I/O PC1 with alternate function ADC012_IN11; I/O level not marked 5 V tolerant.
10 PC2 bidirectional General-purpose I/O PC2 with alternate function ADC012_IN12; I/O level not marked 5 V tolerant.
11 PC3 bidirectional General-purpose I/O PC3 with alternate function ADC012_IN13; I/O level not marked 5 V tolerant.
12 VSSA power_in Analog ground pin (default VSSA).
13 VDDA power_in Analog power supply pin (default VDDA).
14 PA0-WKUP bidirectional General-purpose I/O PA0 with alternate functions WKUP, USART1_CTS, ADC012_IN0, TIMER1_CH0, TIMER1_ETI, TIMER4_CH0 and TIMER7_ETI; I/O level not marked 5 V tolerant.
15 PA1 bidirectional General-purpose I/O PA1 with alternate functions USART1_RTS, ADC012_IN1, TIMER1_CH1 and TIMER4_CH1; I/O level not marked 5 V tolerant.
16 PA2 bidirectional General-purpose I/O PA2 with alternate functions USART1_TX, ADC012_IN2, TIMER1_CH2, TIMER4_CH2 and SPI0_IO2; I/O level not marked 5 V tolerant.
17 PA3 bidirectional General-purpose I/O PA3 with alternate functions USART1_RX, ADC012_IN3, TIMER1_CH3, TIMER4_CH3 and SPI0_IO3; I/O level not marked 5 V tolerant.
18 VSS_4 power_in Digital ground pin (default VSS_4).
19 VDD_4 power_in Digital power supply pin (default VDD_4).
20 PA4 bidirectional General-purpose I/O PA4 with alternate functions SPI0_NSS, USART1_CK, ADC01_IN4 and DAC_OUT0; remap to SPI2_NSS and I2S2_WS; I/O level not marked 5 V tolerant.
21 PA5 bidirectional General-purpose I/O PA5 with alternate functions SPI0_SCK, ADC01_IN5 and DAC_OUT1; I/O level not marked 5 V tolerant.
22 PA6 bidirectional General-purpose I/O PA6 with alternate functions SPI0_MISO, ADC01_IN6, TIMER2_CH0 and TIMER7_BRKIN; remap to TIMER0_BRKIN; I/O level not marked 5 V tolerant.
23 PA7 bidirectional General-purpose I/O PA7 with alternate functions SPI0_MOSI, ADC01_IN7, TIMER2_CH1 and TIMER7_CH0_ON; remap to TIMER0_CH0_ON; I/O level not marked 5 V tolerant.
24 PC4 bidirectional General-purpose I/O PC4 with alternate function ADC01_IN14; I/O level not marked 5 V tolerant.
25 PC5 bidirectional General-purpose I/O PC5 with alternate function ADC01_IN15; I/O level not marked 5 V tolerant.
26 PB0 bidirectional General-purpose I/O PB0 with alternate functions ADC01_IN8, TIMER2_CH2 and TIMER7_CH1_ON; remap to TIMER0_CH1_ON; I/O level not marked 5 V tolerant.
27 PB1 bidirectional General-purpose I/O PB1 with alternate functions ADC01_IN9, TIMER2_CH3 and TIMER7_CH2_ON; remap to TIMER0_CH2_ON; I/O level not marked 5 V tolerant.
28 PB2 bidirectional General-purpose 5 V tolerant I/O PB2 (default PB2), also used as BOOT1.
29 PB10 bidirectional 5 V tolerant I/O PB10 with alternate functions I2C1_SCL and USART2_TX; remap to TIMER1_CH2.
30 PB11 bidirectional 5 V tolerant I/O PB11 with alternate functions I2C1_SDA and USART2_RX; remap to TIMER1_CH3.
31 VSS_1 power_in Digital ground pin (default VSS_1).
32 VDD_1 power_in Digital power supply pin (default VDD_1).
33 PB12 bidirectional 5 V tolerant I/O PB12 with alternate functions SPI1_NSS, I2C1_SMBA, USART2_CK, TIMER0_BRKIN and I2S1_WS.
34 PB13 bidirectional 5 V tolerant I/O PB13 with alternate functions SPI1_SCK, USART2_CTS, TIMER0_CH0_ON and I2S1_CK.
35 PB14 bidirectional 5 V tolerant I/O PB14 with alternate functions SPI1_MISO, USART2_RTS and TIMER0_CH1_ON.
36 PB15 bidirectional 5 V tolerant I/O PB15 with alternate functions SPI1_MOSI, TIMER0_CH2_ON and I2S1_SD.
37 PC6 bidirectional 5 V tolerant I/O PC6 with alternate functions I2S1_MCK, TIMER7_CH0 and SDIO_D6; remap to TIMER2_CH0.
38 PC7 bidirectional 5 V tolerant I/O PC7 with alternate functions I2S2_MCK, TIMER7_CH1 and SDIO_D7; remap to TIMER2_CH1.
39 PC8 bidirectional 5 V tolerant I/O PC8 with alternate functions TIMER7_CH2 and SDIO_D0; remap to TIMER2_CH2.
40 PC9 bidirectional 5 V tolerant I/O PC9 with alternate functions TIMER7_CH3 and SDIO_D1; remap to TIMER2_CH3.
41 PA8 bidirectional 5 V tolerant I/O PA8 with alternate functions USART0_CK, TIMER0_CH0, CK_OUT0 and CTC_SYNC.
42 PA9 bidirectional 5 V tolerant I/O PA9 with alternate functions USART0_TX and TIMER0_CH1.
43 PA10 bidirectional 5 V tolerant I/O PA10 with alternate functions USART0_RX and TIMER0_CH2.
44 PA11 bidirectional 5 V tolerant I/O PA11 with alternate functions USART0_CTS, CAN0_RX, USBDM and TIMER0_CH3.
45 PA12 bidirectional 5 V tolerant I/O PA12 with alternate functions USART0_RTS, CAN0_TX, TIMER0_ETI and USBDP.
46 PA13 bidirectional 5 V tolerant I/O PA13 with default function JTMS/SWDIO; remap to PA13.
47 VSS_2 power_in Digital ground pin (default VSS_2).
48 VDD_2 power_in Digital power supply pin (default VDD_2).
49 PA14 bidirectional 5 V tolerant I/O PA14 with default function JTCK/SWCLK; remap to PA14.
50 PA15 bidirectional 5 V tolerant I/O PA15 with default function JTDI and alternate functions SPI2_NSS and I2S2_WS; remap to TIMER1_CH0, TIMER1_ETI, PA15 and SPI0_NSS.
51 PC10 bidirectional 5 V tolerant I/O PC10 with alternate functions UART3_TX and SDIO_D2; remap to USART2_TX, SPI2_SCK and I2S2_CK.
52 PC11 bidirectional 5 V tolerant I/O PC11 with alternate functions UART3_RX and SDIO_D3; remap to USART2_RX and SPI2_MISO.
53 PC12 bidirectional 5 V tolerant I/O PC12 with alternate functions UART4_TX and SDIO_CK; remap to USART2_CK, SPI2_MOSI and I2S2_SD.
54 PD2 bidirectional 5 V tolerant I/O PD2 with alternate functions TIMER2_ETI, SDIO_CMD and UART4_RX.
55 PB3 bidirectional 5 V tolerant I/O PB3 with default function JTDO and alternate functions SPI2_SCK and I2S2_CK; remap to PB3, TRACESWO, TIMER1_CH1 and SPI0_SCK.
56 PB4 bidirectional 5 V tolerant I/O PB4 with default function NJTRST and alternate function SPI2_MISO; remap to TIMER2_CH0, PB4 and SPI0_MISO.
57 PB5 bidirectional General-purpose I/O PB5 with alternate functions I2C0_SMBA, SPI2_MOSI and I2S2_SD; remap to TIMER2_CH1 and SPI0_MOSI; I/O level not marked 5 V tolerant.
58 PB6 bidirectional 5 V tolerant I/O PB6 with alternate functions I2C0_SCL and TIMER3_CH0; remap to USART0_TX and SPI0_IO2.
59 PB7 bidirectional 5 V tolerant I/O PB7 with alternate functions I2C0_SDA and TIMER3_CH1; remap to USART0_RX and SPI0_IO3.
60 BOOT0 input Boot mode selection input with default function BOOT0.
61 PB8 bidirectional 5 V tolerant I/O PB8 with alternate function TIMER3_CH2 and SDIO_D4; remap to I2C0_SCL and CAN0_RX.
62 PB9 bidirectional 5 V tolerant I/O PB9 with alternate functions TIMER3_CH3 and SDIO_D5; remap to I2C0_SDA and CAN0_TX.
63 VSS_3 power_in Digital ground pin (default VSS_3).
64 VDD_3 power_in Digital power supply pin (default VDD_3).

Key specifications

Parameter Value
Manufacturer GigaDevice Semicon Beijing
Package LQFP-64(10x10)
Category Embedded Processors & Controllers
Pins 64

Electrical characteristics

Limits as printed in the datasheet (page.json metadata.characteristics carries them as data).

Parameter Symbol Min Typ Max Unit Conditions Page
Supply voltage VDD (external voltage range) VDD -0.3 3.6 V Relative to VSS (printed VSS - 0.3 to VSS + 3.6) 50
Analog supply voltage VDDA VDDA -0.3 3.6 V Relative to VSSA (printed VSSA - 0.3 to VSSA + 3.6) 50
Battery supply voltage VBAT VBAT -0.3 3.6 V Relative to VSS (printed VSS - 0.3 to VSS + 3.6) 50
Input voltage on 5V tolerant pin VIN -0.3 V 5V tolerant pin; max printed VDD + 3.6, VIN max must not exceed 5.5 V 50
Input voltage on other I/O VIN -0.3 3.6 V Input voltage on other I/O 50
Variation between different VDD power pins /ΔVDDX/ 50 mV 50
Variation between different ground pins /VSSX −VSS/ 50 mV 50
Maximum current for GPIO pins IIO -25 25 mA 50
Operating temperature range TA -40 85 °C 50
Power dissipation LQFP64 PD 647 mW TA = 85°C, LQFP64 50
Storage temperature range TSTG -65 150 °C 50
Maximum junction temperature TJ 125 °C 50
Supply voltage VDD VDD 2.6 3.3 3.6 V 50
Analog supply voltage VDDA VDDA 2.6 3.3 3.6 V Same as VDD 50
Battery supply voltage VBAT VBAT 1.8 3.6 V 50
AHB clock frequency fHCLK 120 MHz 51
APB1 clock frequency fAPB1 60 MHz 51
APB2 clock frequency fAPB2 120 MHz 51
VDD rise time rate tVDD 0 μs/V 51
VDD fall time rate tVDD 20 μs/V 51
Human body model ESD voltage VESD(HBM) 4000 V TA = 25 °C; JS-001-2017 62
Charge device model ESD voltage VESD(CDM) 750 V TA = 25 °C; JS-002-2018 62
Static latch-up I-test LU -200 200 mA TA = 25 °C; JESD78 62
Vsupply over voltage (latch-up test) 5.4 V 62
Crystal or ceramic frequency HXTAL fHXTAL 4 8 32 MHz 2.6 V ≤ VDD ≤ 3.6 V 62
Recommended matching capacitance on OSCIN and OSCOUT CHXTAL 20 30 pF 62
Crystal or ceramic duty cycle HXTAL Ducy(HXTAL) 30 50 70 % 62
External clock source or oscillator frequency (bypass) fHXTAL_ext 1 50 MHz VDD = 3.3 V 62
OSCIN high or low time (bypass) tH/L(HXTAL) 5 ns 63
OSCIN rise or fall time (bypass) tR/F(HXTAL) 10 ns 63
Duty cycle (HXTAL bypass) Ducy(HXTAL) 40 60 % 63
IRC8M oscillator frequency accuracy, factory-trimmed ACCIRC8M -2.5 2.5 % VDD = VDDA = 3.3 V, TA = -40 °C ~ +85 °C 64
IRC8M oscillator frequency accuracy, factory-trimmed ACCIRC8M -1.8 1.8 % VDD = VDDA = 3.3 V, TA = 0 °C ~ +85 °C 64
IRC8M oscillator frequency accuracy, factory-trimmed ACCIRC8M -1 1 % VDD = VDDA = 3.3 V, TA = 25 °C 64
Low speed internal oscillator (IRC40K) frequency fIRC40K 20 40 45 kHz VDD = VDDA = 3.3 V, TA = -40°C ~ +85 °C 65
IRC48M oscillator frequency accuracy, factory-trimmed ACCIRC48M -4 5 % VDD = VDDA = 3.3 V, TA = -40°C ~ +85 °C 65
IRC48M oscillator frequency accuracy, factory-trimmed ACCIRC48M -3 3 % VDD = VDDA = 3.3 V, TA = 0 °C ~ +85 °C 65
IRC48M oscillator frequency accuracy, factory-trimmed ACCIRC48M -2 2 % VDD = VDDA = 3.3 V, TA = 25 °C 65
PLL input clock frequency fPLLIN 1 25 MHz 66
PLL output clock frequency fPLLOUT 16 120 MHz 66
PLL VCO output clock frequency fVCO 32 240 MHz 66
PLL lock time tLOCK 300 μs 66
Number of guaranteed program/erase cycles (endurance) PECYC 100 kcycles TA = -40 °C ~ +85 °C 66
Word programming time tPROG 47.5 215 μs TA = -40°C ~ +85 °C 66
Page erase time tERASE 45 800 ms TA = -40°C ~ +85 °C 66
Mass erase time (256K) tMERASE(256K) 2 24 s TA = -40°C ~ +85 °C 66
Low level output voltage for an IO pin (IIO = +8mA) VOL 0.17 V IIO = +8mA; VDD = 2.6 V 68
Low level output voltage for an IO pin (IIO = +8mA) VOL 0.16 V IIO = +8mA; VDD = 3.3 V 68
Low level output voltage for an IO pin (IIO = +8mA) VOL 0.15 V IIO = +8mA; VDD = 3.6 V 68
High level output voltage for an IO pin (IIO = +8mA) VOH 2.4 V IIO = +8mA; VDD = 2.6 V 68
High level output voltage for an IO pin (IIO = +8mA) VOH 3.15 V IIO = +8mA; VDD = 3.3 V 68
High level output voltage for an IO pin (IIO = +8mA) VOH 3.44 V IIO = +8mA; VDD = 3.6 V 68
Internal pull-up resistor RPU 30 40 50 kΩ All pins VIN = VSS 68
Internal pull-down resistor RPD 30 40 50 kΩ All pins VIN = VDD 68
ADC clock fADC 0.1 40 MHz 69
Sampling rate, 12-bit fS 0.007 2.86 MSPS 12-bit 69
Differential non-linearity error (12-bit mode) DNL -5 5 LSB DAC in 12-bit mode 71
Integral non-linearity (12-bit mode) INL -4 4 LSB DAC in 12-bit mode 71
Thermal resistance junction-to-ambient LQFP64 θJA 61.8 °C/W Natural convection, 2S2P PCB 93

CAD (KiCad official)

  • Symbol: GD32F303RCT6A
  • Footprint: Package_QFP:LQFP-64_10x10mm_P0.5mm
  • 3D model: LQFP-64(10x10) (KiCad packages3D, STEP)
  • 3D model files: gd32f303rct6a-etched.step / gd32f303rct6a-etched.glb carry the MPN laser-etched on the die in a toggleable Adom.LaserEtch group (Fusion-ready); gd32f303rct6a.step / gd32f303rct6a.glb are the bare package body.

Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

  • Datasheet: GigaDevice Semicon Beijing datasheet (99 pp, sha256 98e6e299f43ef5ac, retrieved 2026-10-18, tier: lcsc)
  • Extractor: parts-factory 2.0.0 / extract_pins 0.3, primary claude-haiku-5-5 (text), consensus claude-sonnet-5-5 (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
  • CAD: KiCad official libraries (CC-BY-SA 4.0).

Datasheet PDF