# GD32F205VET6

**GigaDevice Semicon Beijing** · Microcontrollers (MCU/MPU/SOC) · LQFP-100(14x14)

GD32F205VET6 from GigaDevice Semicon Beijing, in a LQFP-100(14x14). Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.

## Pinout

| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | PE2 | bidirectional | Default function PE2 (5 V tolerant I/O); alternate functions TRACECK and EXMC_A23. |
| 2 | PE3 | bidirectional | Default function PE3 (5 V tolerant I/O); alternate functions TRACED0 and EXMC_A19. |
| 3 | PE4 | bidirectional | Default function PE4 (5 V tolerant I/O); alternate functions TRACED1 and EXMC_A20; remap TLI_B0. |
| 4 | PE5 | bidirectional | Default function PE5 (5 V tolerant I/O); alternate functions TRACED2 and EXMC_A21; remap TIMER8_CH0 and TLI_G0. |
| 5 | PE6 | bidirectional | Default function PE6 (5 V tolerant I/O); alternate functions TRACED3 and EXMC_A22; remap TIMER8_CH1 and TLI_G1. |
| 6 | VBAT | power_in | Default function VBAT; the pin table gives no further description or voltage limit. |
| 7 | PC13-TAMPER-RTC | bidirectional | Default function PC13; alternate function TAMPER-RTC. |
| 8 | PC14-OSC32IN | bidirectional | Default function PC14; alternate function OSC32IN. |
| 9 | PC15-OSC32OUT | bidirectional | Default function PC15; alternate function OSC32OUT. |
| 10 | VSS_5 | power_in | Ground pin VSS_5. |
| 11 | VDD_5 | power_in | Digital supply pin VDD_5; the device operates from a 2.6 to 3.6 V supply according to the general description. |
| 12 | OSCIN | input | Default function OSCIN; remap option PH0. |
| 13 | OSCOUT | output | Default function OSCOUT; remap option PH1. |
| 14 | NRST | bidirectional | Default function NRST (reset pin); the pin table gives no electrical limit. |
| 15 | PC0 | bidirectional | Default function PC0; alternate function ADC012_IN10; remap EXMC_SDNWE. |
| 16 | PC1 | bidirectional | Default function PC1; alternate function ADC012_IN11. |
| 17 | PC2 | bidirectional | Default function PC2; alternate function ADC012_IN12; remap EXMC_SDNE0 and SPI1_MISO. |
| 18 | PC3 | bidirectional | Default function PC3; alternate function ADC012_IN13; remap EXMC_SDCKE0, SPI1_MOSI and I2S1_SD. |
| 19 | VSSA | power_in | Analog ground pin VSSA. |
| 20 | VREF- | power_in | Default function VREF-; the pin table gives no further description. |
| 21 | VREF+ | power_in | Default function VREF+; the pin table gives no further description. |
| 22 | VDDA | power_in | Analog supply pin VDDA; the block diagram shows the SAR ADC and LVD powered by VDDA. |
| 23 | PA0-WKUP | bidirectional | Default function PA0; alternate functions WKUP, USART1_CTS, ADC012_IN0, TIMER1_CH0, TIMER1_ETI, TIMER4_CH0 and TIMER7_ETI; remap UART3_TX. |
| 24 | PA1 | bidirectional | Default function PA1; alternate functions USART1_RTS, ADC012_IN1, TIMER1_CH1 and TIMER4_CH1; remap UART3_RX. |
| 25 | PA2 | bidirectional | Default function PA2; alternate functions USART1_TX, ADC012_IN2, TIMER1_CH2, TIMER4_CH2, TIMER8_CH0 and SPI0_IO3. |
| 26 | PA3 | bidirectional | Default function PA3; alternate functions USART1_RX, ADC012_IN3, TIMER1_CH3, TIMER4_CH3, TIMER8_CH1 and SPI0_IO4; remap TLI_B5. |
| 27 | VSS_4 | power_in | Ground pin VSS_4. |
| 28 | VDD_4 | power_in | Digital supply pin VDD_4. |
| 29 | PA4 | bidirectional | Default function PA4; alternate functions SPI0_NSS, USART1_CK, DAC_OUT0 and ADC01_IN4; remap SPI2_NSS, I2S2_WS and TLI_VSYNC. |
| 30 | PA5 | bidirectional | Default function PA5; alternate functions SPI0_SCK, ADC01_IN5 and DAC_OUT1; remap TIMER1_CH0, TIMER1_ETI and TIMER7_CH0_ON. |
| 31 | PA6 | bidirectional | Default function PA6; alternate functions SPI0_MISO, ADC01_IN6, TIMER2_CH0, TIMER7_BRKIN and TIMER12_CH0; remap TIMER0_BRKIN and TLI_G2. |
| 32 | PA7 | bidirectional | Default function PA7; alternate functions SPI0_MOSI, ADC01_IN7, TIMER2_CH1, TIMER7_CH0_ON and TIMER13_CH0; remap TIMER0_CH0_ON. |
| 33 | PC4 | bidirectional | Default function PC4; alternate function ADC01_IN14. |
| 34 | PC5 | bidirectional | Default function PC5; alternate function ADC01_IN15. |
| 35 | PB0 | bidirectional | Default function PB0; alternate functions ADC01_IN8, TIMER2_CH2 and TIMER7_CH1_ON; remap TIMER0_CH1_ON and TLI_R3. |
| 36 | PB1 | bidirectional | Default function PB1; alternate functions ADC01_IN9, TIMER2_CH3 and TIMER7_CH2_ON; remap TIMER0_CH2_ON and TLI_R6. |
| 37 | PB2 | bidirectional | Default functions PB2 and BOOT1 (5 V tolerant I/O). |
| 38 | PE7 | bidirectional | Default function PE7 (5 V tolerant I/O); alternate functions EXMC_D4 and UART6_RX; remap TIMER0_ETI. |
| 39 | PE8 | bidirectional | Default function PE8 (5 V tolerant I/O); alternate functions EXMC_D5 and UART6_TX; remap TIMER0_CH0_ON. |
| 40 | PE9 | bidirectional | Default function PE9 (5 V tolerant I/O); alternate function EXMC_D6; remap TIMER0_CH0. |
| 41 | PE10 | bidirectional | Default function PE10 (5 V tolerant I/O); alternate function EXMC_D7; remap TIMER0_CH1_ON. |
| 42 | PE11 | bidirectional | Default function PE11 (5 V tolerant I/O); alternate function EXMC_D8; remap TIMER0_CH1 and TLI_G3. |
| 43 | PE12 | bidirectional | Default function PE12 (5 V tolerant I/O); alternate function EXMC_D9; remap TIMER0_CH2_ON and TLI_B4. |
| 44 | PE13 | bidirectional | Default function PE13 (5 V tolerant I/O); alternate function EXMC_D10; remap TIMER0_CH2 and TLI_DE. |
| 45 | PE14 | bidirectional | Default function PE14 (5 V tolerant I/O); alternate function EXMC_D11; remap TIMER0_CH3 and TLI_PIXCLK. |
| 46 | PE15 | bidirectional | Default function PE15 (5 V tolerant I/O); alternate function EXMC_D12; remap TIMER0_BRKIN and TLI_R7. |
| 47 | PB10 | bidirectional | Default function PB10 (5 V tolerant I/O); alternate functions I2C1_SCL and USART2_TX; remap TIMER1_CH2, TLI_G4, SPI1_SCK and I2S1_CK. |
| 48 | PB11 | bidirectional | Default function PB11 (5 V tolerant I/O); alternate functions I2C1_SDA and USART2_RX; remap TIMER1_CH3 and TLI_G5. |
| 49 | VSS_1 | power_in | Ground pin VSS_1. |
| 50 | VDD_1 | power_in | Digital supply pin VDD_1. |
| 51 | PB12 | bidirectional | Default function PB12 (5 V tolerant I/O); alternate functions SPI1_NSS, I2C1_SMBA, USART2_CK, TIMER0_BRKIN, I2S1_WS and CAN1_RX. |
| 52 | PB13 | bidirectional | Default function PB13 (5 V tolerant I/O); alternate functions SPI1_SCK, USART2_CTS, TIMER0_CH0_ON, I2S1_CK and CAN1_TX. |
| 53 | PB14 | bidirectional | Default function PB14 (5 V tolerant I/O); alternate functions SPI1_MISO, USART2_RTS, TIMER0_CH1_ON and TIMER11_CH0. |
| 54 | PB15 | bidirectional | Default function PB15 (5 V tolerant I/O); alternate functions SPI1_MOSI, TIMER0_CH2_ON, I2S1_SD and TIMER11_CH1. |
| 55 | PD8 | bidirectional | Default function PD8 (5 V tolerant I/O); alternate function EXMC_D13; remap USART2_TX. |
| 56 | PD9 | bidirectional | Default function PD9 (5 V tolerant I/O); alternate function EXMC_D14; remap USART2_RX. |
| 57 | PD10 | bidirectional | Default function PD10 (5 V tolerant I/O); alternate function EXMC_D15; remap USART2_CK and TLI_B3. |
| 58 | PD11 | bidirectional | Default function PD11 (5 V tolerant I/O); alternate function EXMC_A16; remap USART2_CTS. |
| 59 | PD12 | bidirectional | Default function PD12 (5 V tolerant I/O); alternate function EXMC_A17; remap TIMER3_CH0 and USART2_RTS. |
| 60 | PD13 | bidirectional | Default function PD13 (5 V tolerant I/O); alternate function EXMC_A18; remap TIMER3_CH1. |
| 61 | PD14 | bidirectional | Default function PD14 (5 V tolerant I/O); alternate function EXMC_D0; remap TIMER3_CH2. |
| 62 | PD15 | bidirectional | Default function PD15 (5 V tolerant I/O); alternate function EXMC_D1; remap TIMER3_CH3. |
| 63 | PC6 | bidirectional | Default function PC6 (5 V tolerant I/O); alternate functions I2S1_MCK, TIMER7_CH0, SDIO_D6 and USART5_TX; remap TIMER2_CH0 and TLI_HSYNC. |
| 64 | PC7 | bidirectional | Default function PC7 (5 V tolerant I/O); alternate functions I2S2_MCK, TIMER7_CH1, SDIO_D7 and USART5_RX; remap TIMER2_CH1 and TLI_G6. |
| 65 | PC8 | bidirectional | Default function PC8 (5 V tolerant I/O); alternate functions TIMER7_CH2, SDIO_D0 and USART5_CK; remap TIMER2_CH2. |
| 66 | PC9 | bidirectional | Default function PC9 (5 V tolerant I/O); alternate functions TIMER7_CH3, SDIO_D (number as printed) and CK_OUT1; remap TIMER2_CH3 and I2C2_SDA. |
| 67 | PA8 | bidirectional | Default function PA8 (5 V tolerant I/O); alternate functions USART0_CK, TIMER0_CH0, CK_OUT0, VCORE and USBFS_SOF; remap TLI_R6 and I2C2_SCL. |
| 68 | PA9 | bidirectional | Default function PA9 (5 V tolerant I/O); alternate functions USART0_TX, TIMER0_CH1 and USBFS_VBUS; remap I2C2_SMBAI. |
| 69 | PA10 | bidirectional | Default function PA10 (5 V tolerant I/O); alternate functions USART0_RX, TIMER0_CH2 and USBFS_ID. |
| 70 | PA11 | bidirectional | Default function PA11 (5 V tolerant I/O); alternate functions USART0_CTS, CAN0_RX, USBFS_DM and TIMER0_CH3; remap TLI_R4. |
| 71 | PA12 | bidirectional | Default function PA12 (5 V tolerant I/O); alternate functions USART0_RTS, USBFS_DP, CAN0_TX and TIMER0_ETI; remap TLI_R5. |
| 72 | PA13 | bidirectional | Default functions JTMS and SWDIO (5 V tolerant I/O); remap PA13. |
| 73 | NC | unconnected | Listed as NC (not connected) with no function given in the datasheet. |
| 74 | VSS_2 | power_in | Ground pin VSS_2. |
| 75 | VDD_2 | power_in | Digital supply pin VDD_2. |
| 76 | PA14 | bidirectional | Default functions JTCK and SWCLK (5 V tolerant I/O); remap PA14. |
| 77 | PA15 | bidirectional | Default function JTDI (5 V tolerant I/O); alternate functions SPI2_NSS and I2S2_WS; remap TIMER1_CH0, TIMER1_ETI, PA15 and SPI0_NSS. |
| 78 | PC10 | bidirectional | Default function PC10 (5 V tolerant I/O); alternate functions UART3_TX and SDIO_D2; remap USART2_TX, SPI2_SCK, I2S2_CK and TLI_R2. |
| 79 | PC11 | bidirectional | Default function PC11 (5 V tolerant I/O); alternate functions UART3_RX and SDIO_D3; remap USART2_RX and SPI2_MISO. |
| 80 | PC12 | bidirectional | Default function PC12 (5 V tolerant I/O); alternate functions UART4_TX and SDIO_CK; remap USART2_CK, SPI2_MOSI and I2S2_SD. |
| 81 | PD0 | bidirectional | Default function PD0 (5 V tolerant I/O); alternate function EXMC_D2; remap CAN0_RX and OSCIN. |
| 82 | PD1 | bidirectional | Default function PD1 (5 V tolerant I/O); alternate function EXMC_D3; remap CAN0_TX and OSCOUT. |
| 83 | PD2 | bidirectional | Default function PD2 (5 V tolerant I/O); alternate functions TIMER2_ETI, UART4_RX and SDIO_CMD. |
| 84 | PD3 | bidirectional | Default function PD3 (5 V tolerant I/O); alternate function EXMC_CLK; remap USART1_CTS, TLI_G7, SPI1_SCK and I2S1_CK. |
| 85 | PD4 | bidirectional | Default function PD4 (5 V tolerant I/O); alternate function EXMC_NOE; remap USART1_RTS. |
| 86 | PD5 | bidirectional | Default function PD5 (5 V tolerant I/O); alternate function EXMC_NWE; remap USART1_TX. |
| 87 | PD6 | bidirectional | Default function PD6 (5 V tolerant I/O); alternate function EXMC_NWAIT; remap USART1_RX, TLI_B2, SPI2_MOSI and I2S2_SD. |
| 88 | PD7 | bidirectional | Default function PD7 (5 V tolerant I/O); alternate functions EXMC_NE0 and EXMC_NCE1; remap USART1_CK. |
| 89 | PB3 | bidirectional | Default function JTDO (5 V tolerant I/O); alternate functions SPI2_SCK and I2S2_CK; remap PB3, TRACESWO, TIMER1_CH1 and SPI0_SCK. |
| 90 | PB4 | bidirectional | Default function JNTRST (5 V tolerant I/O); alternate function SPI2_MISO; remap TIMER2_CH0, PB4 and SPI0_MISO. |
| 91 | PB5 | bidirectional | Default function PB5; alternate functions I2C0_SMBA, SPI2_MOSI and I2S2_SD; remap TIMER2_CH1, SPI0_MOSI, CAN1_RX and EXMC_SDCKE1. |
| 92 | PB6 | bidirectional | Default function PB6 (5 V tolerant I/O); alternate functions I2C0_SCL and TIMER3_CH0; remap USART0_TX, CAN1_TX, EXMC_SDNE1 and SPI0_IO3. |
| 93 | PB7 | bidirectional | Default function PB7 (5 V tolerant I/O); alternate functions I2C0_SDA, TIMER3_CH1 and EXMC_NL; remap USART0_RX and SPI0_IO4. |
| 94 | BOOT0 | input | Default function BOOT0 (boot mode select input). |
| 95 | PB8 | bidirectional | Default function PB8 (5 V tolerant I/O); alternate functions TIMER3_CH2, TIMER9_CH0 and SDIO_D4; remap I2C0_SCL, CAN0_RX and TLI_B6. |
| 96 | PB9 | bidirectional | Default function PB9 (5 V tolerant I/O); alternate functions TIMER3_CH3, TIMER10_CH0 and SDIO_D5; remap I2C0_SDA, CAN0_TX, TLI_B7, SPI1_NSS and I2S1_WS. |
| 97 | PE0 | bidirectional | Default function PE0 (5 V tolerant I/O); alternate functions TIMER3_ETI, EXMC_NBL0 and UART7_RX. |
| 98 | PE1 | bidirectional | Default function PE1 (5 V tolerant I/O); alternate functions EXMC_NBL1 and UART7_TX. |
| 99 | VSS_3 | power_in | Ground pin VSS_3. |
| 100 | VDD_3 | power_in | Digital supply pin VDD_3. |

## Key specifications

| Parameter | Value |
|---|---|
| Manufacturer | GigaDevice Semicon Beijing |
| Package | LQFP-100(14x14) |
| Category | Embedded Processors & Controllers |
| Pins | 100 |

## Electrical characteristics

Limits as printed in the datasheet (page.json `metadata.characteristics` carries them as data).

| Parameter | Symbol | Min | Typ | Max | Unit | Conditions | Page |
|---|---|---|---|---|---|---|---|
| Input voltage on other I/O | VIN |  |  | 4 | V |  | 45 |
| Maximum current for GPIO pins | IIO |  |  | 25 | mA |  | 45 |
| Injected current on 5V tolerant pin | IINJ | -5 |  | 5 | mA |  | 45 |
| Injected current on other I/O | IINJ | -5 |  | 5 | mA |  | 45 |
| Injected current on all I/O | ∑IINJ | -25 |  | 25 | mA |  | 45 |
| Operating temperature range | TA | -40 |  | 85 | °C |  | 45 |
| Storage temperature range | TSTG | -55 |  | 150 | °C |  | 45 |
| Maximum junction temperature | TJ |  |  | 125 | °C |  | 45 |
| Supply voltage | VDD | 2.6 | 3.3 | 3.6 | V |  | 45 |
| Analog supply voltage | VDDA | 2.6 | 3.3 | 3.6 | V | Same as VDD | 45 |
| Battery supply voltage | VBAT | 1.8 |  | 3.6 | V |  | 45 |
| Power on reset threshold | VPOR | 2.32 | 2.4 | 2.48 | V |  | 47 |
| Power down reset threshold | VPDR | 1.72 | 1.8 | 1.88 | V |  | 47 |
| Electrostatic discharge voltage (human body model) | VESD(HBM) |  |  | 5000 | V | TA=25 °C; JESD22-A114 | 48 |
| Electrostatic discharge voltage (charge device model) | VESD(CDM) |  |  | 500 | V | TA=25 °C; JESD22-C101 | 48 |
| Static latch-up I-test | LU I-test | -100 |  | 100 | mA | TA=25 °C; JESD78 | 48 |
| Vsupply over voltage |  |  |  | 5.4 | V |  | 48 |
| High Speed External oscillator (HXTAL) frequency | fHXTAL | 3 | 8 | 32 | MHz | VDD=3.3V | 49 |
| Recommended load capacitance on OSCIN and OSCOUT | CHXTAL |  | 20 | 30 | pF |  | 49 |
| HXTAL oscillator duty cycle | DHXTAL | 48 | 50 | 52 | % |  | 49 |
| Low Speed External oscillator (LXTAL) frequency | fLXTAL |  | 32.768 | 1000 | KHz | VDD=VBAT=3.3V | 49 |
| Recommended load capacitance on OSC32IN and OSC32OUT | CLXTAL | 8 | 10 | 15 | pF |  | 49 |
| IRC8M oscillator Frequency accuracy, Factory-trimmed | ACCIRC8M | -2.5 |  | 1.5 | % | VDD=3.3V, TA=-40°C ~+105°C | 50 |
| IRC8M oscillator Frequency accuracy, Factory-trimmed | ACCIRC8M | -1.2 |  | 1.2 | % | VDD=3.3V, TA=0°C ~ +85°C | 50 |
| IRC8M oscillator Frequency accuracy, Factory-trimmed | ACCIRC8M | -1 |  | 1 | % | VDD=3.3V, TA=25°C | 50 |
| IRC8M oscillator duty cycle | DIRC8M | 48 | 50 | 52 | % | VDD=3.3V, fIRC8M=8MHz | 50 |
| IRC8M oscillator operating current | IDDIRC8M |  | 80 | 100 | μA | VDD=3.3V, fIRC8M=8MHz | 50 |
| Low Speed Internal oscillator (IRC40K) frequency | fIRC40K | 30 | 40 | 60 | KHz | VDD=VBAT=3.3V, TA=-40°C ~ +85°C | 50 |
| IRC40K oscillator operating current | IDDIRC40K |  | 1 | 2 | μA | VDD=VBAT=3.3V, TA=25°C | 50 |
| PLL input clock frequency | fPLLIN | 1 | 8 | 25 | MHz |  | 50 |
| PLL output clock frequency | fPLL | 16 |  | 120 | MHz |  | 50 |
| Number of guaranteed program/erase cycles before failure (Endurance) | PECYC | 100 |  |  | kcycles | TA=-40°C ~ +85°C | 51 |
| Data retention time | tRET | 20 |  |  | years | TA=125°C | 51 |
| Word programming time | tPROG | 200 |  | 400 | us | TA=-40°C ~ +85°C | 51 |
| Page erase time | tERASE | 60 | 100 | 450 | ms | TA=-40°C ~ +85°C | 51 |
| Mass erase time | tMERASE | 3.2 |  | 9.6 | s | TA=-40°C ~ +85°C | 51 |
| Standard IO Low level input voltage | VIL | -0.3 |  | 0.95 | V | VDD=2.6V | 51 |
| 5V-tolerant IO Low level input voltage | VIL | -0.3 |  | 0.9 | V | VDD=2.6V | 51 |
| Standard IO High level input voltage | VIH | 1.2 |  | 4 | V | VDD=2.6V | 51 |
| 5V-tolerant IO High level input voltage | VIH | 1.5 |  | 5.5 | V | VDD=2.6V | 51 |
| Low level output voltage | VOL |  |  | 0.2 | V | VDD=2.6V | 51 |
| High level output voltage | VOH | 2.3 |  |  | V | VDD=2.6V | 51 |
| Internal pull-up resistor | RPU | 30 | 40 | 50 | kΩ | VIN=VSS | 51 |
| Internal pull-down resistor | RPD | 30 | 40 | 50 | kΩ | VIN=VDD | 51 |
| ADC input voltage range | VIN | 0 |  |  | V |  | 52 |
| ADC clock | fADC | 0.6 |  | 28 | MHz |  | 52 |
| Sampling rate | fS |  |  | 2 | MHz | 12-bit | 52 |
| Input sampling switch resistance | RADC |  |  | 0.45 | kΩ |  | 52 |
| ADC startup time | tSU |  |  | 1 | μs |  | 52 |
| Load resistance | RLOAD | 5 |  |  | kΩ | Resistive load vs. VSSA with buffer ON | 52 |
| Load capacitance | CLOAD |  |  | 50 | pF | No pin/pad capacitance included | 52 |
| Differential non-linearity error | DNE | -3 |  | 3 | LSB | DAC in 12-bit | 52 |
| Integral non-linearity | INL | -4 |  | 4 | LSB | DAC in 12-bit | 52 |
| Offset error | Offset | -12 |  | 12 | LSB | DAC in 12-bit, VREF+ = 3.6 V | 52 |
| Gain error | GE | -0.5 |  | 0.5 | % | DAC in 12-bit | 52 |
| SCL clock frequency | fSCL | 0 |  | 100 | KHz | Standard mode | 52 |
| SCL clock frequency | fSCL | 0 |  | 400 | KHz | Fast mode | 52 |
| SCK clock frequency | fSCK |  |  | 30 | MHz |  | 53 |
| Data output valid time (SPI master mode) | tV(MO) |  |  | 25 | ns |  | 53 |
| Data input setup time (SPI master mode) | tSU(MI) | 5 |  |  | ns |  | 53 |

## CAD (KiCad official)

- Symbol: `GD32F205VET6`
- Footprint: `Package_QFP:LQFP-100_14x14mm_P0.5mm`
- 3D model: LQFP-100(14x14) (KiCad packages3D, STEP)
- 3D model files: `gd32f205vet6-etched.step` / `gd32f205vet6-etched.glb` carry the MPN laser-etched on the die in a toggleable `Adom.LaserEtch` group (Fusion-ready); `gd32f205vet6.step` / `gd32f205vet6.glb` are the bare package body.

## Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

- **Datasheet:** [GigaDevice Semicon Beijing datasheet](https://jlcpcb.com/api/file/downloadByFileSystemAccessId/8588950267198361600) (58 pp, sha256 `6ee3edea1c21fcf3`, retrieved 2026-10-18, tier: lcsc)
- **Extractor:** parts-factory `2.0.0` / `extract_pins 0.3`, primary `claude-haiku-5-5` (text), consensus `claude-sonnet-5-5` (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
- **CAD:** KiCad official libraries (CC-BY-SA 4.0).

[Datasheet PDF](docs/gd32f205vet6-datasheet.pdf)