component
GD32F130K8U6
Public Made by Adomby adom
GigaDevice Semicon Beijing Microcontroller Units (MCUs/MPUs/SOCs), QFN-32-EP(5x5). Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.
← Commit history
gd32f130k8u6: factory component page (tier=lcsc)
2 files changed
+11529−35
gd32f130k8u6-etched.stepadded+10734@@ -0,0 +1,10734 @@+ISO-10303-21;+HEADER;+FILE_DESCRIPTION(('Open CASCADE Model'),'2;1');+FILE_NAME('Open CASCADE Shape Model','2026-10-22T22:20:21',('Author'),(+ 'Open CASCADE'),'Open CASCADE STEP processor 7.8','Open CASCADE 7.8'+ ,'Unknown');+FILE_SCHEMA(('AUTOMOTIVE_DESIGN { 1 0 10303 214 1 1 1 1 }'));+ENDSEC;+DATA;+#1 = APPLICATION_PROTOCOL_DEFINITION('international standard',+ 'automotive_design',2000,#2);+#2 = APPLICATION_CONTEXT(+ 'core data for automotive mechanical design processes');+#3 = SHAPE_DEFINITION_REPRESENTATION(#4,#10);+#4 = PRODUCT_DEFINITION_SHAPE('','',#5);+#5 = PRODUCT_DEFINITION('design','',#6,#9);+#6 = PRODUCT_DEFINITION_FORMATION('','',#7);+#7 = PRODUCT('Adom.Chip','Adom.Chip','',(#8));+#8 = PRODUCT_CONTEXT('',#2,'mechanical');+#9 = PRODUCT_DEFINITION_CONTEXT('part definition',#2,'design');+#10 = ADVANCED_BREP_SHAPE_REPRESENTATION('',(#11,#15),#6785);+#11 = AXIS2_PLACEMENT_3D('',#12,#13,#14);+#12 = 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page.json+795−35@@ -1,8 +1,11 @@ {+ "schema_version": 1,+ "type": "component", "slug": "gd32f130k8u6",+ "title": "GD32F130K8U6",+ "brief": "GigaDevice Semicon Beijing Microcontroller Units (MCUs/MPUs/SOCs), QFN-32-EP(5x5). Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.", "version": "0.1.0",- "type": "component",- "description": "GigaDevice Semicon Beijing Microcontroller Units (MCUs/MPUs/SOCs), QFN-32-EP(5x5). Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.",+ "license": "CC-BY-SA-4.0", "tags": [ "component", "embedded processors & controllers",@@ -10,27 +13,6 @@ "factory-2.0.0", "extractor-text" ],- "dependencies": {},- "hero": {- "type": "image",- "path": "docs/hero.png"- },- "files": [- "page.json",- "README.md",- "gd32f130k8u6.kicad_sym",- "gd32f130k8u6.kicad_mod",- "gd32f130k8u6.glb",- "gd32f130k8u6.step",- "gd32f130k8u6.lbr",- "docs/hero.png",- "docs/gd32f130k8u6-datasheet.pdf",- "viewers/symbol.html",- "viewers/footprint.html",- "gd32f130k8u6-hero.glb",- "gd32f130k8u6-hero.overlay.json",- "gd32f130k8u6-etched.glb"- ], "component": { "mpn": "GD32F130K8U6", "manufacturer": "GigaDevice Semicon Beijing",@@ -307,12 +289,12 @@ "origin": "footprint origin = pad-pattern centre", "seat": "z = 0", "extents_mm": [- 5,- 5,+ 5.0,+ 5.0, 0.875 ],- "zmin_mm": 0,- "centre_offset_mm": 0,+ "zmin_mm": 0.0,+ "centre_offset_mm": 0.0, "footprint_binding": "identity", "sha256": "5fa713ea46b36980895812ed853577889b7cb06d275041a39b99bc0be305dc79", "checked": "2026-10-22",@@ -326,12 +308,12 @@ "origin": "footprint origin = pad-pattern centre", "seat": "z = 0", "extents_mm": [- 5,- 5,+ 5.0,+ 5.0, 0.875 ],- "zmin_mm": 0,- "centre_offset_mm": 0,+ "zmin_mm": 0.0,+ "centre_offset_mm": 0.0, "footprint_binding": "identity", "sha256": "342fe6e6003e3b18a5082c223c50b808cc9399901cd0cfde42011f4c8d9ec3d3", "checked": "2026-10-22",@@ -339,10 +321,788 @@ } ] },- "visibility": "public",- "org": "adom",+ "metadata": {+ "specs": {+ "Manufacturer": "GigaDevice Semicon Beijing",+ "Package": "QFN-32-EP(5x5)",+ "Category": "Embedded Processors & Controllers",+ "Pins": "33"+ },+ "characteristics": {+ "version": 1,+ "source": "datasheet",+ "datasheet_sha256": "340185fd2f1ee6043f1e429aea97e1ef9c475204965f1bbf4be553f6d1723199",+ "rows": [+ {+ "name": "External voltage range VDD",+ "symbol": "VDD",+ "kind": "absolute_maximum",+ "unit": "V",+ "min": -0.3,+ "typ": null,+ "max": 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