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GD32F130K8U6

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GigaDevice Semicon Beijing Microcontroller Units (MCUs/MPUs/SOCs), QFN-32-EP(5x5). Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.

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Symbol & Footprint

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Contents

README

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GD32F130K8U6

GigaDevice Semicon Beijing · Microcontroller Units (MCUs/MPUs/SOCs) · QFN-32-EP(5x5)

GD32F130K8U6 from GigaDevice Semicon Beijing, in a QFN-32-EP(5x5). Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.

Pinout

Pin Name Type Function
1 VDD power_in Digital power supply pin (default function VDD).
2 PF0-OSCIN bidirectional 5V-tolerant I/O, default PF0, additional function OSCIN (crystal oscillator input).
3 PF1-OSCOUT bidirectional 5V-tolerant I/O, default PF1, additional function OSCOUT (crystal oscillator output).
4 NRST bidirectional Reset pin, default function NRST.
5 VDDA power_in Analog power supply pin (default function VDDA).
6 PA0-WKUP bidirectional I/O, default PA0; alternate USART0_CTS/USART1_CTS, TIMER1_CH0, TIMER1_ETI, I2C1_SCL; additional ADC_IN0, RTC_TAMP1, WKUP0.
7 PA1 bidirectional I/O, default PA1; alternate USART0_RTS/USART1_RTS, TIMER1_CH1, I2C1_SDA, EVENTOUT; additional ADC_IN1.
8 PA2 bidirectional I/O, default PA2; alternate USART0_TX/USART1_TX, TIMER1_CH2, TIMER14_CH0; additional ADC_IN2.
9 PA3 bidirectional I/O, default PA3; alternate USART0_RX/USART1_RX, TIMER1_CH3, TIMER14_CH1; additional ADC_IN3.
10 PA4 bidirectional I/O, default PA4; alternate SPI0_NSS, USART0_CK/USART1_CK, TIMER13_CH0, SPI1_NSS; additional ADC_IN4.
11 PA5 bidirectional I/O, default PA5; alternate SPI0_SCK, TIMER1_CH0, TIMER1_ETI; additional ADC_IN5.
12 PA6 bidirectional I/O, default PA6; alternate SPI0_MISO, TIMER2_CH0, TIMER0_BRKIN, TIMER15_CH0, EVENTOUT; additional ADC_IN6.
13 PA7 bidirectional I/O, default PA7; alternate SPI0_MOSI, TIMER2_CH1, TIMER13_CH0, TIMER0_CH0_ON, TIMER16_CH0, EVENTOUT; additional ADC_IN7.
14 PB0 bidirectional I/O, default PB0; alternate TIMER2_CH2, TIMER0_CH1_ON, USART1_RX, EVENTOUT; additional ADC_IN8.
15 PB1 bidirectional I/O, default PB1; alternate TIMER2_CH3, TIMER13_CH0, TIMER0_CH2_ON, SPI1_SCK; additional ADC_IN9.
16 PB2 bidirectional 5V-tolerant I/O, default PB2.
17 VDD power_in Digital power supply pin (default function VDD).
18 PA8 bidirectional 5V-tolerant I/O, default PA8; alternate USART0_CK, TIMER0_CH0, CK_OUT, USART1_TX, EVENTOUT.
19 PA9 bidirectional 5V-tolerant I/O, default PA9; alternate USART0_TX, TIMER0_CH1, TIMER14_BRKIN, I2C0_SCL.
20 PA10 bidirectional 5V-tolerant I/O, default PA10; alternate USART0_RX, TIMER0_CH2, TIMER16_BRKIN, I2C0_SDA.
21 PA11 bidirectional 5V-tolerant I/O, default PA11; alternate USART0_CTS, TIMER0_CH3, EVENTOUT.
22 PA12 bidirectional 5V-tolerant I/O, default PA12; alternate USART0_RTS, TIMER0_ETI, EVENTOUT.
23 PA13 bidirectional 5V-tolerant I/O, default PA13; alternate IFRP_OUT, SWDIO, SPI1_MISO.
24 PA14 bidirectional 5V-tolerant I/O, default PA14; alternate USART0_TX/USART1_TX, SWCLK, SPI1_MOSI.
25 PA15 bidirectional 5V-tolerant I/O, default PA15; alternate SPI0_NSS, USART0_RX/USART1_RX, TIMER1_CH0, TIMER1_ETI, SPI1_NSS, EVENTOUT.
26 PB3 bidirectional 5V-tolerant I/O, default PB3; alternate SPI0_SCK, TIMER1_CH1, EVENTOUT.
27 PB4 bidirectional 5V-tolerant I/O, default PB4; alternate SPI0_MISO, TIMER2_CH0, EVENTOUT.
28 PB5 bidirectional 5V-tolerant I/O, default PB5; alternate SPI0_MOSI, I2C0_SMBA, TIMER15_BRKIN, TIMER2_CH1.
29 PB6 bidirectional 5V-tolerant I/O, default PB6; alternate I2C0_SCL, USART0_TX, TIMER15_CH0_ON.
30 PB7 bidirectional 5V-tolerant I/O, default PB7; alternate I2C0_SDA, USART0_RX, TIMER16_CH0_ON.
31 BOOT0 input Boot mode selection input, default function BOOT0.
32 PB8 bidirectional 5V-tolerant I/O, default PB8; alternate I2C0_SCL, TIMER15_CH0.
33 EP passive Exposed pad (from the footprint; not named in the datasheet pin table).

Key specifications

Parameter Value
Manufacturer GigaDevice Semicon Beijing
Package QFN-32-EP(5x5)
Category Embedded Processors & Controllers
Pins 33

Electrical characteristics

Limits as printed in the datasheet (page.json metadata.characteristics carries them as data).

Parameter Symbol Min Typ Max Unit Conditions Page
External voltage range VDD VDD -0.3 3.6 V VSS-0.3 to VSS+3.6 39
External analog supply voltage VDDA -0.3 3.6 V VSSA-0.3 to VSSA+3.6 39
External battery supply voltage VBAT -0.3 3.6 V VSS-0.3 to VSS+3.6 39
Input voltage on 5V tolerant pin VIN -0.3 4 V VSS-0.3 to VDD+4.0 39
Input voltage on other I/O VIN -0.3 4 V VSS-0.3 to 4.0 39
Maximum current for GPIO pins IIO 25 mA 39
Operating temperature range TA -40 85 °C 39
Storage temperature range TSTG -55 150 °C 39
Maximum junction temperature TJ 125 °C 39
Supply voltage VDD 2.6 3.3 3.6 V 39
Analog supply voltage VDDA 2.6 3.3 3.6 V Same as VDD 39
Battery supply voltage VBAT 1.8 3.6 V 39
Power on reset threshold VPOR 2.32 2.4 2.48 V PDR_S=0 41
Power down reset threshold VPDR 2.27 2.35 2.43 V PDR_S=0 41
Power down reset threshold VPDR 1.72 1.8 1.88 V PDR_S=1 41
ESD voltage HBM VESD(HBM) 5000 V TA=25 °C; JESD22-A114 42
ESD voltage CDM VESD(CDM) 500 V TA=25 °C; JESD22-C101 42
Static latch-up I-test LU -100 100 mA TA=25 °C; JESD78 42
Latch-up Vsupply over voltage LU 5.4 V 42
HXTAL frequency fHXTAL 4 8 32 MHz VDD=3.3V 42
HXTAL load capacitance CHXTAL 20 30 pF 42
HXTAL duty cycle DHXTAL 48 50 52 % 42
LXTAL frequency fLXTAL 32.768 1000 KHz VDD=VBAT=3.3V 43
LXTAL load capacitance CLXTAL 15 pF 43
LXTAL duty cycle DLXTAL 48 50 52 % 43
IRC8M accuracy ACCIRC8M -2.5 1.5 % VDD=3.3V, TA=-40°C ~+105°C 43
IRC8M accuracy ACCIRC8M -1.2 1.2 % VDD=3.3V, TA=0°C ~ +85°C 43
IRC8M accuracy ACCIRC8M -1 1 % VDD=3.3V, TA=25°C 43
IRC8M duty cycle DIRC8M 48 50 52 % VDD=3.3V, fIRC8M=8MHz 43
IRC8M operating current IDDIRC8M 80 100 μA VDD=3.3V, fIRC8M=8MHz 43
IRC8M startup time tSUIRC8M 1 2 us VDD=3.3V, fIRC8M=8MHz 43
IRC40K frequency fIRC40K 30 40 60 KHz VDD=VBAT=3.3V, TA=-40°C ~ +85°C 43
IRC40K operating current IDDIRC40K 1 2 μA VDD=VBAT=3.3V, TA=25°C 43
IRC40K startup time tSUIRC40K 80 μs VDD=VBAT=3.3V, TA=25°C 43
PLL input clock frequency fPLLIN 1 8 25 MHz 44
PLL output clock frequency fPLL 16 72 MHz 44
PLL lock time tLOCK 200 μs 44
PLL cycle to cycle jitter JitterPLL 300 ps 44
Flash endurance PECYC 100 kcycles TA=-40°C ~ +85°C 44
Data retention time tRET 20 years TA=125°C 44
Word programming time tPROG 200 400 us TA=-40°C ~ +85°C 44
Page erase time tERASE 60 100 450 ms TA=-40°C ~ +85°C 44
Mass erase time tMERASE 3.2 9.6 s TA=-40°C ~ +85°C 44
Standard IO low level input voltage VIL -0.3 0.95 V VDD=2.6V 44
5V-tolerant IO low level input voltage VIL -0.3 0.9 V VDD=2.6V 44
Standard IO high level input voltage VIH 1.2 4 V VDD=2.6V 44
5V-tolerant IO high level input voltage VIH 1.5 5.5 V VDD=2.6V 44
Low level output voltage VOL 0.2 V VDD=2.6V 44
High level output voltage VOH 2.3 V VDD=2.6V 44
Internal pull-up resistor RPU 30 40 50 kΩ VIN=VSS 44
Internal pull-down resistor RPD 30 40 50 kΩ VIN=VDD 44
ADC operating voltage VDDA 2.6 3.3 3.6 V 45
ADC clock fADC 0.6 14 MHz 45
ADC sampling rate fS 1 MHz 45
ADC conversion time fADCCONV 1 18 μs fADC =14MHz 45
Input sampling switch resistance RADC 0.2 kΩ 45
Input sampling capacitance CADC 32 pF No pin/pad capacitance included 45
ADC startup time tSU 1 μs 45
SPI SCK clock frequency fSCK 18 MHz 45
SPI master data output valid time tV(MO) 25 ns SPI master mode 45
Supply current Run mode, 48 MHz, all peripherals enabled IDD 17.26 mA VDD=VBAT=3.3V, HXTAL=8MHz, System clock=48 MHz, All peripherals enabled 40

CAD (KiCad official)

  • Symbol: GD32F130K8U6
  • Footprint: Package_DFN_QFN:QFN-32-1EP_5x5mm_P0.5mm_EP3.3x3.3mm
  • 3D model: QFN-32-EP(5x5) (KiCad packages3D, STEP)
  • 3D model files: gd32f130k8u6-etched.step / gd32f130k8u6-etched.glb carry the MPN laser-etched on the die in a toggleable Adom.LaserEtch group (Fusion-ready); gd32f130k8u6.step / gd32f130k8u6.glb are the bare package body.

Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

  • Datasheet: GigaDevice Semicon Beijing datasheet (53 pp, sha256 340185fd2f1ee604, retrieved 2026-10-22, tier: lcsc)
  • Extractor: parts-factory 2.0.0 / extract_pins 0.3, primary claude-sonnet-5-5 (text), consensus claude-sonnet-5-5 (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
  • CAD: KiCad official libraries (CC-BY-SA 4.0).

Datasheet PDF