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GD32F103ZET6
Public Made by Adomby adom
GigaDevice Semicon Beijing Microcontrollers (MCU/MPU/SOC), LQFP-144(20x20). Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.
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Symbol & Footprint
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Datasheet
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README
markdownGD32F103ZET6
GigaDevice Semicon Beijing · Microcontrollers (MCU/MPU/SOC) · LQFP-144(20x20)
GD32F103ZET6 from GigaDevice Semicon Beijing, in a LQFP-144(20x20). Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.
Pinout
| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | PE2 | bidirectional | 5 V tolerant I/O; default function PE2, alternate functions TRACECK and EXMC_A23. |
| 2 | PE3 | bidirectional | 5 V tolerant I/O; default function PE3, alternate functions TRACED0 and EXMC_A19. |
| 3 | PE4 | bidirectional | 5 V tolerant I/O; default function PE4, alternate functions TRACED1 and EXMC_A20. |
| 4 | PE5 | bidirectional | 5 V tolerant I/O; default function PE5, alternate functions TRACED2 and EXMC_A21 (TIMER8_CH0 remap is listed only for ZF/G/I/K devices). |
| 5 | PE6 | bidirectional | 5 V tolerant I/O; default function PE6, alternate functions TRACED3 and EXMC_A22 (TIMER8_CH1 remap is listed only for ZF/G/I/K devices). |
| 6 | VBAT | power_in | Backup power supply for the RTC and backup domain. |
| 7 | PC13-TAMPER-RTC | bidirectional | I/O; default function PC13, alternate function TAMPER-RTC. |
| 8 | PC14-OSC32IN | bidirectional | I/O; default function PC14, alternate function OSC32IN (low-speed oscillator input). |
| 9 | PC15-OSC32OUT | bidirectional | I/O; default function PC15, alternate function OSC32OUT (low-speed oscillator output). |
| 10 | PF0 | bidirectional | 5 V tolerant I/O; default function PF0, alternate function EXMC_A0. |
| 11 | PF1 | bidirectional | 5 V tolerant I/O; default function PF1, alternate function EXMC_A1. |
| 12 | PF2 | bidirectional | 5 V tolerant I/O; default function PF2, alternate function EXMC_A2. |
| 13 | PF3 | bidirectional | 5 V tolerant I/O; default function PF3, alternate function EXMC_A3. |
| 14 | PF4 | bidirectional | 5 V tolerant I/O; default function PF4, alternate function EXMC_A4. |
| 15 | PF5 | bidirectional | 5 V tolerant I/O; default function PF5, alternate function EXMC_A5. |
| 16 | VSS_5 | power_in | Ground reference for the digital supply domain. |
| 17 | VDD_5 | power_in | Digital supply pin for the I/O and core domain. |
| 18 | PF6 | bidirectional | I/O; default function PF6, alternate functions ADC2_IN4 and EXMC_NIORD (TIMER9_CH0 remap is listed only for ZF/G/I/K devices). |
| 19 | PF7 | bidirectional | I/O; default function PF7, alternate functions ADC2_IN5 and EXMC_NREG (TIMER10_CH0 remap is listed only for ZF/G/I/K devices). |
| 20 | PF8 | bidirectional | I/O; default function PF8, alternate functions ADC2_IN6 and EXMC_NIOWR (TIMER12_CH0 remap is listed only for ZF/G/I/K devices). |
| 21 | PF9 | bidirectional | I/O; default function PF9, alternate functions ADC2_IN7 and EXMC_CD (TIMER13_CH0 remap is listed only for ZF/G/I/K devices). |
| 22 | PF10 | bidirectional | I/O; default function PF10, alternate functions ADC2_IN8 and EXMC_INTR. |
| 23 | OSCIN-PD0 | input | Default function OSCIN, the high-speed external crystal oscillator input; remappable to PD0. |
| 24 | OSCOUT-PD1 | output | Default function OSCOUT, the high-speed external crystal oscillator output; remappable to PD1. |
| 25 | NRST | bidirectional | Active-low reset pin (I/O) for the device. |
| 26 | PC0 | bidirectional | I/O; default function PC0, alternate function ADC012_IN10. |
| 27 | PC1 | bidirectional | I/O; default function PC1, alternate function ADC012_IN11. |
| 28 | PC2 | bidirectional | I/O; default function PC2, alternate function ADC012_IN12. |
| 29 | PC3 | bidirectional | I/O; default function PC3, alternate function ADC012_IN13. |
| 30 | VSSA | power_in | Ground for the analog domain (ADC, DAC, reference). |
| 31 | VREFN | power_in | ADC reference voltage negative input. |
| 32 | VREFP | power_in | ADC reference voltage positive input. |
| 33 | VDDA | power_in | Analog supply pin for the ADC, DAC and related analog blocks. |
| 34 | PA0-WKUP | bidirectional | I/O; default function PA0, alternate functions WKUP, USART1_CTS, ADC012_IN0, TIMER1_CH0, TIMER1_ETI, TIMER4_CH0 and TIMER7_ETI. |
| 35 | PA1 | bidirectional | I/O; default function PA1, alternate functions USART1_RTS, ADC012_IN1, TIMER1_CH1 and TIMER4_CH1. |
| 36 | PA2 | bidirectional | I/O; default function PA2, alternate functions USART1_TX, ADC012_IN2, TIMER1_CH2 and TIMER4_CH2 (TIMER8_CH0 remap is listed only for ZF/G/I/K devices). |
| 37 | PA3 | bidirectional | I/O; default function PA3, alternate functions USART1_RX, ADC012_IN3, TIMER1_CH3 and TIMER4_CH3 (TIMER8_CH1 remap is listed only for ZF/G/I/K devices). |
| 38 | VSS_4 | power_in | Ground reference for the digital supply domain. |
| 39 | VDD_4 | power_in | Digital supply pin for the I/O and core domain. |
| 40 | PA4 | bidirectional | I/O; default function PA4, alternate functions SPI0_NSS, USART1_CK, ADC01_IN4 and DAC0_OUT0; remappable to SPI2_NSS and I2S2_WS. |
| 41 | PA5 | bidirectional | I/O; default function PA5, alternate functions SPI0_SCK, ADC01_IN5 and DAC0_OUT1. |
| 42 | PA6 | bidirectional | I/O; default function PA6, alternate functions SPI0_MISO, ADC01_IN6, TIMER2_CH0 and TIMER7_BRKIN; remappable to TIMER0_BRKIN. |
| 43 | PA7 | bidirectional | I/O; default function PA7, alternate functions SPI0_MOSI, ADC01_IN7, TIMER2_CH1 and TIMER7_CH0_ON; remappable to TIMER0_CH0_ON. |
| 44 | PC4 | bidirectional | I/O; default function PC4, alternate function ADC01_IN14. |
| 45 | PC5 | bidirectional | I/O; default function PC5, alternate function ADC01_IN15. |
| 46 | PB0 | bidirectional | I/O; default function PB0, alternate functions ADC01_IN8, TIMER2_CH2 and TIMER7_CH1_ON; remappable to TIMER0_CH1_ON. |
| 47 | PB1 | bidirectional | I/O; default function PB1, alternate functions ADC01_IN9, TIMER2_CH3 and TIMER7_CH2_ON; remappable to TIMER0_CH2_ON. |
| 48 | PB2 | bidirectional | 5 V tolerant I/O; default function PB2 and BOOT1. |
| 49 | PF11 | bidirectional | 5 V tolerant I/O; default function PF11, alternate function EXMC_NIOS16. |
| 50 | PF12 | bidirectional | 5 V tolerant I/O; default function PF12, alternate function EXMC_A6. |
| 51 | VSS_6 | power_in | Ground reference for the digital supply domain. |
| 52 | VDD_6 | power_in | Digital supply pin for the I/O and core domain. |
| 53 | PF13 | bidirectional | 5 V tolerant I/O; default function PF13, alternate function EXMC_A7. |
| 54 | PF14 | bidirectional | 5 V tolerant I/O; default function PF14, alternate function EXMC_A8. |
| 55 | PF15 | bidirectional | 5 V tolerant I/O; default function PF15, alternate function EXMC_A9. |
| 56 | PG0 | bidirectional | 5 V tolerant I/O; default function PG0, alternate function EXMC_A10. |
| 57 | PG1 | bidirectional | 5 V tolerant I/O; default function PG1, alternate function EXMC_A11. |
| 58 | PE7 | bidirectional | 5 V tolerant I/O; default function PE7, alternate function EXMC_D4; remappable to TIMER0_ETI. |
| 59 | PE8 | bidirectional | 5 V tolerant I/O; default function PE8, alternate function EXMC_D5; remappable to TIMER0_CH0_ON. |
| 60 | PE9 | bidirectional | 5 V tolerant I/O; default function PE9, alternate function EXMC_D6; remappable to TIMER0_CH0. |
| 61 | VSS_7 | power_in | Ground reference for the digital supply domain. |
| 62 | VDD_7 | power_in | Digital supply pin for the I/O and core domain. |
| 63 | PE10 | bidirectional | 5 V tolerant I/O; default function PE10, alternate function EXMC_D7; remappable to TIMER0_CH1_ON. |
| 64 | PE11 | bidirectional | 5 V tolerant I/O; default function PE11, alternate function EXMC_D8; remappable to TIMER0_CH1. |
| 65 | PE12 | bidirectional | 5 V tolerant I/O; default function PE12, alternate function EXMC_D9; remappable to TIMER0_CH2_ON. |
| 66 | PE13 | bidirectional | 5 V tolerant I/O; default function PE13, alternate function EXMC_D10; remappable to TIMER0_CH2. |
| 67 | PE14 | bidirectional | 5 V tolerant I/O; default function PE14, alternate function EXMC_D11; remappable to TIMER0_CH3. |
| 68 | PE15 | bidirectional | 5 V tolerant I/O; default function PE15, alternate function EXMC_D12; remappable to TIMER0_BRKIN. |
| 69 | PB10 | bidirectional | 5 V tolerant I/O; default function PB10, alternate functions I2C1_SCL and USART2_TX; remappable to TIMER1_CH2. |
| 70 | PB11 | bidirectional | 5 V tolerant I/O; default function PB11, alternate functions I2C1_SDA and USART2_RX; remappable to TIMER1_CH3. |
| 71 | VSS_1 | power_in | Ground reference for the digital supply domain. |
| 72 | VDD_1 | power_in | Digital supply pin for the I/O and core domain. |
| 73 | PB12 | bidirectional | 5 V tolerant I/O; default function PB12, alternate functions SPI1_NSS, I2C1_SMBA, USART2_CK, TIMER0_BRKIN and I2S1_WS. |
| 74 | PB13 | bidirectional | 5 V tolerant I/O; default function PB13, alternate functions SPI1_SCK, USART2_CTS, TIMER0_CH0_ON and I2S1_CK. |
| 75 | PB14 | bidirectional | 5 V tolerant I/O; default function PB14, alternate functions SPI1_MISO, USART2_RTS and TIMER0_CH1_ON (TIMER11_CH0 is listed only for ZF/G/I/K devices). |
| 76 | PB15 | bidirectional | 5 V tolerant I/O; default function PB15, alternate functions SPI1_MOSI, TIMER0_CH2_ON and I2S1_SD (TIMER11_CH1 is listed only for ZF/G/I/K devices). |
| 77 | PD8 | bidirectional | 5 V tolerant I/O; default function PD8, alternate function EXMC_D13; remappable to USART2_TX. |
| 78 | PD9 | bidirectional | 5 V tolerant I/O; default function PD9, alternate function EXMC_D14; remappable to USART2_RX. |
| 79 | PD10 | bidirectional | 5 V tolerant I/O; default function PD10, alternate function EXMC_D15; remappable to USART2_CK. |
| 80 | PD11 | bidirectional | 5 V tolerant I/O; default function PD11, alternate functions EXMC_A16 and EXMC_CLE; remappable to USART2_CTS. |
| 81 | PD12 | bidirectional | 5 V tolerant I/O; default function PD12, alternate functions EXMC_A17 and EXMC_ALE; remappable to TIMER3_CH0 and USART2_RTS. |
| 82 | PD13 | bidirectional | 5 V tolerant I/O; default function PD13, alternate function EXMC_A18; remappable to TIMER3_CH1. |
| 83 | VSS_8 | power_in | Ground reference for the digital supply domain. |
| 84 | VDD_8 | power_in | Digital supply pin for the I/O and core domain. |
| 85 | PD14 | bidirectional | 5 V tolerant I/O; default function PD14, alternate function EXMC_D0; remappable to TIMER3_CH2. |
| 86 | PD15 | bidirectional | 5 V tolerant I/O; default function PD15, alternate function EXMC_D1; remappable to TIMER3_CH3. |
| 87 | PG2 | bidirectional | 5 V tolerant I/O; default function PG2, alternate function EXMC_A12. |
| 88 | PG3 | bidirectional | 5 V tolerant I/O; default function PG3, alternate function EXMC_A13. |
| 89 | PG4 | bidirectional | 5 V tolerant I/O; default function PG4, alternate function EXMC_A14. |
| 90 | PG5 | bidirectional | 5 V tolerant I/O; default function PG5, alternate function EXMC_A15. |
| 91 | PG6 | bidirectional | 5 V tolerant I/O; default function PG6, alternate function EXMC_INT1. |
| 92 | PG7 | bidirectional | 5 V tolerant I/O; default function PG7, alternate function EXMC_INT2. |
| 93 | PG8 | bidirectional | 5 V tolerant I/O with default function PG8. |
| 94 | VSS_9 | power_in | Ground reference for the digital supply domain. |
| 95 | VDD_9 | power_in | Digital supply pin for the I/O and core domain. |
| 96 | PC6 | bidirectional | 5 V tolerant I/O; default function PC6, alternate functions I2S1_MCK, TIMER7_CH0 and SDIO_D6; remappable to TIMER2_CH0. |
| 97 | PC7 | bidirectional | 5 V tolerant I/O; default function PC7, alternate functions I2S2_MCK, TIMER7_CH1 and SDIO_D7; remappable to TIMER2_CH1. |
| 98 | PC8 | bidirectional | 5 V tolerant I/O; default function PC8, alternate functions TIMER7_CH2 and SDIO_D0; remappable to TIMER2_CH2. |
| 99 | PC9 | bidirectional | 5 V tolerant I/O; default function PC9, alternate functions TIMER7_CH3 and SDIO_D1; remappable to TIMER2_CH3. |
| 100 | PA8 | bidirectional | 5 V tolerant I/O; default function PA8, alternate functions USART0_CK, TIMER0_CH0 and CK_OUT0. |
| 101 | PA9 | bidirectional | 5 V tolerant I/O; default function PA9, alternate functions USART0_TX and TIMER0_CH1. |
| 102 | PA10 | bidirectional | 5 V tolerant I/O; default function PA10, alternate functions USART0_RX and TIMER0_CH2. |
| 103 | PA11 | bidirectional | 5 V tolerant I/O; default function PA11, alternate functions USART0_CTS, CAN0_RX, USBDM and TIMER0_CH3. |
| 104 | PA12 | bidirectional | 5 V tolerant I/O; default function PA12, alternate functions USART0_RTS, CAN0_TX, TIMER0_ETI and USBDP. |
| 105 | PA13 | bidirectional | 5 V tolerant I/O; default function JTMS/SWDIO, remappable to PA13. |
| 106 | NC | unconnected | Not connected. |
| 107 | VSS_2 | power_in | Ground reference for the digital supply domain. |
| 108 | VDD_2 | power_in | Digital supply pin for the I/O and core domain. |
| 109 | PA14 | bidirectional | 5 V tolerant I/O; default function JTCK/SWCLK, remappable to PA14. |
| 110 | PA15 | bidirectional | 5 V tolerant I/O; default function JTDI, alternate functions SPI2_NSS and I2S2_WS; remappable to TIMER1_CH0, TIMER1_ETI, PA15 and SPI0_NSS. |
| 111 | PC10 | bidirectional | 5 V tolerant I/O; default function PC10, alternate functions UART3_TX and SDIO_D2; remappable to USART2_TX, SPI2_SCK and I2S2_CK. |
| 112 | PC11 | bidirectional | 5 V tolerant I/O; default function PC11, alternate functions UART3_RX and SDIO_D3; remappable to USART2_RX and SPI2_MISO. |
| 113 | PC12 | bidirectional | 5 V tolerant I/O; default function PC12, alternate functions UART4_TX and SDIO_CK; remappable to USART2_CK, SPI2_MOSI and I2S2_SD. |
| 114 | PD0 | bidirectional | 5 V tolerant I/O; default function PD0, alternate function EXMC_D2; remappable to CAN0_RX. |
| 115 | PD1 | bidirectional | 5 V tolerant I/O; default function PD1, alternate function EXMC_D3; remappable to CAN0_TX. |
| 116 | PD2 | bidirectional | 5 V tolerant I/O; default function PD2, alternate functions TIMER2_ETI, SDIO_CMD and UART4_RX. |
| 117 | PD3 | bidirectional | 5 V tolerant I/O; default function PD3, alternate function EXMC_CLK; remappable to USART1_CTS. |
| 118 | PD4 | bidirectional | 5 V tolerant I/O; default function PD4, alternate function EXMC_NOE; remappable to USART1_RTS. |
| 119 | PD5 | bidirectional | 5 V tolerant I/O; default function PD5, alternate function EXMC_NWE; remappable to USART1_TX. |
| 120 | VSS_10 | power_in | Ground reference for the digital supply domain. |
| 121 | VDD_10 | power_in | Digital supply pin for the I/O and core domain. |
| 122 | PD6 | bidirectional | 5 V tolerant I/O; default function PD6, alternate function EXMC_NWAIT; remappable to USART1_RX. |
| 123 | PD7 | bidirectional | 5 V tolerant I/O; default function PD7, alternate functions EXMC_NE0 and EXMC_NCE1; remappable to USART1_CK. |
| 124 | PG9 | bidirectional | 5 V tolerant I/O; default function PG9, alternate functions EXMC_NE1 and EXMC_NCE2. |
| 125 | PG10 | bidirectional | 5 V tolerant I/O; default function PG10, alternate functions EXMC_NCE3_0 and EXMC_NE2. |
| 126 | PG11 | bidirectional | 5 V tolerant I/O; default function PG11, alternate function EXMC_NCE3_1. |
| 127 | PG12 | bidirectional | 5 V tolerant I/O; default function PG12, alternate function EXMC_NE3. |
| 128 | PG13 | bidirectional | 5 V tolerant I/O; default function PG13, alternate function EXMC_A24. |
| 129 | PG14 | bidirectional | 5 V tolerant I/O; default function PG14, alternate function EXMC_A25. |
| 130 | VSS_11 | power_in | Ground reference for the digital supply domain. |
| 131 | VDD_11 | power_in | Digital supply pin for the I/O and core domain. |
| 132 | PG15 | bidirectional | 5 V tolerant I/O with default function PG15. |
| 133 | PB3 | bidirectional | 5 V tolerant I/O; default function JTDO, alternate functions SPI2_SCK and I2S2_CK; remappable to PB3, TRACESWO, TIMER1_CH1 and SPI0_SCK. |
| 134 | PB4 | bidirectional | 5 V tolerant I/O; default function NJTRST, alternate function SPI2_MISO; remappable to TIMER2_CH0, PB4 and SPI0_MISO. |
| 135 | PB5 | bidirectional | I/O (not 5 V tolerant per the level column); default function PB5, alternate functions I2C0_SMBA, SPI2_MOSI and I2S2_SD; remappable to TIMER2_CH1 and SPI0_MOSI. |
| 136 | PB6 | bidirectional | 5 V tolerant I/O; default function PB6, alternate functions I2C0_SCL and TIMER3_CH0; remappable to USART0_TX. |
| 137 | PB7 | bidirectional | 5 V tolerant I/O; default function PB7, alternate functions I2C0_SDA, TIMER3_CH1 and EXMC_NADV; remappable to USART0_RX. |
| 138 | BOOT0 | input | Boot mode selection input, default function BOOT0. |
| 139 | PB8 | bidirectional | 5 V tolerant I/O; default function PB8, alternates TIMER3_CH2 and SDIO_D4; remappable to I2C0_SCL and CAN0_RX (TIMER9_CH0 is listed only for ZF/G/I/K devices). |
| 140 | PB9 | bidirectional | 5 V tolerant I/O; default function PB9, alternates TIMER3_CH3 and SDIO_D5; remappable to I2C0_SDA and CAN0_TX (TIMER10_CH0 is listed only for ZF/G/I/K devices). |
| 141 | PE0 | bidirectional | 5 V tolerant I/O; default function PE0, alternate functions TIMER3_ETI and EXMC_NBL0. |
| 142 | PE1 | bidirectional | 5 V tolerant I/O; default function PE1, alternate function EXMC_NBL1. |
| 143 | VSS_3 | power_in | Ground reference for the digital supply domain. |
| 144 | VDD_3 | power_in | Digital supply pin for the I/O and core domain. |
Key specifications
| Parameter | Value |
|---|---|
| Manufacturer | GigaDevice Semicon Beijing |
| Package | LQFP-144(20x20) |
| Category | Embedded Processors & Controllers |
| Pins | 144 |
Electrical characteristics
Limits as printed in the datasheet (page.json metadata.characteristics carries them as data).
| Parameter | Symbol | Min | Typ | Max | Unit | Conditions | Page |
|---|---|---|---|---|---|---|---|
| External voltage range (referenced to VSS; printed VSS-0.3 to VSS+3.6) | VDD | -0.3 | 3.6 | V | Referenced to VSS | 59 | |
| External analog supply voltage (referenced to VSSA; printed VSSA-0.3 to VSSA+3.6) | VDDA | -0.3 | 3.6 | V | Referenced to VSSA | 59 | |
| External battery supply voltage (referenced to VSS; printed VSS-0.3 to VSS+3.6) | VBAT | -0.3 | 3.6 | V | Referenced to VSS | 59 | |
| Input voltage on other I/O (non 5V-tolerant) | VIN | -0.3 | 3.6 | V | Input voltage on other I/O | 59 | |
| Variations between different VDD power pins | /ΔVDDX/ | 50 | mV | 59 | |||
| Variations between different ground pins | /VSSX −VSS/ | 50 | mV | 59 | |||
| Maximum current for GPIO pins | IIO | -25 | 25 | mA | 59 | ||
| Operating temperature range | TA | -40 | 85 | °C | 59 | ||
| Power dissipation of LQFP144 | PD | 820 | mW | TA = 85°C | 59 | ||
| Storage temperature range | TSTG | -65 | 150 | °C | 59 | ||
| Maximum junction temperature | TJ | 125 | °C | 59 | |||
| Supply voltage | VDD | 2.6 | 3.3 | 3.6 | V | 59 | |
| Analog supply voltage | VDDA | 2.6 | 3.3 | 3.6 | V | Same as VDD | 59 |
| Battery supply voltage | VBAT | 1.8 | 3.6 | V | 59 | ||
| AHB clock frequency | fHCLK | 108 | MHz | 60 | |||
| APB1 clock frequency | fAPB1 | 54 | MHz | 60 | |||
| APB2 clock frequency | fAPB2 | 108 | MHz | 60 | |||
| VDD rise time rate | tVDD | 0 | μs/V | 60 | |||
| VDD fall time rate | 20 | μs/V | 60 | ||||
| ESD voltage, human body model | VESD(HBM) | 3000 | V | TA = 25 °C; JS-001-2014 | 71 | ||
| ESD voltage, charge device model | VESD(CDM) | 500 | V | TA = 25 °C; JS-002-2014 | 71 | ||
| Static latch-up I-test | I-test | -100 | 100 | mA | TA = 25 °C; JESD78 | 72 | |
| Vsupply over voltage | Vsupply | 5.4 | V | 72 | |||
| Crystal or ceramic frequency (HXTAL) | fHXTAL | 4 | 8 | 16 | MHz | 2.6 V ≤ VDD ≤ 3.6 V | 72 |
| Recommended matching capacitance on OSCIN and OSCOUT | CHXTAL | 20 | 30 | pF | 72 | ||
| Crystal or ceramic duty cycle (HXTAL) | Ducy(HXTAL) | 30 | 50 | 70 | % | 72 | |
| External clock source or oscillator frequency (HXTAL bypass) | fHXTAL_ext | 1 | 50 | MHz | 2.6 V ≤ VDD ≤ 3.6 V | 73 | |
| OSCIN high or low time (HXTAL bypass) | tH/L(HXTAL) | 5 | ns | 73 | |||
| OSCIN rise or fall time (HXTAL bypass) | tR/F(HXTAL) | 10 | ns | 73 | |||
| Duty cycle (HXTAL bypass) | Ducy(HXTAL) | 40 | 60 | % | 73 | ||
| Crystal or ceramic duty cycle (LXTAL) | Ducy(LXTAL) | 30 | 70 | % | 74 | ||
| External clock source or oscillator frequency (LXTAL bypass) | fLXTAL_ext | 32.768 | 1000 | kHz | VDD = 3.3 V | 74 | |
| OSC32IN high or low time (LXTAL bypass) | tH/L(LXTAL) | 450 | ns | 74 | |||
| OSC32IN rise or fall time (LXTAL bypass) | tR/F(LXTAL) | 50 | ns | 74 | |||
| Duty cycle (LXTAL bypass) | Ducy(LXTAL) | 30 | 50 | 70 | % | 74 | |
| IRC8M oscillator frequency accuracy, factory-trimmed | ACCIRC8M | -2.5 | 2.5 | % | VDD = VDDA = 3.3 V, TA = -40 °C ~ +85 °C | 75 | |
| IRC8M oscillator frequency accuracy, factory-trimmed | ACCIRC8M | -1 | 1 | % | VDD = VDDA = 3.3 V, TA = 25 °C | 75 | |
| IRC8M oscillator duty cycle | DucyIRC8M | 45 | 50 | 55 | % | VDD = VDDA = 3.3 V | 75 |
| PLL input clock frequency | fPLLIN | 1 | 25 | MHz | 76 | ||
| PLL output clock frequency | fPLLOUT | 16 | 108 | MHz | 76 | ||
| PLL VCO output clock frequency | fVCO | 32 | 216 | MHz | 76 | ||
| PLL lock time | tLOCK | 300 | μs | 76 | |||
| Number of guaranteed program/erase cycles before failure (endurance) | PECYC | 100 | kcycles | TA = -40 °C ~ +85 °C | 77 | ||
| Word programming time (flash >256K value) | tPROG | 37.5 | 170 | μs | TA = -40°C ~ +85 °C; flash >256K (note 3) | 77 | |
| Page erase time (flash >256K value) | tERASE | 50 | 500 | ms | TA = -40°C ~ +85 °C; flash >256K (note 4) | 77 | |
| Mass erase time (512K) | tMERASE(512K) | 8 | 64 | s | TA = -40°C ~ +85 °C | 77 | |
| ADC clock | fADC | 0.6 | 14 | MHz | 83 | ||
| ADC sampling rate, 12-bit | fS | 0.04 | 1 | MSPS | 12-bit | 83 | |
| External input impedance (RAIN max) | RAIN | 219.8 | kΩ | See Equation 1 | 83 | ||
| Input sampling switch resistance | RADC | 0.5 | kΩ | 83 | |||
| Sampling time | ts | 0.11 | 17.11 | μs | fADC = 14 MHz | 83 | |
| ADC startup time | tSU | 1 | μs | 83 | |||
| Lower DAC_OUT voltage with buffer ON | DAC_OUT min | 0.2 | V | 84 | |||
| Load resistance | RLOAD | 5 | kΩ | Resistive load with buffer ON | 84 | ||
| Impedance output with buffer OFF | Ro | 15 | kΩ | 84 | |||
| Load capacitance | CLOAD | 50 | pF | 84 | |||
| Settling time | Tsetting | 0.3 | 1 | μs | CLOAD ≤ 50 pF, RLOAD ≥ 5 kΩ | 85 | |
| Wakeup from off state | Twakeup | 5 | 10 | μs | 85 | ||
| Max update rate for correct DAC_OUT change from code i to i±1 LSB | Update rate | 4 | MS/s | CLOAD ≤ 50 pF, RLOAD ≥ 5 kΩ | 85 | ||
| Power supply rejection ratio (to VDDA) | PSRR | 55 | 80 | dB | 85 |
CAD (KiCad official)
- Symbol:
GD32F103ZET6 - Footprint:
Package_QFP:LQFP-144_20x20mm_P0.5mm - 3D model: LQFP-144(20x20) (KiCad packages3D, STEP)
- 3D model files:
gd32f103zet6-etched.step/gd32f103zet6-etched.glbcarry the MPN laser-etched on the die in a toggleableAdom.LaserEtchgroup (Fusion-ready);gd32f103zet6.step/gd32f103zet6.glbare the bare package body.
Provenance
Data extracted from the manufacturer datasheet, not a distributor listing:
- Datasheet: GigaDevice Semicon Beijing datasheet (112 pp, sha256
53da1a17a1523e83, retrieved 2026-10-19, tier: lcsc) - Extractor: parts-factory
2.0.0/extract_pins 0.3, primaryclaude-haiku-5-5(text), consensusclaude-sonnet-5-5(agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish. - CAD: KiCad official libraries (CC-BY-SA 4.0).