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GD32F103VCT6

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GigaDevice Semicon Beijing Microcontrollers (MCU/MPU/SOC), LQFP-100(14x14). Datasheet-verified pinout, KiCad symbol/footprint/3D.

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Contents

README

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GD32F103VCT6

GigaDevice Semicon Beijing · Microcontrollers (MCU/MPU/SOC) · LQFP-100(14x14)

GD32F103VCT6 from GigaDevice Semicon Beijing, in a LQFP-100(14x14). Pinout and pin descriptions extracted from the manufacturer datasheet by ds2sf; symbol, footprint, and 3D from KiCad-official CAD.

Pinout

Pin Name Type Function
1 PE2 bidirectional General-purpose I/O port E bit 2; 5 V-tolerant. Alt: TRACECK, EXMC_A23.
2 PE3 bidirectional General-purpose I/O port E bit 3; 5 V-tolerant. Alt: TRACED0, EXMC_A19.
3 PE4 bidirectional General-purpose I/O port E bit 4; 5 V-tolerant. Alt: TRACED1, EXMC_A20.
4 PE5 bidirectional General-purpose I/O port E bit 5; 5 V-tolerant. Alt: TRACED2, EXMC_A21; remap TIMER8_CH0.
5 PE6 bidirectional General-purpose I/O port E bit 6; 5 V-tolerant. Alt: TRACED3, EXMC_A22; remap TIMER8_CH1.
6 VBAT power_in Backup battery supply (1.8-3.6 V) for RTC and backup registers when VDD is off.
7 PC13/TAMPER-RTC bidirectional Port C bit 13; also RTC tamper input / RTC alarm / calibration clock output. Muxed by RTC/TAMPER register configuration.
8 PC14/OSC32IN bidirectional Port C bit 14; also 32.768 kHz LSE oscillator input when RTC clock source uses LSE.
9 PC15/OSC32OUT bidirectional Port C bit 15; also 32.768 kHz LSE oscillator output.
10 VSS_5 power_in Digital ground.
11 VDD_5 power_in Digital supply (2.6-3.6 V).
12 OSCIN/PD0 input HSE crystal oscillator input; remappable as GPIO PD0.
13 OSCOUT/PD1 output HSE crystal oscillator output; remappable as GPIO PD1.
14 NRST bidirectional Active-low bidirectional device reset. Internally pulled up.
15 PC0 bidirectional Port C bit 0; ADC012_IN10 analog input.
16 PC1 bidirectional Port C bit 1; ADC012_IN11 analog input.
17 PC2 bidirectional Port C bit 2; ADC012_IN12 analog input.
18 PC3 bidirectional Port C bit 3; ADC012_IN13 analog input.
19 VSSA power_in Analog ground for ADC, DAC and reset block.
20 VREFN power_in ADC negative reference voltage input (typically tied to VSSA).
21 VREFP power_in ADC positive reference voltage input (2.6 V to VDDA).
22 VDDA power_in Analog supply for ADC, DAC, and reset block (2.6-3.6 V).
23 PA0-WKUP bidirectional Port A bit 0; wake-up input from Standby, USART1_CTS, ADC012_IN0, TIMER1_CH0/ETI, TIMER4_CH0, TIMER7_ETI.
24 PA1 bidirectional Port A bit 1; USART1_RTS, ADC012_IN1, TIMER1_CH1, TIMER4_CH1.
25 PA2 bidirectional Port A bit 2; USART1_TX, ADC012_IN2, TIMER1_CH2, TIMER4_CH2, TIMER8_CH0.
26 PA3 bidirectional Port A bit 3; USART1_RX, ADC012_IN3, TIMER1_CH3, TIMER4_CH3, TIMER8_CH1.
27 VSS_4 power_in Digital ground.
28 VDD_4 power_in Digital supply (2.6-3.6 V).
29 PA4 bidirectional Port A bit 4; SPI0_NSS, USART1_CK, ADC01_IN4, DAC0_OUT0; remap SPI2_NSS, I2S2_WS.
30 PA5 bidirectional Port A bit 5; SPI0_SCK, ADC01_IN5, DAC0_OUT1.
31 PA6 bidirectional Port A bit 6; SPI0_MISO, ADC01_IN6, TIMER2_CH0, TIMER7_BRKIN, TIMER12_CH0; remap TIMER0_BRKIN.
32 PA7 bidirectional Port A bit 7; SPI0_MOSI, ADC01_IN7, TIMER2_CH1, TIMER7_CH0_ON, TIMER13_CH0; remap TIMER0_CH0_ON.
33 PC4 bidirectional Port C bit 4; ADC01_IN14 analog input.
34 PC5 bidirectional Port C bit 5; ADC01_IN15 analog input.
35 PB0 bidirectional Port B bit 0; ADC01_IN8, TIMER2_CH2, TIMER7_CH1_ON; remap TIMER0_CH1_ON.
36 PB1 bidirectional Port B bit 1; ADC01_IN9, TIMER2_CH3, TIMER7_CH2_ON; remap TIMER0_CH2_ON.
37 PB2/BOOT1 bidirectional Port B bit 2; also BOOT1 boot-mode select input latched at reset. 5 V-tolerant.
38 PE7 bidirectional Port E bit 7; EXMC_D4; remap TIMER0_ETI.
39 PE8 bidirectional Port E bit 8; EXMC_D5; remap TIMER0_CH0_ON.
40 PE9 bidirectional Port E bit 9; EXMC_D6; remap TIMER0_CH0.
41 PE10 bidirectional Port E bit 10; EXMC_D7; remap TIMER0_CH1_ON.
42 PE11 bidirectional Port E bit 11; EXMC_D8; remap TIMER0_CH1.
43 PE12 bidirectional Port E bit 12; EXMC_D9; remap TIMER0_CH2_ON.
44 PE13 bidirectional Port E bit 13; EXMC_D10; remap TIMER0_CH2.
45 PE14 bidirectional Port E bit 14; EXMC_D11; remap TIMER0_CH3.
46 PE15 bidirectional Port E bit 15; EXMC_D12; remap TIMER0_BRKIN.
47 PB10 bidirectional Port B bit 10; I2C1_SCL, USART2_TX; remap TIMER1_CH2.
48 PB11 bidirectional Port B bit 11; I2C1_SDA, USART2_RX; remap TIMER1_CH3.
49 VSS_1 power_in Digital ground.
50 VDD_1 power_in Digital supply (2.6-3.6 V).
51 PB12 bidirectional Port B bit 12; SPI1_NSS, I2C1_SMBA, USART2_CK, TIMER0_BRKIN, I2S1_WS.
52 PB13 bidirectional Port B bit 13; SPI1_SCK, USART2_CTS, TIMER0_CH0_ON, I2S1_CK.
53 PB14 bidirectional Port B bit 14; SPI1_MISO, USART2_RTS, TIMER0_CH1_ON, TIMER11_CH0.
54 PB15 bidirectional Port B bit 15; SPI1_MOSI, TIMER0_CH2_ON, I2S1_SD, TIMER11_CH1.
55 PD8 bidirectional Port D bit 8; EXMC_D13; remap USART2_TX.
56 PD9 bidirectional Port D bit 9; EXMC_D14; remap USART2_RX.
57 PD10 bidirectional Port D bit 10; EXMC_D15; remap USART2_CK.
58 PD11 bidirectional Port D bit 11; EXMC_A16/EXMC_CLE; remap USART2_CTS.
59 PD12 bidirectional Port D bit 12; EXMC_A17/EXMC_ALE; remap TIMER3_CH0, USART2_RTS.
60 PD13 bidirectional Port D bit 13; EXMC_A18; remap TIMER3_CH1.
61 PD14 bidirectional Port D bit 14; EXMC_D0; remap TIMER3_CH2.
62 PD15 bidirectional Port D bit 15; EXMC_D1; remap TIMER3_CH3.
63 PC6 bidirectional Port C bit 6; I2S1_MCK, TIMER7_CH0, SDIO_D6; remap TIMER2_CH0.
64 PC7 bidirectional Port C bit 7; I2S2_MCK, TIMER7_CH1, SDIO_D7; remap TIMER2_CH1.
65 PC8 bidirectional Port C bit 8; TIMER7_CH2, SDIO_D0; remap TIMER2_CH2.
66 PC9 bidirectional Port C bit 9; TIMER7_CH3, SDIO_D1; remap TIMER2_CH3.
67 PA8 bidirectional Port A bit 8; USART0_CK, TIMER0_CH0, CK_OUT0.
68 PA9 bidirectional Port A bit 9; USART0_TX, TIMER0_CH1.
69 PA10 bidirectional Port A bit 10; USART0_RX, TIMER0_CH2.
70 PA11 bidirectional Port A bit 11; USART0_CTS, CAN0_RX, USBDM (USB D-), TIMER0_CH3.
71 PA12 bidirectional Port A bit 12; USART0_RTS, CAN0_TX, TIMER0_ETI, USBDP (USB D+).
72 PA13 bidirectional Port A bit 13; default JTMS / SWDIO debug pin. Can be remapped to GPIO.
73 NC unconnected Not connected; leave floating.
74 VSS_2 power_in Digital ground.
75 VDD_2 power_in Digital supply (2.6-3.6 V).
76 PA14 bidirectional Port A bit 14; default JTCK / SWCLK debug pin. Can be remapped to GPIO.
77 PA15 bidirectional Port A bit 15; default JTDI. Alt SPI2_NSS, I2S2_WS; remap TIMER1_CH0/ETI, PA15, SPI0_NSS.
78 PC10 bidirectional Port C bit 10; UART3_TX, SDIO_D2; remap USART2_TX, SPI2_SCK, I2S2_CK.
79 PC11 bidirectional Port C bit 11; UART3_RX, SDIO_D3; remap USART2_RX, SPI2_MISO.
80 PC12 bidirectional Port C bit 12; UART4_TX, SDIO_CK; remap USART2_CK, SPI2_MOSI, I2S2_SD.
81 PD0 bidirectional Port D bit 0; EXMC_D2; remap CAN0_RX.
82 PD1 bidirectional Port D bit 1; EXMC_D3; remap CAN0_TX.
83 PD2 bidirectional Port D bit 2; TIMER2_ETI, SDIO_CMD, UART4_RX.
84 PD3 bidirectional Port D bit 3; EXMC_CLK; remap USART1_CTS.
85 PD4 bidirectional Port D bit 4; EXMC_NOE; remap USART1_RTS.
86 PD5 bidirectional Port D bit 5; EXMC_NWE; remap USART1_TX.
87 PD6 bidirectional Port D bit 6; EXMC_NWAIT; remap USART1_RX.
88 PD7 bidirectional Port D bit 7; EXMC_NE0/EXMC_NCE1; remap USART1_CK.
89 PB3 bidirectional Port B bit 3; default JTDO. Alt SPI2_SCK, I2S2_CK; remap TRACESWO, TIMER1_CH1, SPI0_SCK.
90 PB4 bidirectional Port B bit 4; default NJTRST. Alt SPI2_MISO; remap TIMER2_CH0, SPI0_MISO.
91 PB5 bidirectional Port B bit 5; I2C0_SMBA, SPI2_MOSI, I2S2_SD; remap TIMER2_CH1, SPI0_MOSI.
92 PB6 bidirectional Port B bit 6; I2C0_SCL, TIMER3_CH0; remap USART0_TX.
93 PB7 bidirectional Port B bit 7; I2C0_SDA, TIMER3_CH1, EXMC_NADV; remap USART0_RX.
94 BOOT0 input Boot-mode selection input latched at reset (with PB2/BOOT1) to choose main flash, system memory, or SRAM boot source.
95 PB8 bidirectional Port B bit 8; TIMER3_CH2, SDIO_D4, TIMER9_CH0; remap I2C0_SCL, CAN0_RX.
96 PB9 bidirectional Port B bit 9; TIMER3_CH3, SDIO_D5, TIMER10_CH0; remap I2C0_SDA, CAN0_TX.
97 PE0 bidirectional Port E bit 0; TIMER3_ETI, EXMC_NBL0.
98 PE1 bidirectional Port E bit 1; EXMC_NBL1.
99 VSS_3 power_in Digital ground.
100 VDD_3 power_in Digital supply (2.6-3.6 V).

Key specifications

Parameter Value
Manufacturer GigaDevice Semicon Beijing
Package LQFP-100(14x14)
Category MCU
Pins 100

Ordering variants

Same part, different packaging or reel option.

  • GD32F103VCT6
  • GD32F103VCT6V8T6
  • GD32F103VCT6VBT6
  • GD32F103VCT6VDT6
  • GD32F103VCT6VET6
  • GD32F103VCT6VFT6
  • GD32F103VCT6VGT6
  • GD32F103VCT6VIT6
  • GD32F103VCT6VKT6
  • GD32F103VCT6ZCT6
  • GD32F103VCT6ZDT6
  • GD32F103VCT6ZET6
  • GD32F103VCT6ZFT6
  • GD32F103VCT6ZGT6
  • GD32F103VCT6ZIT6
  • GD32F103VCT6ZKT6
  • GD32F103VCT6R4T6
  • GD32F103VCT6R6T6
  • GD32F103VCT6R8T6
  • GD32F103VCT6RBT6
  • GD32F103VCT6RCT6
  • GD32F103VCT6RDT6
  • GD32F103VCT6RET6
  • GD32F103VCT6RFT6
  • GD32F103VCT6RGT6
  • GD32F103VCT6RIT6
  • GD32F103VCT6RKT6
  • GD32F103VCT6C6T6
  • GD32F103VCT6C8T6
  • GD32F103VCT6CBT6
  • GD32F103VCT6T8
  • GD32F103VCT6TB

CAD (KiCad official)

  • Symbol: GD32F103VCT6
  • Footprint: Package_QFP:LQFP-100_14x14mm_P0.5mm
  • 3D model: LQFP-100(14x14) (KiCad packages3D, STEP)
  • 3D model files: gd32f103vct6-etched.step / gd32f103vct6-etched.glb carry the MPN laser-etched on the die in a toggleable Adom.LaserEtch group (Fusion-ready); gd32f103vct6.step / gd32f103vct6.glb are the bare package body.

Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

  • Datasheet: GigaDevice Semicon Beijing datasheet (112 pp, sha256 53da1a17a1523e83, retrieved 2026-08-17, tier: lcsc)
  • Extractor: ds2sf (Claude). Every pin and dimension is cited to a datasheet page; it refuses to fabricate.
  • CAD: KiCad official libraries (CC-BY-SA 4.0).

Datasheet PDF